Remove COMPAT_1x stuff inherited from NetBSD, which does not apply to us.

ok uwe@

6 files changed, 9 insertions, 157 deletions

diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c
index 99f9a7d4909..e0d94e19f85 100644
--- a/sys/arch/arm/arm/cpufunc.c
+++ b/sys/arch/arm/arm/cpufunc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpufunc.c,v 1.4 2005/12/31 22:13:06 drahn Exp $	*/
+/*	$OpenBSD: cpufunc.c,v 1.5 2006/03/07 20:20:28 miod Exp $	*/
 /*	$NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $	*/
 
 /*
@@ -1576,10 +1576,6 @@ parse_cpu_options(args, optlist, cpuctrl)
 #if defined (CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) \
 	|| defined(CPU_ARM8)
 struct cpu_option arm678_options[] = {
-#ifdef COMPAT_12
-	{ "nocache",		IGN, BIC, CPU_CONTROL_IDC_ENABLE },
-	{ "nowritebuf",		IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif	/* COMPAT_12 */
 	{ "cpu.cache",		BIC, OR,  CPU_CONTROL_IDC_ENABLE },
 	{ "cpu.nocache",	OR,  BIC, CPU_CONTROL_IDC_ENABLE },
 	{ "cpu.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
@@ -1644,9 +1640,6 @@ struct cpu_option arm7_options[] = {
 	{ "arm7.nocache",	OR,  BIC, CPU_CONTROL_IDC_ENABLE },
 	{ "arm7.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
 	{ "arm7.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-#ifdef COMPAT_12
-	{ "fpaclk2",		BIC, OR,  CPU_CONTROL_CPCLK },
-#endif	/* COMPAT_12 */
 	{ "arm700.fpaclk",	BIC, OR,  CPU_CONTROL_CPCLK },
 	{ NULL,			IGN, IGN, 0 }
 };
@@ -1693,9 +1686,6 @@ struct cpu_option arm7tdmi_options[] = {
 	{ "arm7.nocache",	OR,  BIC, CPU_CONTROL_IDC_ENABLE },
 	{ "arm7.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
 	{ "arm7.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-#ifdef COMPAT_12
-	{ "fpaclk2",		BIC, OR,  CPU_CONTROL_CPCLK },
-#endif	/* COMPAT_12 */
 	{ "arm700.fpaclk",	BIC, OR,  CPU_CONTROL_CPCLK },
 	{ NULL,			IGN, IGN, 0 }
 };
@@ -1732,9 +1722,6 @@ struct cpu_option arm8_options[] = {
 	{ "arm8.nocache",	OR,  BIC, CPU_CONTROL_IDC_ENABLE },
 	{ "arm8.writebuf",	BIC, OR,  CPU_CONTROL_WBUF_ENABLE },
 	{ "arm8.nowritebuf",	OR,  BIC, CPU_CONTROL_WBUF_ENABLE },
-#ifdef COMPAT_12
-	{ "branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
-#endif	/* COMPAT_12 */
 	{ "cpu.branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
 	{ "arm8.branchpredict",	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
 	{ NULL,			IGN, IGN, 0 }
@@ -1920,10 +1907,6 @@ arm10_setup(args)
 
 #ifdef CPU_SA110
 struct cpu_option sa110_options[] = {
-#ifdef COMPAT_12
-	{ "nocache",		IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "nowritebuf",		IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif	/* COMPAT_12 */
 	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "sa110.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
@@ -1981,10 +1964,6 @@ sa110_setup(args)
 
 #if defined(CPU_SA1100) || defined(CPU_SA1110)
 struct cpu_option sa11x0_options[] = {
-#ifdef COMPAT_12
-	{ "nocache",		IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-	{ "nowritebuf",		IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif	/* COMPAT_12 */
 	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "sa11x0.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
@@ -2091,10 +2070,6 @@ ixp12x0_setup(args)
 #if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
     defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
 struct cpu_option xscale_options[] = {
-#ifdef COMPAT_12
-	{ "branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
-	{ "nocache",		IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-#endif	/* COMPAT_12 */
 	{ "cpu.branchpredict", 	BIC, OR,  CPU_CONTROL_BPRD_ENABLE },
 	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
diff --git a/sys/arch/arm/arm/genassym.cf b/sys/arch/arm/arm/genassym.cf
index 5f2108dcbec..46cc2f4b7f1 100644
--- a/sys/arch/arm/arm/genassym.cf
+++ b/sys/arch/arm/arm/genassym.cf
@@ -1,4 +1,4 @@
-#	$OpenBSD: genassym.cf,v 1.5 2005/12/13 00:18:18 jsg Exp $
+#	$OpenBSD: genassym.cf,v 1.6 2006/03/07 20:20:28 miod Exp $
 #	$NetBSD: genassym.cf,v 1.27 2003/11/04 10:33:16 dsl Exp$
 
 # Copyright (c) 1982, 1990 The Regents of the University of California.
@@ -109,7 +109,6 @@ member	PCB_LR			pcb_un.un_32.pcb32_lr
 member	PCB_PC			pcb_un.un_32.pcb32_pc
 member	PCB_UND_SP		pcb_un.un_32.pcb32_und_sp
 member	pcb_onfault
-export	PCB_NOALIGNFLT
 # XXX use USER_SIZEOF in new code whenever possible
 define	USER_SIZE		sizeof(struct user)
 
@@ -167,9 +166,6 @@ ifdef MULTIPROCESSOR
 member	ci_curlwp
 member	ci_curpcb
 endif
-if defined(COMPAT_15) && defined(EXEC_AOUT)
-member	ci_ctrl
-endif
 
 # Constants required for in_cksum() and friends.
 define	M_LEN			offsetof(struct mbuf, m_len)
diff --git a/sys/arch/arm/arm/mem.c b/sys/arch/arm/arm/mem.c
index 94157bd6dde..f9d19892c78 100644
--- a/sys/arch/arm/arm/mem.c
+++ b/sys/arch/arm/arm/mem.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mem.c,v 1.4 2005/11/09 18:08:37 martin Exp $	*/
+/*	$OpenBSD: mem.c,v 1.5 2006/03/07 20:20:28 miod Exp $	*/
 /*	$NetBSD: mem.c,v 1.11 2003/10/16 12:02:58 jdolecek Exp $	*/
 
 /*
@@ -210,9 +210,6 @@ mmrw(dev, uio, flags)
 				uio->uio_resid = 0;
 			return (0);
 
-#ifdef COMPAT_16
-		case _DEV_ZERO_oARM:
-#endif
 		case DEV_ZERO:
 			if (uio->uio_rw == UIO_WRITE) {
 				uio->uio_resid = 0;
diff --git a/sys/arch/arm/include/frame.h b/sys/arch/arm/include/frame.h
index 3a64436dd4e..afc98ddf7b9 100644
--- a/sys/arch/arm/include/frame.h
+++ b/sys/arch/arm/include/frame.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: frame.h,v 1.2 2004/05/19 03:17:07 drahn Exp $	*/
+/*	$OpenBSD: frame.h,v 1.3 2006/03/07 20:20:30 miod Exp $	*/
 /*	$NetBSD: frame.h,v 1.9 2003/12/01 08:48:33 scw Exp $	*/
 
 /*
@@ -172,123 +172,9 @@ void validate_trapframe (trapframe_t *, int);
 /*
  * AST_ALIGNMENT_FAULT_LOCALS and ENABLE_ALIGNMENT_FAULTS
  * These are used in order to support dynamic enabling/disabling of
- * alignment faults when executing old a.out ARM binaries.
+ * alignment faults when executing old a.out ARM binaries (which we do
+ * not support).
  */
-#if defined(COMPAT_15) && defined(EXEC_AOUT)
-#ifndef MULTIPROCESSOR
-
-/*
- * Local variables needed by the AST/Alignment Fault macroes
- */
-#define	AST_ALIGNMENT_FAULT_LOCALS					\
-.Laflt_astpending:							;\
-	.word	_C_LABEL(astpending)					;\
-.Laflt_cpufuncs:							;\
-	.word	_C_LABEL(cpufuncs)					;\
-.Laflt_curpcb:								;\
-	.word	_C_LABEL(curpcb)					;\
-.Laflt_cpu_info_store:							;\
-	.word	_C_LABEL(cpu_info_store)
-
-#define	GET_CURPCB_ENTER						\
-	ldr	r1, .Laflt_curpcb					;\
-	ldr	r1, [r1]
-
-#define	GET_CPUINFO_ENTER						\
-	ldr	r0, .Laflt_cpu_info_store
-
-#define	GET_CURPCB_EXIT							\
-	ldr	r1, .Laflt_curpcb					;\
-	ldr	r2, .Laflt_cpu_info_store				;\
-	ldr	r1, [r1]
-
-#else /* !MULTIPROCESSOR */
-
-#define	AST_ALIGNMENT_FAULT_LOCALS					\
-.Laflt_astpending:							;\
-	.word	_C_LABEL(astpending)					;\
-.Laflt_cpufuncs:							;\
-	.word	_C_LABEL(cpufuncs)					;\
-.Laflt_cpu_info:							;\
-	.word	_C_LABEL(cpu_info)
-
-#define	GET_CURPCB_ENTER						\
-	ldr	r4, .Laflt_cpu_info					;\
-	bl	_C_LABEL(cpu_number)					;\
-	ldr	r0, [r4, r0, lsl #2]					;\
-	ldr	r1, [r0, #CI_CURPCB]
-
-#define	GET_CPUINFO_ENTER	/* nothing to do */
-
-#define	GET_CURPCB_EXIT							\
-	ldr	r7, .Laflt_cpu_info					;\
-	bl	_C_LABEL(cpu_number)					;\
-	ldr	r2, [r7, r0, lsl #2]					;\
-	ldr	r1, [r2, #CI_CURPCB]
-#endif /* MULTIPROCESSOR */
-
-/*
- * This macro must be invoked following PUSHFRAMEINSVC or PUSHFRAME at
- * the top of interrupt/exception handlers.
- *
- * When invoked, r0 *must* contain the value of SPSR on the current
- * trap/interrupt frame. This is always the case if ENABLE_ALIGNMENT_FAULTS
- * is invoked immediately after PUSHFRAMEINSVC or PUSHFRAME.
- */
-#define	ENABLE_ALIGNMENT_FAULTS						\
-	and	r0, r0, #(PSR_MODE)	/* Test for USR32 mode */	;\
-	teq	r0, #(PSR_USR32_MODE)					;\
-	bne	1f			/* Not USR mode skip AFLT */	;\
-	GET_CURPCB_ENTER		/* r1 = curpcb */		;\
-	cmp	r1, #0x00		/* curpcb NULL? */		;\
-	ldrne	r1, [r1, #PCB_FLAGS]	/* Fetch curpcb->pcb_flags */	;\
-	tstne	r1, #PCB_NOALIGNFLT					;\
-	beq	1f			/* AFLTs already enabled */	;\
-	GET_CPUINFO_ENTER		/* r0 = cpuinfo */		;\
-	ldr	r2, .Laflt_cpufuncs					;\
-	ldr	r1, [r0, #CI_CTRL]	/* Fetch control register */	;\
-	mov	r0, #-1							;\
-	mov	lr, pc							;\
-	ldr	pc, [r2, #CF_CONTROL]	/* Enable alignment faults */	;\
-1:
-
-/*
- * This macro must be invoked just before PULLFRAMEFROMSVCANDEXIT or
- * PULLFRAME at the end of interrupt/exception handlers.
- */
-#define	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS				\
-	ldr	r0, [sp]		/* Get the SPSR from stack */	;\
-	mrs	r4, cpsr		/* save CPSR */			;\
-	and	r0, r0, #(PSR_MODE)	/* Returning to USR mode? */	;\
-	teq	r0, #(PSR_USR32_MODE)					;\
-	ldreq	r5, .Laflt_astpending					;\
-	bne	3f			/* Nope, get out now */		;\
-	bic	r4, r4, #(I32_bit)					;\
-1:	orr	r0, r4, #(I32_bit)	/* Disable IRQs */		;\
-	msr	cpsr_c, r0						;\
-	ldr	r1, [r5]		/* Pending AST? */		;\
-	teq	r1, #0x00000000						;\
-	bne	2f			/* Yup. Go deal with it */	;\
-	GET_CURPCB_EXIT			/* r1 = curpcb, r2 = cpuinfo */	;\
-	cmp	r1, #0x00		/* curpcb NULL? */		;\
-	ldrne	r1, [r1, #PCB_FLAGS]	/* Fetch curpcb->pcb_flags */	;\
-	tstne	r1, #PCB_NOALIGNFLT					;\
-	beq	3f			/* Keep AFLTs enabled */	;\
-	ldr	r1, [r2, #CI_CTRL]	/* Fetch control register */	;\
-	ldr	r2, .Laflt_cpufuncs					;\
-	mov	r0, #-1							;\
-	bic	r1, r1, #CPU_CONTROL_AFLT_ENABLE  /* Disable AFLTs */	;\
-	adr	lr, 3f							;\
-	ldr	pc, [r2, #CF_CONTROL]	/* Set new CTRL reg value */	;\
-2:	mov	r1, #0x00000000						;\
-	str	r1, [r5]		/* Clear astpending */		;\
-	msr	cpsr_c, r4		/* Restore interrupts */	;\
-	mov	r0, sp							;\
-	adr	lr, 1b							;\
-	b	_C_LABEL(ast)		/* ast(frame) */		;\
-3:
-
-#else	/* !(COMPAT_15 && EXEC_AOUT) */
 
 #define	AST_ALIGNMENT_FAULT_LOCALS					;\
 .Laflt_astpending:							;\
@@ -316,7 +202,6 @@ void validate_trapframe (trapframe_t *, int);
 	adr	lr, 1b							;\
 	b	_C_LABEL(ast)		/* ast(frame) */		;\
 2:
-#endif /* COMPAT_15 && EXEC_AOUT */
 
 /*
  * ASM macros for pushing and pulling trapframes from the stack
diff --git a/sys/arch/arm/include/pcb.h b/sys/arch/arm/include/pcb.h
index d52c0893513..29303fc170b 100644
--- a/sys/arch/arm/include/pcb.h
+++ b/sys/arch/arm/include/pcb.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pcb.h,v 1.1 2004/02/01 05:09:49 drahn Exp $	*/
+/*	$OpenBSD: pcb.h,v 1.2 2006/03/07 20:20:30 miod Exp $	*/
 /*	$NetBSD: pcb.h,v 1.10 2003/10/13 21:46:39 scw Exp $	*/
 
 /*
@@ -83,7 +83,6 @@ struct pcb_arm26 {
 struct pcb {
 	u_int	pcb_flags;
 #define	PCB_OWNFPU	0x00000001
-#define	PCB_NOALIGNFLT	0x00000002		/* For COMPAT_15/EXEC_AOUT */
 	struct	trapframe *pcb_tf;
 	caddr_t	pcb_onfault;			/* On fault handler */
 	union	{
diff --git a/sys/arch/vax/vax/machdep.c b/sys/arch/vax/vax/machdep.c
index 8e996fe4731..0422135ea58 100644
--- a/sys/arch/vax/vax/machdep.c
+++ b/sys/arch/vax/vax/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.76 2006/01/04 15:41:29 martin Exp $ */
+/* $OpenBSD: machdep.c,v 1.77 2006/03/07 20:20:30 miod Exp $ */
 /* $NetBSD: machdep.c,v 1.108 2000/09/13 15:00:23 thorpej Exp $	 */
 
 /*
@@ -486,7 +486,7 @@ sendsig(catcher, sig, mask, code, type, val)
 	gsigf.sf_sc.sc_onstack = psp->ps_sigstk.ss_flags & SS_ONSTACK;
 	gsigf.sf_sc.sc_mask = mask;
 
-#if defined(COMPAT_13) || defined(COMPAT_ULTRIX)
+#if defined(COMPAT_ULTRIX)
 	native_sigset_to_sigset13(mask, &gsigf.sf_sc.__sc_mask13);
 #endif