diff options
| author | Dale Rahn <drahn@cvs.openbsd.org> | 2001-05-21 19:52:56 +0000 |
|---|---|---|
| committer | Dale Rahn <drahn@cvs.openbsd.org> | 2001-05-21 19:52:56 +0000 |
| commit | 40f20eba4cb0b4227d3dfb06fff57d11d937e096 (patch) | |
| tree | 8e484424830a380b3ca75a0db881c34f894727f5 /sys/arch | |
| parent | 9becb7e3ee0e01fdab74c75f9e33c2daf400db66 (diff) | |
Name the PowerPC G4 processors better. Do not perform the cache control
on the 7450 until docs have been reviewed and it has been tested.
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/powerpc/powerpc/cpu.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/sys/arch/powerpc/powerpc/cpu.c b/sys/arch/powerpc/powerpc/cpu.c index 33c342bea3e..8d72d1b5414 100644 --- a/sys/arch/powerpc/powerpc/cpu.c +++ b/sys/arch/powerpc/powerpc/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.9 2001/03/11 04:48:12 drahn Exp $ */ +/* $OpenBSD: cpu.c,v 1.10 2001/05/21 19:52:55 drahn Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom @@ -49,7 +49,8 @@ #define MPC750 8 #define MPC604ev 9 #define MPC7400 12 -#define MPC7400v 0x800c +#define MPC7410 0x800c +#define MPC7450 0x8000 /* only valid on 603(e,ev) and G3, G4 */ #define HID0_DOZE (1 << (31-8)) @@ -123,10 +124,13 @@ cpuattach(parent, dev, aux) sprintf(cpu_model, "604ev"); break; case MPC7400: - sprintf(cpu_model, "7400(G4)"); + sprintf(cpu_model, "7400"); break; - case MPC7400v: - sprintf(cpu_model, "7400v(G4?)"); + case MPC7410: + sprintf(cpu_model, "7410"); + break; + case MPC7450: + sprintf(cpu_model, "7450"); break; default: sprintf(cpu_model, "Version %x", cpu); @@ -167,7 +171,8 @@ cpuattach(parent, dev, aux) case MPC603e: case MPC750: case MPC7400: - case MPC7400v: + case MPC7410: + case MPC7450: /* select DOZE mode */ hid0 &= ~(HID0_NAP | HID0_SLEEP); hid0 |= HID0_DOZE | HID0_DPM; @@ -176,7 +181,7 @@ cpuattach(parent, dev, aux) /* if processor is G3 or G4, configure l2 cache */ if ( (cpu == MPC750) || (cpu == MPC7400) - || (cpu == MPC7400v) ) + || (cpu == MPC7410)) { config_l2cr(); } |