Unclutter machdep.c by moving the IP32-specific initialization code to its

own file. While there, more dead beef removal in struct sys_rec.

4 files changed, 186 insertions, 155 deletions

diff --git a/sys/arch/sgi/conf/files.sgi b/sys/arch/sgi/conf/files.sgi
index db69ad4d95b..ef8b5f3dd1f 100644
--- a/sys/arch/sgi/conf/files.sgi
+++ b/sys/arch/sgi/conf/files.sgi
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.sgi,v 1.20 2008/02/20 18:46:20 miod Exp $
+#	$OpenBSD: files.sgi,v 1.21 2008/04/07 22:32:44 miod Exp $
 #
 # maxpartitions must be first item in files.${ARCH}
 #
@@ -12,7 +12,9 @@ file	arch/sgi/sgi/disksubr.c			disk
 file	arch/sgi/sgi/autoconf.c
 file	arch/sgi/sgi/bus_dma.c
 file	arch/sgi/sgi/conf.c
+file	arch/sgi/sgi/ip27_machdep.c		tgt_origin200 | tgt_origin2000
 file	arch/sgi/sgi/ip30_machdep.c		tgt_octane
+file	arch/sgi/sgi/ip32_machdep.c		tgt_o2
 file	arch/sgi/sgi/machdep.c
 file	arch/sgi/sgi/mutex.c
 file	arch/sgi/sgi/sginode.c			tgt_origin200 | tgt_origin2000
diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
index 0591a58cf1b..10e9ed351b3 100644
--- a/sys/arch/sgi/include/autoconf.h
+++ b/sys/arch/sgi/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.12 2008/02/20 18:46:20 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.13 2008/04/07 22:32:46 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -53,8 +53,6 @@ struct sys_rec {
 		u_int32_t clock_bus;
 		u_int32_t tlbsize;
 		u_int32_t tlbwired;
-		u_int32_t cfg_reg;
-		u_int32_t stat_reg;
 	} cpu[MAX_CPUS];
 	/* Published Cache OPS */
 	void    (*_SyncCache)(void);
@@ -66,9 +64,9 @@ struct sys_rec {
 	void    (*_HitInvalidateDCache)(vaddr_t, int);
 	/* Console/Serial configuration */
 	int	cons_baudclk;
-	struct mips_bus_space console_io;	/* for stupid map designs */
+	struct mips_bus_space console_io;
 	struct mips_bus_space *cons_iot;
-	bus_addr_t cons_ioaddr[8];		/* up to eight loclbus tty's */
+	bus_addr_t cons_ioaddr;
 };
 
 extern struct sys_rec sys_config;
@@ -78,7 +76,7 @@ extern struct sys_rec sys_config;
  */
 #define	COM_FREQ	(sys_config.cons_baudclk)
 #define	CONCOM_FREQ	(sys_config.cons_baudclk)
-#define	CONADDR		(sys_config.cons_ioaddr[0])
+#define	CONADDR		(sys_config.cons_ioaddr)
 
 
 /**/
@@ -95,4 +93,8 @@ struct confargs {
 
 void	enaddr_aton(const char *, u_int8_t *);
 
+void	ip27_setup(void);
+void	ip30_setup(void);
+void	ip32_setup(void);
+
 #endif /* _MACHINE_AUTOCONF_H_ */
diff --git a/sys/arch/sgi/sgi/ip32_machdep.c b/sys/arch/sgi/sgi/ip32_machdep.c
new file mode 100644
index 00000000000..0fc18b4a411
--- /dev/null
+++ b/sys/arch/sgi/sgi/ip32_machdep.c
@@ -0,0 +1,140 @@
+/*	$OpenBSD: ip32_machdep.c,v 1.1 2008/04/07 22:32:46 miod Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/proc.h>
+#include <sys/extent.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/autoconf.h>
+#include <machine/bus.h>
+#include <machine/cpu.h>
+#include <machine/memconf.h>
+
+#include <mips64/arcbios.h>
+#include <mips64/archtype.h>
+
+#include <sgi/localbus/crimebus.h>
+#include <sgi/localbus/macebus.h>
+
+void crime_configure_memory(void);
+
+extern int bootdriveoffs;
+
+void
+crime_configure_memory(void)
+{
+	struct phys_mem_desc *m;
+	volatile u_int64_t *bank_ctrl;
+	paddr_t addr;
+	psize_t size;
+	u_int32_t first_page, last_page;
+	int bank, i;
+
+	bank_ctrl = (void *)PHYS_TO_KSEG1(CRIMEBUS_BASE + CRIME_MEM_BANK0_CONTROL);
+	for (bank = 0; bank < CRIME_MAX_BANKS; bank++) {
+		addr = (bank_ctrl[bank] & CRIME_MEM_BANK_ADDR) << 25;
+		size = (bank_ctrl[bank] & CRIME_MEM_BANK_128MB) ? 128 : 32;
+#ifdef DEBUG
+		bios_printf("crime: bank %d contains %ld MB at 0x%lx\n",
+		    bank, size, addr);
+#endif
+
+		/*
+		 * Do not report memory regions below 256MB, since ARCBIOS will do.
+		 * Moreover, empty banks are reported at address zero.
+		 */
+		if (addr < 256 * 1024 * 1024)
+			continue;
+
+		addr += 1024 * 1024 * 1024;
+		size *= 1024 * 1024;
+		first_page = atop(addr);
+		last_page = atop(addr + size);
+
+		/*
+		 * Try to coalesce with other memory segments if banks are 
+		 * contiguous.
+		 */
+		m = NULL;
+		for (i = 0; i < MAXMEMSEGS; i++) {
+			if (mem_layout[i].mem_last_page == 0) {
+				if (m == NULL)
+					m = &mem_layout[i];
+			} else if (last_page == mem_layout[i].mem_first_page) {
+				m = &mem_layout[i];
+				m->mem_first_page = first_page;
+			} else if (mem_layout[i].mem_last_page == first_page) {
+				m = &mem_layout[i];
+				m->mem_last_page = last_page;
+			}
+		}
+		if (m != NULL && m->mem_last_page == 0) {
+			m->mem_first_page = first_page;
+			m->mem_last_page = last_page;
+		}
+		if (m != NULL)
+			physmem += atop(size);
+	}
+
+#ifdef DEBUG
+	for (i = 0; i < MAXMEMSEGS; i++)
+		if (mem_layout[i].mem_first_page)
+			bios_printf("MEM %d, 0x%x to  0x%x\n",i,
+				ptoa(mem_layout[i].mem_first_page),
+				ptoa(mem_layout[i].mem_last_page));
+#endif
+}
+
+void
+ip32_setup()
+{
+	uncached_base = PHYS_TO_XKPHYS(0, CCA_NC);
+
+	crime_configure_memory();
+
+	/* R1xK O2s are one disk slot machines. Offset slotno. */
+	switch ((cp0_get_prid() >> 8) & 0xff) {
+	case MIPS_R10000:
+	case MIPS_R12000:
+		bootdriveoffs = -1;
+		break;
+	}
+	/* R12K O2s must run with DSD on. */
+	switch ((cp0_get_prid() >> 8) & 0xff) {
+	case MIPS_R12000:
+		setsr(getsr() | SR_DSD);
+		break;
+	}
+
+	sys_config.cons_ioaddr = MACE_ISA_SER1_OFFS;
+	sys_config.cons_baudclk = 1843200;		/*XXX*/
+	sys_config.cons_iot = &macebus_tag;
+}
diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c
index a0b15e7c7f6..97456d46ccf 100644
--- a/sys/arch/sgi/sgi/machdep.c
+++ b/sys/arch/sgi/sgi/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.55 2008/03/23 17:05:41 deraadt Exp $ */
+/*	$OpenBSD: machdep.c,v 1.56 2008/04/07 22:32:46 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -79,13 +79,6 @@
 #include <mips64/archtype.h>
 #include <machine/bus.h>
 
-#include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
-#if defined(TGT_ORIGIN200) || defined(TGT_ORIGIN2000)
-#include <sgi/localbus/xbowmux.h>
-#endif
-
-extern struct consdev *cn_tab;
 extern char kernel_text[];
 extern int makebootdev(const char *, int);
 extern void stacktrace(void);
@@ -117,6 +110,7 @@ vm_map_t phys_map;
 int	extent_malloc_flags = 0;
 
 caddr_t	msgbufbase;
+vaddr_t	uncached_base;
 
 int	physmem;		/* Max supported memory, changes to actual. */
 int	rsvdmem;		/* Reserved memory not usable. */
@@ -151,79 +145,6 @@ void db_command_loop(void);
 static void dobootopts(int, void *);
 static int atoi(const char *, int, const char **);
 
-#if BYTE_ORDER == BIG_ENDIAN
-int	my_endian = 1;
-#else
-int	my_endian = 0;
-#endif
-
-#if defined(TGT_O2)
-void
-crime_configure_memory(void)
-{
-	struct phys_mem_desc *m;
-	volatile u_int64_t *bank_ctrl;
-	paddr_t addr;
-	psize_t size;
-	u_int32_t first_page, last_page;
-	int bank, i;
-
-	bank_ctrl = (void *)PHYS_TO_KSEG1(CRIMEBUS_BASE + CRIME_MEM_BANK0_CONTROL);
-	for (bank = 0; bank < CRIME_MAX_BANKS; bank++) {
-		addr = (bank_ctrl[bank] & CRIME_MEM_BANK_ADDR) << 25;
-		size = (bank_ctrl[bank] & CRIME_MEM_BANK_128MB) ? 128 : 32;
-#ifdef DEBUG
-		bios_printf("crime: bank %d contains %ld MB at 0x%lx\n",
-		    bank, size, addr);
-#endif
-
-		/*
-		 * Do not report memory regions below 256MB, since ARCBIOS will do.
-		 * Moreover, empty banks are reported at address zero.
-		 */
-		if (addr < 256 * 1024 * 1024)
-			continue;
-
-		addr += 1024 * 1024 * 1024;
-		size *= 1024 * 1024;
-		first_page = atop(addr);
-		last_page = atop(addr + size);
-
-		/*
-		 * Try to coalesce with other memory segments if banks are 
-		 * contiguous.
-		 */
-		m = NULL;
-		for (i = 0; i < MAXMEMSEGS; i++) {
-			if (mem_layout[i].mem_last_page == 0) {
-				if (m == NULL)
-					m = &mem_layout[i];
-			} else if (last_page == mem_layout[i].mem_first_page) {
-				m = &mem_layout[i];
-				m->mem_first_page = first_page;
-			} else if (mem_layout[i].mem_last_page == first_page) {
-				m = &mem_layout[i];
-				m->mem_last_page = last_page;
-			}
-		}
-		if (m != NULL && m->mem_last_page == 0) {
-			m->mem_first_page = first_page;
-			m->mem_last_page = last_page;
-		}
-		if (m != NULL)
-			physmem += atop(size);
-	}
-
-#ifdef DEBUG
-	for (i = 0; i < MAXMEMSEGS; i++)
-		if (mem_layout[i].mem_first_page)
-			bios_printf("MEM %d, 0x%x to  0x%x\n",i,
-				ptoa(mem_layout[i].mem_first_page),
-				ptoa(mem_layout[i].mem_last_page));
-#endif
-}
-#endif
-
 /*
  * Do all the stuff that locore normally does before calling main().
  * Reset mapping and set up mapping to hardware and init "wired" reg.
@@ -247,6 +168,16 @@ mips_init(int argc, void *argv)
 	 */
 	setsr(getsr() | SR_KX | SR_UX);
 
+#ifdef notyet
+	/*
+	 * Make sure KSEG0 cacheability match what we intend to use.
+	 *
+	 * XXX This does not work as expected on IP30. Does ARCBios
+	 * XXX depend on this?
+	 */
+	cp0_setcfg((cp0_getcfg() & ~0x07) | CCA_CACHED);
+#endif
+
 	/*
 	 * Clear the compiled BSS segment in OpenBSD code.
 	 */
@@ -273,8 +204,6 @@ mips_init(int argc, void *argv)
 	 */
 	bios_ident();
 
-bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
-
 	/*
 	 * Determine system type and set up configuration record data.
 	 */
@@ -283,32 +212,13 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 	case SGI_O2:
 		bios_printf("Found SGI-IP32, setting up.\n");
 		strlcpy(cpu_model, "SGI-O2 (IP32)", sizeof(cpu_model));
-		sys_config.cons_ioaddr[0] = MACE_ISA_SER1_OFFS;
-		sys_config.cons_ioaddr[1] = MACE_ISA_SER2_OFFS;
-		sys_config.cons_baudclk = 1843200;		/*XXX*/
-		sys_config.cons_iot = &macebus_tag;
-		sys_config.cpu[0].tlbwired = 2;
-
-		crime_configure_memory();
+		ip32_setup();
 
 		sys_config.cpu[0].clock = 180000000;  /* Reasonable default */
 		cp = Bios_GetEnvironmentVariable("cpufreq");
 		if (cp && atoi(cp, 10, NULL) > 100)
 			sys_config.cpu[0].clock = atoi(cp, 10, NULL) * 1000000;
 
-		/* R1xK O2s are one disk slot machines. Offset slotno. */
-		switch ((cp0_get_prid() >> 8) & 0xff) {
-		case MIPS_R10000:
-		case MIPS_R12000:
-			bootdriveoffs = -1;
-			break;
-		}
-		/* R12K O2s must run with DSD on. */
-		switch ((cp0_get_prid() >> 8) & 0xff) {
-		case MIPS_R12000:
-			setsr(getsr() | SR_DSD);
-			break;
-		}
 		break;
 #endif
 
@@ -316,14 +226,22 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 	case SGI_O200:
 		bios_printf("Found SGI-IP27, setting up.\n");
 		strlcpy(cpu_model, "SGI-Origin200 (IP27)", sizeof(cpu_model));
+		ip27_setup();
+
+		break;
+#endif
 
-		kl_scan_config(0);
+#if defined(TGT_OCTANE)
+	case SGI_OCTANE:
+		bios_printf("Found SGI-IP30, setting up.\n");
+		strlcpy(cpu_model, "SGI-Octane (IP30)", sizeof cpu_model);
+		ip30_setup();
+
+		sys_config.cpu[0].clock = 175000000;  /* Reasonable default */
+		cp = Bios_GetEnvironmentVariable("cpufreq");
+		if (cp && atoi(cp, 10, NULL) > 100)
+			sys_config.cpu[0].clock = atoi(cp, 10, NULL) * 1000000;
 
-		sys_config.cons_ioaddr[0] = kl_get_console_base();
-		sys_config.cons_ioaddr[1] = kl_get_console_base() - 8;
-		sys_config.cons_baudclk = 22000000 / 3;	/*XXX*/
-		sys_config.cons_iot = &xbowbus_tag;
-		sys_config.cpu[0].tlbwired = 2;
 		break;
 #endif
 
@@ -418,14 +336,15 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 			uvm_page_physload(fp, xp, fp, xp, VM_FREELIST_DEFAULT);
 			fp = lastkernpage;
 		}
-		if (lp >= fp)
+		if (lp > fp)
 			uvm_page_physload(fp, lp, fp, lp, VM_FREELIST_DEFAULT);
 	}
 
 
 	switch (sys_config.system_type) {
-#if defined(TGT_O2)
+#if defined(TGT_O2) || defined(TGT_OCTANE)
 	case SGI_O2:
+	case SGI_OCTANE:
 		sys_config.cpu[0].type = (cp0_get_prid() >> 8) & 0xff;
 		sys_config.cpu[0].vers_maj = (cp0_get_prid() >> 4) & 0x0f;
 		sys_config.cpu[0].vers_min = cp0_get_prid() & 0x0f;
@@ -448,6 +367,7 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 
 		case MIPS_R10000:
 		case MIPS_R12000:
+		case MIPS_R14000:
 			sys_config.cpu[0].tlbsize = 64;
 			break;
 
@@ -468,7 +388,7 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 	case MIPS_R10000:
 	case MIPS_R12000:
 	case MIPS_R14000:
-		sys_config.cpu[0].cfg_reg = Mips10k_ConfigCache();
+		Mips10k_ConfigCache();
 		sys_config._SyncCache = Mips10k_SyncCache;
 		sys_config._InvalidateICache = Mips10k_InvalidateICache;
 		sys_config._InvalidateICachePage = Mips10k_InvalidateICachePage;
@@ -479,7 +399,7 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 		break;
 
 	default:
-		sys_config.cpu[0].cfg_reg = Mips5k_ConfigCache();
+		Mips5k_ConfigCache();
 		sys_config._SyncCache = Mips5k_SyncCache;
 		sys_config._InvalidateICache = Mips5k_InvalidateICache;
 		sys_config._InvalidateICachePage = Mips5k_InvalidateICachePage;
@@ -496,44 +416,12 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 	 * mapped BIOS text or data.
 	 */
 	delay(20*1000);		/* Let any UART FIFO drain... */
+
+	sys_config.cpu[0].tlbwired = UPAGES / 2;
 	tlb_set_wired(0);
 	tlb_flush(sys_config.cpu[0].tlbsize);
 	tlb_set_wired(sys_config.cpu[0].tlbwired);
 
-#if 0
-	/* XXX Save the following as an example on how to optimize I/O mapping. */
-
-	/*
-	 * Set up some fixed mappings. These are frequently used so faulting
-	 * them in will waste too many cycles.
-	 */
-	if (sys_config.system_type == MOMENTUM_CP7000G ||
-	    sys_config.system_type == MOMENTUM_CP7000 ||
-	    sys_config.system_type == GALILEO_EV64240) {
-		struct tlb tlb;
-
-		tlb.tlb_mask = PG_SIZE_16M;
-#if defined(LP64)
-		tlb.tlb_hi = vad_to_vpn(0xfffffffffc000000) | 1;
-		tlb.tlb_lo0 = vad_to_pfn(0xfffffffff4000000) | PG_IOPAGE;
-#else
-		tlb.tlb_hi = vad_to_vpn(0xfc000000) | 1;
-		tlb.tlb_lo0 = vad_to_pfn(0xf4000000) | PG_IOPAGE;
-#endif
-		tlb.tlb_lo1 = vad_to_pfn(sys_config.cons_ioaddr[0]) | PG_IOPAGE;
-		tlb_write_indexed(2, &tlb);
-
-		if (sys_config.system_type == GALILEO_EV64240) {
-			tlb.tlb_mask = PG_SIZE_16M;
-			tlb.tlb_hi = vad_to_vpn(0xf8000000) | 1;
-			tlb.tlb_lo0 = vad_to_pfn(sys_config.pci_io[0].bus_base) | PG_IOPAGE;
-			tlb.tlb_lo1 = vad_to_pfn(sys_config.pci_mem[0].bus_base) | PG_IOPAGE;
-			tlb_write_indexed(3, &tlb);
-		}
-	}
-/* XXX */
-#endif
-
 #if defined(TGT_ORIGIN200) || defined(TGT_ORIGIN2000)
 	/*
 	 * If an IP27 system set up Node 0's HUB.
@@ -576,7 +464,6 @@ bios_printf("SR=%08x\n", getsr()); /* leave this in for now. need to see sr */
 	 */
 	pmap_bootstrap();
 
-
 	/*
 	 * Copy down exception vector code.
 	 */