diff options
author | Dale Rahn <drahn@cvs.openbsd.org> | 2001-09-09 21:48:52 +0000 |
---|---|---|
committer | Dale Rahn <drahn@cvs.openbsd.org> | 2001-09-09 21:48:52 +0000 |
commit | 88a928e25b11194c257bc29f735406acee106101 (patch) | |
tree | 64e0d52b0c924a4ad3b8029f3ae02aecc9752b69 /sys/arch | |
parent | 70251108a4c376fa566d67e5b20455d7e377732a (diff) |
Fix the parameter order for several instructions in the powerpc disassembler.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/macppc/macppc/db_disasm.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/sys/arch/macppc/macppc/db_disasm.c b/sys/arch/macppc/macppc/db_disasm.c index adcd499cc8a..5a56ba66bb4 100644 --- a/sys/arch/macppc/macppc/db_disasm.c +++ b/sys/arch/macppc/macppc/db_disasm.c @@ -1,5 +1,5 @@ /* $NetBSD: db_disasm.c,v 1.8 2001/06/12 05:31:44 simonb Exp $ */ -/* $OpenBSD: db_disasm.c,v 1.3 2001/09/08 05:48:09 drahn Exp $ */ +/* $OpenBSD: db_disasm.c,v 1.4 2001/09/09 21:48:51 drahn Exp $ */ /* * Copyright (c) 1996 Dale Rahn. All rights reserved. * @@ -245,13 +245,13 @@ const struct opcode opcodes[] = { { "rlwinm", 0xfc000000, 0x54000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc, "%{RC} %{A},%{S},%{SH},%{MB},%{ME}" }, { "rlwnm", 0xfc000000, 0x5c000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc, "%{RC} %{A},%{S},%{SH},%{MB},%{ME}" }, - { "ori", 0xfc000000, 0x60000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, - { "oris", 0xfc000000, 0x64000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, - { "xori", 0xfc000000, 0x68000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, - { "xoris", 0xfc000000, 0x6c000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, + { "ori", 0xfc000000, 0x60000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, + { "oris", 0xfc000000, 0x64000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, + { "xori", 0xfc000000, 0x68000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, + { "xoris", 0xfc000000, 0x6c000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, - { "andi.", 0xfc000000, 0x70000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, - { "andis.", 0xfc000000, 0x74000000, Op_S | Op_A | Op_UIMM, " %{S},%{A},%{UIMM}" }, + { "andi.", 0xfc000000, 0x70000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, + { "andis.", 0xfc000000, 0x74000000, Op_S | Op_A | Op_UIMM, " %{A},%{S},%{UIMM}" }, { "lwz", 0xfc000000, 0x80000000, Op_D | Op_A | Op_d, " %{D},%{d}(%{A})" }, { "lwzu", 0xfc000000, 0x84000000, Op_D | Op_A | Op_d, " %{D},%{d}(%{A})" }, @@ -328,10 +328,10 @@ const struct opcode opcodes_1f[] = { { "lwarx", 0xfc0007fe, 0x7c000028, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "ldx", 0xfc0007fe, 0x7c00002a, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "lwzx", 0xfc0007fe, 0x7c00002e, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, - { "slw", 0xfc0007fe, 0x7c000030, Op_D | Op_A | Op_B | Op_Rc, "%{RC} %{D},%{A},%{B}" }, - { "cntlzw", 0xfc0007fe, 0x7c000034, Op_D | Op_A | Op_Rc, "%{RC} %{D},%{A}" }, - { "sld", 0xfc0007fe, 0x7c000036, Op_D | Op_A | Op_B | Op_Rc, "%{RC} %{D},%{A},%{B}" }, - { "and", 0xfc0007fe, 0x7c000038, Op_D | Op_A | Op_B | Op_Rc, "%{RC} %{D},%{A},%{B}" }, + { "slw", 0xfc0007fe, 0x7c000030, Op_D | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, + { "cntlzw", 0xfc0007fe, 0x7c000034, Op_A | Op_S | Op_Rc, "%{RC} %{A},%{S}" }, + { "sld", 0xfc0007fe, 0x7c000036, Op_D | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, + { "and", 0xfc0007fe, 0x7c000038, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "cmpld", 0xfc2007fe, 0x7c200040, Op_crfD | Op_A | Op_B, " %{crfD}%{A},%{B}" }, { "cmplw", 0xfc2007fe, 0x7c000040, Op_crfD | Op_A | Op_B, " %{crfD}%{A},%{B}" }, { "subf", 0xfc0003fe, 0x7c000050, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{D},%{A},%{B}" }, @@ -349,7 +349,7 @@ const struct opcode opcodes_1f[] = { { "lbzx", 0xfc0007fe, 0x7c0000ae, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "neg", 0xfc0003fe, 0x7c0000d0, Op_D | Op_A | Op_OE | Op_Rc, "%{OE}%{RC} %{D},%{A}" }, { "lbzux", 0xfc0007fe, 0x7c0000ee, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, - { "nor", 0xfc0007fe, 0x7c0000f8, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A}" }, + { "nor", 0xfc0007fe, 0x7c0000f8, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S}" }, { "subfe", 0xfc0003fe, 0x7c000110, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{D},%{A}" }, { "adde", 0xfc0003fe, 0x7c000114, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{D},%{A}" }, { "mtcrf", 0xfc0007fe, 0x7c000120, Op_S | Op_CRM, " %{S},%{CRM}" }, @@ -374,11 +374,11 @@ const struct opcode opcodes_1f[] = { { "add", 0xfc0003fe, 0x7c000214, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "" }, { "dcbt", 0xfc0007fe, 0x7c00022c, Op_A | Op_B, " %{A0}%{B}" }, { "lhzx", 0xfc0007ff, 0x7c00022e, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, - { "eqv", 0xfc0007fe, 0x7c000238, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "eqv", 0xfc0007fe, 0x7c000238, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "tlbie", 0xfc0007fe, 0x7c000264, Op_B, " %{B}" }, { "eciwx", 0xfc0007fe, 0x7c00026c, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "lhzux", 0xfc0007fe, 0x7c00026e, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, - { "xor", 0xfc0007fe, 0x7c000278, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "xor", 0xfc0007fe, 0x7c000278, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "mfspr", 0xfc0007fe, 0x7c0002a6, Op_D | Op_spr, " %{D},%{spr}" }, { "lwax", 0xfc0007fe, 0x7c0002aa, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "lhax", 0xfc0007fe, 0x7c0002ae, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, @@ -387,16 +387,16 @@ const struct opcode opcodes_1f[] = { { "lwaux", 0xfc0007fe, 0x7c0002ea, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, { "lhaux", 0xfc0007fe, 0x7c0002ee, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, { "sthx", 0xfc0007fe, 0x7c00032e, Op_S | Op_A | Op_B, " %{S},%{A0}%{B}" }, - { "orc", 0xfc0007fe, 0x7c000338, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "orc", 0xfc0007fe, 0x7c000338, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "ecowx", 0xfc0007fe, 0x7c00036c, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A0}%{B}" }, { "slbie", 0xfc0007fc, 0x7c000364, Op_B, " %{B}" }, { "sthux", 0xfc0007fe, 0x7c00036e, Op_S | Op_A | Op_B, " %{S},%{A0}%{B}" }, - { "or", 0xfc0007fe, 0x7c000378, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "or", 0xfc0007fe, 0x7c000378, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "divdu", 0xfc0003fe, 0x7c000392, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{S},%{A},%{B}" }, { "divwu", 0xfc0003fe, 0x7c000396, Op_D | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{S},%{A},%{B}" }, { "mtspr", 0xfc0007fe, 0x7c0003a6, Op_S | Op_spr, " %{spr},%{S}" }, { "dcbi", 0xfc0007fe, 0x7c0003ac, Op_A | Op_B, " %{A0}%{B}" }, - { "nand", 0xfc0007fe, 0x7c0003b8, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "nand", 0xfc0007fe, 0x7c0003b8, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "divd", 0xfc0003fe, 0x7c0003d2, Op_S | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{S},%{A},%{B}" }, { "divw", 0xfc0003fe, 0x7c0003d6, Op_S | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{S},%{A},%{B}" }, { "slbia", 0xfc0003fe, 0x7c0003e4, Op_S | Op_A | Op_B | Op_OE | Op_Rc, "%{OE}%{RC} %{S},%{A},%{B}" }, @@ -404,8 +404,8 @@ const struct opcode opcodes_1f[] = { { "lswx", 0xfc0007fe, 0x7c00042a, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "lwbrx", 0xfc0007fe, 0x7c00042c, Op_D | Op_A | Op_B, " %{D},%{A0}%{B}" }, { "lfsx", 0xfc0007fe, 0x7c00042e, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, - { "srw", 0xfc0007fe, 0x7c000430, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, - { "srd", 0xfc0007fe, 0x7c000436, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, + { "srw", 0xfc0007fe, 0x7c000430, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, + { "srd", 0xfc0007fe, 0x7c000436, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "tlbsync", 0xffffffff, 0x7c00046c, 0, "" }, { "lfsux", 0xfc0007fe, 0x7c00046e, Op_D | Op_A | Op_B, " %{D},%{A},%{B}" }, { "mfsr", 0xfc0007fe, 0x7c0004a6, Op_D | Op_SR, " %{D},%{SR}" }, @@ -425,15 +425,15 @@ const struct opcode opcodes_1f[] = { { "sraw", 0xfc0007fe, 0x7c000630, Op_S | Op_A | Op_B, " %{A},%{S},%{B}" }, { "srad", 0xfc0007fe, 0x7c000634, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{S},%{B}" }, { "srawi", 0xfc0007fe, 0x7c000670, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{A},%{SH}" }, - { "sradi", 0xfc0007fc, 0x7c000674, Op_S | Op_A | Op_sh, " %{S},%{A},%{sh}" }, + { "sradi", 0xfc0007fc, 0x7c000674, Op_S | Op_A | Op_sh, " %{A},%{S},%{sh}" }, { "eieio", 0xfc0007fe, 0x7c0006ac, 0, "" }, /* MASK? */ { "sthbrx", 0xfc0007fe, 0x7c00072c, Op_S | Op_A | Op_B, " %{S},%{A0}%{B}" }, - { "extsh", 0xfc0007fe, 0x7c000734, Op_S | Op_A | Op_B | Op_Rc, "%{RC} %{S},%{A},%{B}" }, - { "extsb", 0xfc0007fe, 0x7c000774, Op_S | Op_A | Op_Rc, "%{RC} %{S},%{A}" }, + { "extsh", 0xfc0007fe, 0x7c000734, Op_S | Op_A | Op_Rc, "%{RC} %{A},%{S}" }, + { "extsb", 0xfc0007fe, 0x7c000774, Op_S | Op_A | Op_Rc, "%{RC} %{A},%{S}" }, { "icbi", 0xfc0007fe, 0x7c0007ac, Op_A | Op_B, " %{A0}%{B}" }, { "stfiwx", 0xfc0007fe, 0x7c0007ae, Op_S | Op_A | Op_B, " %{S},%{A0}%{B}" }, - { "extsw", 0xfc0007fe, 0x7c0007b4, Op_S | Op_A | Op_Rc, "%{RC} %{S},%{A}" }, + { "extsw", 0xfc0007fe, 0x7c0007b4, Op_S | Op_A | Op_Rc, "%{RC} %{A},%{S}" }, { "dcbz", 0xfc0007fe, 0x7c0007ec, Op_A | Op_B, " %{A0}%{B}" }, { "", 0x0, 0x0, 0, } }; |