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authorTobias Weingartner <weingart@cvs.openbsd.org>2009-06-03 00:41:49 +0000
committerTobias Weingartner <weingart@cvs.openbsd.org>2009-06-03 00:41:49 +0000
commitb5fa513bde74bcf77645d2952017c89627b3acd7 (patch)
treeddbb0853312f006ed31d90f3f018241026b4ceb5 /sys/arch
parent9344e01007aa99035ba2b121731c3e4a13df06f7 (diff)
Nuke CYRIX_CACHE (and related defines). They've not been used in a long
time. Beginning of refactoring cpu identification. ok kettenis@
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/i386/i386/locore.s46
-rw-r--r--sys/arch/i386/i386/machdep.c13
2 files changed, 3 insertions, 56 deletions
diff --git a/sys/arch/i386/i386/locore.s b/sys/arch/i386/i386/locore.s
index 3e884db386a..9e2b80afeb4 100644
--- a/sys/arch/i386/i386/locore.s
+++ b/sys/arch/i386/i386/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.125 2009/01/17 23:44:46 guenther Exp $ */
+/* $OpenBSD: locore.s,v 1.126 2009/06/03 00:41:48 weingart Exp $ */
/* $NetBSD: locore.s,v 1.145 1996/05/03 19:41:19 christos Exp $ */
/*-
@@ -363,7 +363,6 @@ trycyrix486:
jne 2f # yes; must not be Cyrix CPU
movl $CPU_486DLC,RELOC(_C_LABEL(cpu)) # set CPU type
-#ifndef CYRIX_CACHE_WORKS
/* Disable caching of the ISA hole only. */
invd
movb $CCR0,%al # Configuration Register index (CCR0)
@@ -376,49 +375,6 @@ trycyrix486:
movb %ah,%al
outb %al,$0x23
invd
-#else /* CYRIX_CACHE_WORKS */
- /* Set cache parameters */
- invd # Start with guaranteed clean cache
- movb $CCR0,%al # Configuration Register index (CCR0)
- outb %al,$0x22
- inb $0x23,%al
- andb $~CCR0_NC0,%al
-#ifndef CYRIX_CACHE_REALLY_WORKS
- orb $(CCR0_NC1|CCR0_BARB),%al
-#else
- orb $CCR0_NC1,%al
-#endif
- movb %al,%ah
- movb $CCR0,%al
- outb %al,$0x22
- movb %ah,%al
- outb %al,$0x23
- /* clear non-cacheable region 1 */
- movb $(NCR1+2),%al
- outb %al,$0x22
- movb $NCR_SIZE_0K,%al
- outb %al,$0x23
- /* clear non-cacheable region 2 */
- movb $(NCR2+2),%al
- outb %al,$0x22
- movb $NCR_SIZE_0K,%al
- outb %al,$0x23
- /* clear non-cacheable region 3 */
- movb $(NCR3+2),%al
- outb %al,$0x22
- movb $NCR_SIZE_0K,%al
- outb %al,$0x23
- /* clear non-cacheable region 4 */
- movb $(NCR4+2),%al
- outb %al,$0x22
- movb $NCR_SIZE_0K,%al
- outb %al,$0x23
- /* enable caching in CR0 */
- movl %cr0,%eax
- andl $~(CR0_CD|CR0_NW),%eax
- movl %eax,%cr0
- invd
-#endif /* CYRIX_CACHE_WORKS */
jmp 2f
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index d8e31a76965..b255c2bf145 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.450 2009/06/01 20:11:38 weingart Exp $ */
+/* $OpenBSD: machdep.c,v 1.451 2009/06/03 00:41:48 weingart Exp $ */
/* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */
/*-
@@ -1841,17 +1841,8 @@ identifycpu(struct cpu_info *ci)
ci->cpu_class = class;
- if (cpu == CPU_486DLC) {
-#ifndef CYRIX_CACHE_WORKS
+ if (cpu == CPU_486DLC)
printf("WARNING: CYRIX 486DLC CACHE UNCHANGED.\n");
-#else
-#ifndef CYRIX_CACHE_REALLY_WORKS
- printf("WARNING: CYRIX 486DLC CACHE ENABLED IN HOLD-FLUSH MODE.\n");
-#else
- printf("WARNING: CYRIX 486DLC CACHE ENABLED.\n");
-#endif
-#endif
- }
/*
* Enable ring 0 write protection (486 or above, but 386