diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2003-09-26 22:27:27 +0000 |
---|---|---|
committer | Miod Vallat <miod@cvs.openbsd.org> | 2003-09-26 22:27:27 +0000 |
commit | d3f25f1811396611cea824838cc490b863fc88d6 (patch) | |
tree | 76d2e0c993000308f00bd9895a7bcb728765a463 /sys/arch | |
parent | 17738dcbee8bacfd8a68cd4375820c4947ff55d6 (diff) |
Death to the bitfields, this time cmmu_apr_t and batc_entry_t. In the
process, remove duplicate batc defines.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/mvme88k/include/cmmu.h | 5 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/m88110.h | 44 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/m8820x.h | 5 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/mmu.h | 65 | ||||
-rw-r--r-- | sys/arch/mvme88k/include/pmap.h | 10 | ||||
-rw-r--r-- | sys/arch/mvme88k/mvme88k/m88110.c | 161 | ||||
-rw-r--r-- | sys/arch/mvme88k/mvme88k/m8820x.c | 78 | ||||
-rw-r--r-- | sys/arch/mvme88k/mvme88k/pmap.c | 81 |
8 files changed, 146 insertions, 303 deletions
diff --git a/sys/arch/mvme88k/include/cmmu.h b/sys/arch/mvme88k/include/cmmu.h index 54e0fd5e418..368e3191b0c 100644 --- a/sys/arch/mvme88k/include/cmmu.h +++ b/sys/arch/mvme88k/include/cmmu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cmmu.h,v 1.12 2003/09/16 20:52:19 miod Exp $ */ +/* $OpenBSD: cmmu.h,v 1.13 2003/09/26 22:27:25 miod Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1992 Carnegie Mellon University @@ -93,8 +93,7 @@ struct cmmu_p { void (*cmmu_flush_remote_tlb_func)(unsigned, unsigned, vm_offset_t, int); void (*cmmu_flush_tlb_func)(unsigned, vm_offset_t, int); void (*cmmu_pmap_activate_func)(unsigned, unsigned, - batc_template_t i_batc[BATC_MAX], - batc_template_t d_batc[BATC_MAX]); + u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]); void (*cmmu_flush_remote_cache_func)(int, vm_offset_t, int); void (*cmmu_flush_cache_func)(vm_offset_t, int); void (*cmmu_flush_remote_inst_cache_func)(int, vm_offset_t, int); diff --git a/sys/arch/mvme88k/include/m88110.h b/sys/arch/mvme88k/include/m88110.h index ac660553a4a..bcd4b0436b1 100644 --- a/sys/arch/mvme88k/include/m88110.h +++ b/sys/arch/mvme88k/include/m88110.h @@ -1,13 +1,8 @@ -/* $OpenBSD: m88110.h,v 1.13 2003/08/20 20:33:44 miod Exp $ */ +/* $OpenBSD: m88110.h,v 1.14 2003/09/26 22:27:25 miod Exp $ */ #ifndef __MACHINE_M88110_H__ #define __MACHINE_M88110_H__ -#include <uvm/uvm_extern.h> -#ifndef _LOCORE -# include <machine/mmu.h> /* batc_template_t */ -#endif - /* * 88110 CMMU definitions */ @@ -42,8 +37,8 @@ #define CMMU_ICMD_INV_LINE 0x005 /* Invalidate Inst Cache Line */ #define CMMU_ICMD_PRB_SUPR 0x008 /* MMU Probe Supervisor */ #define CMMU_ICMD_PRB_USER 0x009 /* MMU Probe User */ -#define CMMU_ICMD_INV_SATC 0x00A /* Invalidate All Supervisor ATCs */ -#define CMMU_ICMD_INV_UATC 0x00B /* Invalidate All User ATCs */ +#define CMMU_ICMD_INV_SATC 0x00a /* Invalidate All Supervisor ATCs */ +#define CMMU_ICMD_INV_UATC 0x00b /* Invalidate All User ATCs */ #define CMMU_ICTL_DID 0x8000 /* Double instruction disable */ #define CMMU_ICTL_PREN 0x4000 /* Branch Prediction Enable */ @@ -116,26 +111,16 @@ #define CMMU_INST 0 /* definitions for use of the BATC */ -#define BATC_512K (0x00 << 19) -#define BATC_1M (0x01 << 19) -#define BATC_2M (0x03 << 19) -#define BATC_4M (0x07 << 19) -#define BATC_8M (0x0F << 19) -#define BATC_16M (0x1F << 19) -#define BATC_32M (0x3F << 19) -#define BATC_64M (0x7F << 19) -#define BATC_ADDR_MASK 0xFFF80000 -#define BATC_ADDR_SHIFT 13 -#define BATC_LBA_SHIFT 19 -#define BATC_PBA_SHIFT 6 -#define BATC_SU 0x20 -#define BATC_WT 0x10 -#define BATC_G 0x08 -#define BATC_CI 0x04 -#define BATC_WP 0x02 -#define BATC_V 0x01 - -#define CLINE_MASK 0x1F +#define BATC_512K (0x00 << BATC_BLKSHIFT) +#define BATC_1M (0x01 << BATC_BLKSHIFT) +#define BATC_2M (0x03 << BATC_BLKSHIFT) +#define BATC_4M (0x07 << BATC_BLKSHIFT) +#define BATC_8M (0x0f << BATC_BLKSHIFT) +#define BATC_16M (0x1f << BATC_BLKSHIFT) +#define BATC_32M (0x3f << BATC_BLKSHIFT) +#define BATC_64M (0x7f << BATC_BLKSHIFT) + +#define CLINE_MASK 0x1f #define CLINE_SIZE (8 * 32) #ifndef _LOCORE @@ -161,8 +146,7 @@ void m88110_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned); void m88110_cmmu_flush_remote_tlb(unsigned, unsigned, vm_offset_t, int); void m88110_cmmu_flush_tlb(unsigned, vm_offset_t, int); void m88110_cmmu_pmap_activate(unsigned, unsigned, - batc_template_t i_batc[BATC_MAX], - batc_template_t d_batc[BATC_MAX]); + u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]); void m88110_cmmu_flush_remote_cache(int, vm_offset_t, int); void m88110_cmmu_flush_cache(vm_offset_t, int); void m88110_cmmu_flush_remote_inst_cache(int, vm_offset_t, int); diff --git a/sys/arch/mvme88k/include/m8820x.h b/sys/arch/mvme88k/include/m8820x.h index e30ffcee6c2..552f280dfff 100644 --- a/sys/arch/mvme88k/include/m8820x.h +++ b/sys/arch/mvme88k/include/m8820x.h @@ -1,4 +1,4 @@ -/* $OpenBSD: m8820x.h,v 1.6 2002/03/14 01:26:39 millert Exp $ */ +/* $OpenBSD: m8820x.h,v 1.7 2003/09/26 22:27:25 miod Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1992 Carnegie Mellon University @@ -145,8 +145,7 @@ void m8820x_cmmu_set_pair_batc_entry(unsigned, unsigned, unsigned); void m8820x_cmmu_flush_remote_tlb(unsigned, unsigned, vm_offset_t, int); void m8820x_cmmu_flush_tlb(unsigned, vm_offset_t, int); void m8820x_cmmu_pmap_activate(unsigned, unsigned, - batc_template_t i_batc[BATC_MAX], - batc_template_t d_batc[BATC_MAX]); + u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]); void m8820x_cmmu_flush_remote_cache(int, vm_offset_t, int); void m8820x_cmmu_flush_cache(vm_offset_t, int); void m8820x_cmmu_flush_remote_inst_cache(int, vm_offset_t, int); diff --git a/sys/arch/mvme88k/include/mmu.h b/sys/arch/mvme88k/include/mmu.h index e887e8a63c3..283f87bcb68 100644 --- a/sys/arch/mvme88k/include/mmu.h +++ b/sys/arch/mvme88k/include/mmu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mmu.h,v 1.20 2003/09/07 13:52:17 miod Exp $ */ +/* $OpenBSD: mmu.h,v 1.21 2003/09/26 22:27:25 miod Exp $ */ /* * This file bears almost no resemblance to the original m68k file, @@ -65,33 +65,18 @@ #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) /* cache control bits */ -#define CACHE_DFL 0x0000000 -#define CACHE_INH 0x0000040 /* cache inhibit */ -#define CACHE_GLOBAL 0x0000080 /* global scope */ -#define CACHE_WT 0x0000200 /* write through */ +#define CACHE_DFL 0x00000000 +#define CACHE_INH 0x00000040 /* cache inhibit */ +#define CACHE_GLOBAL 0x00000080 /* global scope */ +#define CACHE_WT 0x00000200 /* write through */ -#define CACHE_MASK (~(CACHE_INH | CACHE_GLOBAL | CACHE_WT)) +#define CACHE_MASK (CACHE_INH | CACHE_GLOBAL | CACHE_WT) /* * Area descriptors */ -typedef struct cmmu_apr { - unsigned long - st_base:20, /* segment table base address */ - rsvA:2, /* reserved */ - wt:1, /* writethrough (cache control) */ - rsvB:1, /* reserved */ - g:1, /* global (cache control) */ - ci:1, /* cache inhibit */ - rsvC:5, /* reserved */ - te:1; /* translation enable */ -} cmmu_apr_t; - -typedef union apr_template { - cmmu_apr_t field; - unsigned long bits; -} apr_template_t; +#define APR_V 0x00000001 /* valid bit */ /* * 88200 PATC (TLB) @@ -103,22 +88,13 @@ typedef union apr_template { * BATC entries */ -typedef struct { - unsigned long - lba:13, /* logical block address */ - pba:13, /* physical block address */ - sup:1, /* supervisor mode bit */ - wt:1, /* writethrough (cache control) */ - g:1, /* global (cache control) */ - ci:1, /* cache inhibit */ - wp:1, /* write protect */ - v:1; /* valid */ -} batc_entry_t; - -typedef union batc_template { - batc_entry_t field; - unsigned long bits; -} batc_template_t; +#define BATC_V 0x00000001 +#define BATC_PROT 0x00000002 +#define BATC_INH 0x00000004 +#define BATC_GLOBAL 0x00000008 +#define BATC_WT 0x00000010 +#define BATC_SO 0x00000020 + /* * Segment table entries @@ -251,6 +227,10 @@ typedef u_int32_t pt_ind_entry_t; /* number of BATC entries */ #define BATC_MAX 8 +/* physical and logical block address */ +#define BATC_PSHIFT 6 +#define BATC_VSHIFT (BATC_PSHIFT + (32 - BATC_BLKSHIFT)) + #define BATC_BLK_ALIGNED(x) ((x & BATC_BLKMASK) == 0) #define M88K_BTOBLK(x) (x >> BATC_BLKSHIFT) @@ -264,15 +244,6 @@ typedef u_int32_t pt_ind_entry_t; void dma_cachectl(vm_offset_t, int, int); -/* - * Alignment checks for pages (must lie on page boundaries). - */ - -#define PAGE_ALIGNED(ad) (((vm_offset_t)(ad) & PAGE_MASK) == 0) -#define CHECK_PAGE_ALIGN(ad,who) \ - if (!PAGE_ALIGNED(ad)) \ - printf("%s: addr %x not page aligned.\n", who, ad) - unsigned invalidate_pte(pt_entry_t *); extern vm_offset_t kmapva; diff --git a/sys/arch/mvme88k/include/pmap.h b/sys/arch/mvme88k/include/pmap.h index 116c14c1c91..83aa964865e 100644 --- a/sys/arch/mvme88k/include/pmap.h +++ b/sys/arch/mvme88k/include/pmap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.h,v 1.29 2003/01/24 09:57:41 miod Exp $ */ +/* $OpenBSD: pmap.h,v 1.30 2003/09/26 22:27:25 miod Exp $ */ /* * Mach Operating System * Copyright (c) 1991 Carnegie Mellon University @@ -15,8 +15,8 @@ #ifndef _MACHINE_PMAP_H_ #define _MACHINE_PMAP_H_ -#include <machine/mmu.h> /* batc_template_t, BATC_MAX, etc.*/ -#include <machine/pcb.h> /* pcb_t, etc.*/ +#include <machine/mmu.h> +#include <machine/pcb.h> /* * PMAP structure @@ -34,8 +34,8 @@ struct pmap { u_int32_t pm_cpus; #ifdef PMAP_USE_BATC - batc_template_t pm_ibatc[BATC_MAX]; /* instruction BATCs */ - batc_template_t pm_dbatc[BATC_MAX]; /* data BATCs */ + u_int32_t pm_ibatc[BATC_MAX]; /* instruction BATCs */ + u_int32_t pm_dbatc[BATC_MAX]; /* data BATCs */ #endif }; diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c index d9c26fbcfc6..35bb220c4d4 100644 --- a/sys/arch/mvme88k/mvme88k/m88110.c +++ b/sys/arch/mvme88k/mvme88k/m88110.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110.c,v 1.8 2003/09/16 20:46:11 miod Exp $ */ +/* $OpenBSD: m88110.c,v 1.9 2003/09/26 22:27:26 miod Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * All rights reserved. @@ -59,9 +59,9 @@ #include <sys/param.h> #include <sys/types.h> +#include <sys/systm.h> #include <sys/simplelock.h> #include <machine/board.h> -#include <machine/cpus.h> #include <machine/cpu_number.h> #include <machine/cmmu.h> #include <machine/locore.h> @@ -84,23 +84,8 @@ unsigned int debuglevel = 0; #define STATIC static #endif /* DDB */ -/* kernel copy of PATC entries */ -unsigned patc_data_u[32]; -unsigned patc_data_l[32]; -unsigned patc_inst_u[32]; -unsigned patc_inst_l[32]; - -#define INST 0 -#define DATA 1 -#define BOTH 2 -#define KERN 1 -#define USER 0 - /* FORWARDS */ -void patc_insert(unsigned upper, unsigned lower, int which); void patc_clear(void); -void patc_sync(int which); -void patc_load(int index, unsigned upper, unsigned lower, int which); void m88110_cmmu_sync_cache(vm_offset_t physaddr, int size); void m88110_cmmu_sync_inval_cache(vm_offset_t physaddr, int size); void m88110_cmmu_inval_cache(vm_offset_t physaddr, int size); @@ -141,118 +126,32 @@ struct cmmu_p cmmu88110 = { }; void -patc_load(int index, unsigned upper, unsigned lower, int which) -{ -#ifdef DEBUG - if (index > 31) - panic("invalid PATC index %d!", index); -#endif - - index = index << 5; - switch (which) { - case INST: - set_iir(index); - set_ippu(upper); - set_ippl(lower); - break; - case DATA: - set_dir(index); - set_dppu(upper); - set_dppl(lower); - break; -#ifdef DEBUG - default: - panic("invalid PATC! Choose DATA or INST..."); -#endif - } -} - -void -patc_sync(int which) -{ - int i; - - switch (which) { - case BOTH: - for (i = 0; i < 32; i++) { - patc_load(i, patc_data_u[i], patc_data_l[i], DATA); - patc_load(i, patc_inst_u[i], patc_inst_l[i], INST); - } - break; - case INST: - for (i = 0; i < 32; i++) { - patc_load(i, patc_inst_u[i], patc_inst_l[i], INST); - } - break; - case DATA: - for (i = 0; i < 32; i++) { - patc_load(i, patc_data_u[i], patc_data_l[i], DATA); - } - break; - } -} - -void patc_clear(void) { int i; for (i = 0; i < 32; i++) { - patc_data_u[i] = 0; - patc_data_l[i] = 0; - patc_inst_u[i] = 0; - patc_inst_l[i] = 0; - } - patc_sync(BOTH); -} + set_dir(i << 5); + set_dppu(0); + set_dppl(0); -/* implement a FIFO on the PATC entries */ -void -patc_insert(unsigned upper, unsigned lower, int which) -{ - int i; - - switch(which) { - case INST: - for (i = 31; i > 0; i--) { - patc_inst_u[i] = patc_inst_u[i - 1]; - patc_inst_l[i] = patc_inst_l[i - 1]; - } - patc_inst_u[0] = upper; - patc_inst_l[0] = lower; - patc_sync(INST); - break; - case DATA: - for (i = 31; i > 0; i--) { - patc_data_u[i] = patc_data_u[i - 1]; - patc_data_l[i] = patc_data_l[i - 1]; - } - patc_data_u[0] = upper; - patc_data_l[0] = lower; - patc_sync(DATA); - break; -#ifdef DEBUG - case BOTH: - panic("patc_insert(): can't insert both INST and DATA."); -#endif + set_iir(i << 5); + set_ippu(0); + set_ippl(0); } } void m88110_show_apr(unsigned value) { - union apr_template apr_template; - - apr_template.bits = value; - - printf("table @ 0x%x000", apr_template.field.st_base); - if (apr_template.field.wt) + printf("table @ 0x%x000", PG_PFNUM(value)); + if (value & CACHE_WT) printf(", writethrough"); - if (apr_template.field.g) + if (value & CACHE_GLOBAL) printf(", global"); - if (apr_template.field.ci) + if (value & CACHE_INH) printf(", cache inhibit"); - if (apr_template.field.te) + if (value & APR_V) printf(", valid"); else printf(", not valid"); @@ -545,14 +444,14 @@ m88110_cmmu_flush_tlb(unsigned kernel, vm_offset_t vaddr, int size) */ void m88110_cmmu_pmap_activate(unsigned cpu, unsigned uapr, - batc_template_t i_batc[BATC_MAX], batc_template_t d_batc[BATC_MAX]) + u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]) { m88110_cmmu_set_uapr(uapr); /* for (entry_no = 0; entry_no < 8; entry_no++) { - m88110_cmmu_set_batc_entry(cpu, entry_no, 0, i_batc[entry_no].bits); - m88110_cmmu_set_batc_entry(cpu, entry_no, 1, d_batc[entry_no].bits); + m88110_cmmu_set_batc_entry(cpu, entry_no, 0, i_batc[entry_no]); + m88110_cmmu_set_batc_entry(cpu, entry_no, 1, d_batc[entry_no]); } */ /* @@ -793,30 +692,28 @@ m88110_cmmu_show_translation(unsigned address, /******* INTERPRET AREA DESCRIPTOR *********/ { - union apr_template apr_template; - apr_template.bits = value; if (verbose_flag > 1) { DEBUG_MSG(" %cAPR is 0x%08x\n", - supervisor_flag ? 'S' : 'U', apr_template.bits); + supervisor_flag ? 'S' : 'U', value); } DEBUG_MSG(" %cAPR: SegTbl: 0x%x000p", - supervisor_flag ? 'S' : 'U', apr_template.field.st_base); - if (apr_template.field.wt) DEBUG_MSG(", WTHRU"); - else DEBUG_MSG(", !wthru"); - if (apr_template.field.g) DEBUG_MSG(", GLOBAL"); - else DEBUG_MSG(", !global"); - if (apr_template.field.ci) DEBUG_MSG(", $INHIBIT"); - else DEBUG_MSG(", $ok"); - if (apr_template.field.te) DEBUG_MSG(", VALID"); - else DEBUG_MSG(", !valid"); - DEBUG_MSG(".\n"); + supervisor_flag ? 'S' : 'U', PG_PFNUM(value)); + if (value & CACHE_WT) + DEBUG_MSG(", WTHRU"); + if (value & CACHE_GLOBAL) + DEBUG_MSG(", GLOBAL"); + if (value & CACHE_INH) + DEBUG_MSG(", INHIBIT"); + if (value & APR_V) + DEBUG_MSG(", VALID"); + DEBUG_MSG("\n"); /* if not valid, done now */ - if (apr_template.field.te == 0) { + if ((value & APR_V) == 0) { DEBUG_MSG("<would report an error, valid bit not set>\n"); return; } - value = apr_template.field.st_base << PG_BITS; /* now point to seg page */ + value &= PG_FRAME; /* now point to seg page */ } /* translate value from physical to virtual */ diff --git a/sys/arch/mvme88k/mvme88k/m8820x.c b/sys/arch/mvme88k/mvme88k/m8820x.c index 532e5bf4098..ac85e887cd7 100644 --- a/sys/arch/mvme88k/mvme88k/m8820x.c +++ b/sys/arch/mvme88k/mvme88k/m8820x.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m8820x.c,v 1.18 2003/09/16 20:53:41 miod Exp $ */ +/* $OpenBSD: m8820x.c,v 1.19 2003/09/26 22:27:26 miod Exp $ */ /* * Copyright (c) 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -220,15 +220,15 @@ void m8820x_show_apr(value) unsigned value; { - union apr_template apr_template; - apr_template.bits = value; - - printf("table @ 0x%x000", apr_template.field.st_base); - if (apr_template.field.wt) printf(", writethrough"); - if (apr_template.field.g) printf(", global"); - if (apr_template.field.ci) printf(", cache inhibit"); - if (apr_template.field.te) printf(", valid"); - else printf(", not valid"); + printf("table @ 0x%x000", PG_PFNUM(value)); + if (value & CACHE_WT) + printf(", writethrough"); + if (value & CACHE_GLOBAL) + printf(", global"); + if (value & CACHE_INH) + printf(", cache inhibit"); + if (value & APR_V) + printf(", valid"); printf("\n"); } @@ -1216,8 +1216,8 @@ m8820x_cmmu_flush_tlb(kernel, vaddr, size) void m8820x_cmmu_pmap_activate(cpu, uapr, i_batc, d_batc) unsigned cpu, uapr; - batc_template_t i_batc[BATC_MAX]; - batc_template_t d_batc[BATC_MAX]; + u_int32_t i_batc[BATC_MAX]; + u_int32_t d_batc[BATC_MAX]; { int entry_no; CMMU_LOCK; @@ -1227,13 +1227,13 @@ m8820x_cmmu_pmap_activate(cpu, uapr, i_batc, d_batc) cpu, 0, CMMU_ACS_USER, 0); for (entry_no = 0; entry_no < BATC_MAX; entry_no++) { - m8820x_cmmu_set(CMMU_BWP(entry_no), i_batc[entry_no].bits, MODE_VAL|ACCESS_VAL, - cpu, INST_CMMU, CMMU_ACS_USER, 0); - m8820x_cmmu_set(CMMU_BWP(entry_no), d_batc[entry_no].bits, MODE_VAL|ACCESS_VAL, - cpu, DATA_CMMU, CMMU_ACS_USER, 0); + m8820x_cmmu_set(CMMU_BWP(entry_no), i_batc[entry_no], + MODE_VAL | ACCESS_VAL, cpu, INST_CMMU, CMMU_ACS_USER, 0); + m8820x_cmmu_set(CMMU_BWP(entry_no), d_batc[entry_no], + MODE_VAL | ACCESS_VAL, cpu, DATA_CMMU, CMMU_ACS_USER, 0); #ifdef SHADOW_BATC - CMMU(cpu,INST_CMMU)->batc[entry_no] = i_batc[entry_no].bits; - CMMU(cpu,DATA_CMMU)->batc[entry_no] = d_batc[entry_no].bits; + CMMU(cpu,INST_CMMU)->batc[entry_no] = i_batc[entry_no]; + CMMU(cpu,DATA_CMMU)->batc[entry_no] = d_batc[entry_no]; #endif } @@ -1717,7 +1717,7 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) page_offset:PG_BITS; } field; } virtual_address; - unsigned value; + u_int32_t value; if (verbose_flag) DEBUG_MSG("-------------------------------------------\n"); @@ -1727,8 +1727,7 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) /****** ACCESS PROPER CMMU or THREAD ***********/ #if 0 /* no thread */ if (thread != 0) { - /* the following tidbit from _pmap_activate in m88k/pmap.c */ - register apr_template_t apr_data; + /* the following tidbit from pmap_activate() */ supervisor_flag = 0; /* thread implies user */ if (thread->task == 0) { @@ -1748,13 +1747,8 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) "pmap %x is locked]\n", thread, thread->task, thread->task->map, thread->task->map->pmap); } - apr_data.bits = 0; - apr_data.field.st_base = atop(thread->task->map->pmap->sdt_paddr); - apr_data.field.wt = 0; - apr_data.field.g = 1; - apr_data.field.ci = 0; - apr_data.field.te = 1; - value = apr_data.bits; + value = CACHE_GLOBAL | APR_V | + (atop(thread->task->map->pmap->sdt_paddr) << PG_SHIFT); if (verbose_flag) { DEBUG_MSG("[thread %x task %x map %x pmap %x UAPR is %x]\n", thread, thread->task, thread->task->map, @@ -1867,8 +1861,6 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) /******* INTERPRET AREA DESCRIPTOR *********/ { - union apr_template apr_template; - apr_template.bits = value; if (verbose_flag > 1) { DEBUG_MSG("CMMU#%d", cmmu_num); #if 0 @@ -1878,7 +1870,7 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) DEBUG_MSG("THREAD %x", thread); #endif /* 0 */ DEBUG_MSG(" %cAPR is 0x%08x\n", - supervisor_flag ? 'S' : 'U', apr_template.bits); + supervisor_flag ? 'S' : 'U', value); } DEBUG_MSG("CMMU#%d", cmmu_num); #if 0 @@ -1888,25 +1880,25 @@ m8820x_cmmu_show_translation(address, supervisor_flag, verbose_flag, cmmu_num) DEBUG_MSG("THREAD %x", thread); #endif /* 0 */ DEBUG_MSG(" %cAPR: SegTbl: 0x%x000p", - supervisor_flag ? 'S' : 'U', apr_template.field.st_base); - if (apr_template.field.wt) DEBUG_MSG(", WTHRU"); - else DEBUG_MSG(", !wthru"); - if (apr_template.field.g) DEBUG_MSG(", GLOBAL"); - else DEBUG_MSG(", !global"); - if (apr_template.field.ci) DEBUG_MSG(", $INHIBIT"); - else DEBUG_MSG(", $ok"); - if (apr_template.field.te) DEBUG_MSG(", VALID"); - else DEBUG_MSG(", !valid"); - DEBUG_MSG(".\n"); + supervisor_flag ? 'S' : 'U', PG_PFNUM(value)); + if (value & CACHE_WT) + DEBUG_MSG(", WTHRU"); + if (value & CACHE_GLOBAL) + DEBUG_MSG(", GLOBAL"); + if (value & CACHE_INH) + DEBUG_MSG(", INHIBIT"); + if (value & APR_V) + DEBUG_MSG(", VALID"); + DEBUG_MSG("\n"); /* if not valid, done now */ - if (apr_template.field.te == 0) { + if ((value & APR_V) == 0) { DEBUG_MSG("<would report an error, valid bit not set>\n"); return; } - value = apr_template.field.st_base << PG_BITS; /* now point to seg page */ + value &= PG_FRAME; /* now point to seg page */ } /* translate value from physical to virtual */ diff --git a/sys/arch/mvme88k/mvme88k/pmap.c b/sys/arch/mvme88k/mvme88k/pmap.c index 07e090ec2ef..224ad007046 100644 --- a/sys/arch/mvme88k/mvme88k/pmap.c +++ b/sys/arch/mvme88k/mvme88k/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.76 2003/09/19 23:12:22 miod Exp $ */ +/* $OpenBSD: pmap.c,v 1.77 2003/09/26 22:27:26 miod Exp $ */ /* * Copyright (c) 2001, 2002, 2003 Miodrag Vallat * Copyright (c) 1998-2001 Steve Murphree, Jr. @@ -110,7 +110,21 @@ extern vaddr_t virtual_avail, virtual_end; #define CD_ALL 0x0FFFFFC int pmap_con_dbg = CD_NONE; -#endif /* DEBUG */ + +/* + * Alignment checks for pages (must lie on page boundaries). + */ + +#define PAGE_ALIGNED(ad) (((vm_offset_t)(ad) & PAGE_MASK) == 0) +#define CHECK_PAGE_ALIGN(ad,who) \ + if (!PAGE_ALIGNED(ad)) \ + printf("%s: addr %x not page aligned.\n", who, ad) + +#else /* DEBUG */ + +#define CHECK_PAGE_ALIGN(ad,who) + +#endif /* DEBUG */ struct pool pmappool, pvpool; @@ -462,7 +476,7 @@ pmap_map(vaddr_t virt, paddr_t start, paddr_t end, vm_prot_t prot, u_int cmode) pt_entry_t template, *pte; paddr_t page; #ifdef PMAP_USE_BATC - batc_template_t batctmp; + u_int32_t batctmp; int i; #endif @@ -480,17 +494,15 @@ pmap_map(vaddr_t virt, paddr_t start, paddr_t end, vm_prot_t prot, u_int cmode) template = m88k_protection(kernel_pmap, prot) | cmode | PG_V; #ifdef PMAP_USE_BATC - batctmp.bits = 0; - batctmp.field.sup = 1; /* supervisor */ + batctmp = BATC_SO | BATC_V; if (template & CACHE_WT) - batctmp.field.wt = 1; /* write through */ + batctmp |= BATC_WT; if (template & CACHE_GLOBAL) - batctmp.field.g = 1; /* global */ + batctmp |= BATC_GLOBAL; if (template & CACHE_INH) - batctmp.field.ci = 1; /* cache inhibit */ + batctmp |= BATC_INH; if (template & PG_PROT) - batctmp.field.wp = 1; /* protection */ - batctmp.field.v = 1; /* valid */ + batctmp |= BATC_PROT; #endif page = trunc_page(start); @@ -513,17 +525,17 @@ pmap_map(vaddr_t virt, paddr_t start, paddr_t end, vm_prot_t prot, u_int cmode) /* * map by BATC */ - batctmp.field.lba = M88K_BTOBLK(virt); - batctmp.field.pba = M88K_BTOBLK(page); + batctmp |= M88K_BTOBLK(virt) << BATC_VSHIFT; + batctmp |= M88K_BTOBLK(page) << BATC_PSHIFT; for (i = 0; i < MAX_CPUS; i++) if (cpu_sets[i]) cmmu_set_pair_batc_entry(i, batc_used, - batctmp.bits); - batc_entry[batc_used] = batctmp.field; + batctmp); + batc_entry[batc_used] = batctmp; #ifdef DEBUG if ((pmap_con_dbg & (CD_MAP | CD_NORM)) == (CD_MAP | CD_NORM)) { - printf("(pmap_map: %x) BATC used=%d, data=%x\n", curproc, batc_used, batctmp.bits); + printf("(pmap_map: %x) BATC used=%d, data=%x\n", curproc, batc_used, batctmp); } if (pmap_con_dbg & CD_MAP) for (i = 0; i < BATC_BLKBYTES; i += PAGE_SIZE) { @@ -594,7 +606,7 @@ pmap_cache_ctrl(pmap_t pmap, vaddr_t s, vaddr_t e, u_int mode) u_int users; #ifdef DEBUG - if (mode & CACHE_MASK) { + if ((mode & CACHE_MASK) != mode) { printf("(cache_ctrl) illegal mode %x\n",mode); return; } @@ -630,7 +642,7 @@ pmap_cache_ctrl(pmap_t pmap, vaddr_t s, vaddr_t e, u_int mode) * the modified bit and/or the reference bit by any other cpu. * XXX */ - *pte = (invalidate_pte(pte) & CACHE_MASK) | mode; + *pte = (invalidate_pte(pte) & ~CACHE_MASK) | mode; flush_atc_entry(users, va, kflush); /* @@ -699,7 +711,7 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end, sdt_entry_t *kmap; vaddr_t vaddr, virt, kernel_pmap_size, pdt_size; paddr_t s_text, e_text, kpdt_phys; - apr_template_t apr_data; + u_int32_t apr_data; pt_entry_t *pte; int i; pmap_table_t ptable; @@ -709,8 +721,6 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end, if ((pmap_con_dbg & (CD_BOOT | CD_NORM)) == (CD_BOOT | CD_NORM)) { printf("pmap_bootstrap: \"load_start\" 0x%x\n", load_start); } -#endif -#ifdef DIAGNOSTIC if (!PAGE_ALIGNED(load_start)) panic("pmap_bootstrap: \"load_start\" not on the m88k page boundary: 0x%x", load_start); #endif @@ -1003,21 +1013,16 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end, * Switch to using new page tables */ - apr_data.bits = 0; - apr_data.field.st_base = atop(kernel_pmap->pm_stpa); - apr_data.field.wt = 1; - apr_data.field.g = 1; - apr_data.field.ci = 0; - apr_data.field.te = 1; /* Translation enable */ + apr_data = (atop(kernel_pmap->pm_stpa) << PG_SHIFT) | CACHE_WT | APR_V; #ifdef DEBUG if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) { - show_apr(apr_data.bits); + show_apr(apr_data); } #endif /* Invalidate entire kernel TLB. */ #ifdef DEBUG if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) { - printf("invalidating tlb %x\n", apr_data.bits); + printf("invalidating tlb %x\n", apr_data); } #endif @@ -1036,7 +1041,7 @@ pmap_bootstrap(vaddr_t load_start, paddr_t *phys_start, paddr_t *phys_end, pte = pmap_pte(kernel_pmap, phys_map_vaddr2); *pte = PG_NV; /* Load supervisor pointer to segment table. */ - cmmu_remote_set_sapr(i, apr_data.bits); + cmmu_remote_set_sapr(i, apr_data); #ifdef DEBUG if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) { printf("Processor %d running virtual.\n", i); @@ -1181,11 +1186,11 @@ pmap_create(void) (paddr_t *)&pmap->pm_stpa) == FALSE) panic("pmap_create: pmap_extract failed!"); +#ifdef DEBUG if (!PAGE_ALIGNED(pmap->pm_stpa)) panic("pmap_create: sdt_table 0x%x not aligned on page boundary", (int)pmap->pm_stpa); -#ifdef DEBUG if ((pmap_con_dbg & (CD_CREAT | CD_NORM)) == (CD_CREAT | CD_NORM)) { printf("(pmap_create: %x) pmap=0x%p, pm_stab=0x%x, pm_stpa=0x%x\n", curproc, pmap, pmap->pm_stab, pmap->pm_stpa); @@ -2423,7 +2428,7 @@ pmap_collect(pmap_t pmap) void pmap_activate(struct proc *p) { - apr_template_t apr_data; + u_int32_t apr_data; pmap_t pmap = vm_map_pmap(&p->p_vmspace->vm_map); int cpu = cpu_number(); @@ -2442,12 +2447,8 @@ pmap_activate(struct proc *p) */ simple_lock(&pmap->pm_lock); - apr_data.bits = 0; - apr_data.field.st_base = atop(pmap->pm_stpa); - apr_data.field.wt = 0; - apr_data.field.g = 1; - apr_data.field.ci = 0; - apr_data.field.te = 1; + apr_data = (atop(pmap->pm_stpa) << PG_SHIFT) | + CACHE_GLOBAL | APR_V; #ifdef PMAP_USE_BATC /* @@ -2456,12 +2457,12 @@ pmap_activate(struct proc *p) * ABOUT THE BATC ENTRIES, THE SUPERVISOR TLBs SHOULB BE * FLUSHED AS WELL. */ - cmmu_pmap_activate(cpu, apr_data.bits, - pmap->pm_ibatc, pmap->pm_dbatc); + cmmu_pmap_activate(cpu, apr_data, + pmap->pm_ibatc, pmap->pm_dbatc); for (n = 0; n < BATC_MAX; n++) *(register_t *)&batc_entry[n] = pmap->pm_ibatc[n].bits; #else - cmmu_set_uapr(apr_data.bits); + cmmu_set_uapr(apr_data); cmmu_flush_tlb(FALSE, 0, -1); #endif /* PMAP_USE_BATC */ |