s/PSW_/PSL_/ to match other archs

6 files changed, 68 insertions, 68 deletions

diff --git a/sys/arch/hppa/hppa/autoconf.c b/sys/arch/hppa/hppa/autoconf.c
index 54f08f38f7a..018ac157c05 100644
--- a/sys/arch/hppa/hppa/autoconf.c
+++ b/sys/arch/hppa/hppa/autoconf.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.c,v 1.21 2002/09/23 06:11:47 mickey Exp $	*/
+/*	$OpenBSD: autoconf.c,v 1.22 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998-2001 Michael Shalayeff
@@ -69,7 +69,7 @@ int findblkmajor(struct device *dv);
 const char *findblkname(int maj);
 
 void (*cold_hook)(int); /* see below */
-register_t	kpsw = PSW_Q | PSW_P | PSW_C | PSW_D;
+register_t	kpsw = PSL_Q | PSL_P | PSL_C | PSL_D;
 
 /*
  * LED blinking thing
@@ -94,8 +94,8 @@ cpu_configure()
 		panic("no mainbus found");
 
 	/* in spl*() we trust */
-	__asm __volatile("ssm %0, %%r0" :: "i" (PSW_I));
-	kpsw |= PSW_I;
+	__asm __volatile("ssm %0, %%r0" :: "i" (PSL_I));
+	kpsw |= PSL_I;
 	spl0();
 
 	setroot();
diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S
index f0996721e0b..fcf790e46db 100644
--- a/sys/arch/hppa/hppa/locore.S
+++ b/sys/arch/hppa/hppa/locore.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.S,v 1.90 2002/10/07 14:38:34 mickey Exp $	*/
+/*	$OpenBSD: locore.S,v 1.91 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998-2002 Michael Shalayeff
@@ -220,7 +220,7 @@ $start_zero_tf
 	ldil	L%$qisnowon, rp
 	ldo	R%$qisnowon(rp), rp
 	b	$kernel_setup
-	ldi	PSW_Q|PSW_I, arg2
+	ldi	PSL_Q|PSL_I, arg2
 
 $qisnowon
 	/*
@@ -433,7 +433,7 @@ pdc_call_unmapped1
 	nop
 
 	copy	arg0, t4
-	ldi	PSW_Q, arg0 /* (!pdc_flag && args[0] == PDC_PIM)? PSW_M:0) */
+	ldi	PSL_Q, arg0 /* (!pdc_flag && args[0] == PDC_PIM)? PSL_M:0) */
 	break	HPPA_BREAK_KERNEL, HPPA_BREAK_SET_PSW
 	nop
 	stw	ret0, HPPA_FRAME_ARG(23)(sp)
@@ -1710,7 +1710,7 @@ EXIT(desidhash_t)
  * ibtlb_l(int i, pa_space_t sp, vaddr_t va, paddr_t pa, vsize_t sz, u_int prot)
  */
 LEAF_ENTRY(ibtlb_l)
-	rsm	(PSW_R|PSW_I), t4
+	rsm	(PSL_R|PSL_I), t4
 	nop ! nop ! nop ! nop ! nop ! nop ! nop
 
 	bv	0(rp)
@@ -1738,7 +1738,7 @@ EXIT(hpti_l)
  */
 LEAF_ENTRY(pbtlb_l)
 	; DR_PAGE0
-	rsm	(PSW_R|PSW_I), t4
+	rsm	(PSL_R|PSL_I), t4
 	nop ! nop ! nop ! nop
 	ldil	L%0xc041, t1
 	ldo	R%0xc041(t1), t1
@@ -1798,7 +1798,7 @@ ENTRY(TLABEL(hpmc),0)
 	ldo	R%hpmc_dump(rp), rp
 	ldil	L%kpsw, %arg2
 	ldw	R%kpsw(%arg2), %arg2
-	depi	0, PSW_I_POS, 1, %arg2
+	depi	0, PSL_I_POS, 1, %arg2
 	stw	%arg2, R%kpsw(t1)
 	ldil	L%emrg_stack, arg1
 	b	$kernel_setup
@@ -1830,7 +1830,7 @@ ENTRY(hppa_toc,0)
 	ldo	R%boot(rp), rp
 	ldil	L%kpsw, %arg2
 	ldw	R%kpsw(%arg2), %arg2
-	depi	0, PSW_I_POS, 1, %arg2
+	depi	0, PSL_I_POS, 1, %arg2
 	stw	%arg2, R%kpsw(t1)
 	ldi	0, arg0
 	ldil	L%emrg_stack, arg1
@@ -1858,7 +1858,7 @@ ENTRY(hppa_pfr,0)
 	ldo	R%boot(rp), rp
 	ldil	L%kpsw, %arg2
 	ldw	R%kpsw(%arg2), %arg2
-	depi	0, PSW_I_POS, 1, %arg2
+	depi	0, PSL_I_POS, 1, %arg2
 	stw	%arg2, R%kpsw(t1)
 	ldi	RB_HALT|RB_POWERDOWN, arg0
 	ldil	L%emrg_stack, arg1
diff --git a/sys/arch/hppa/hppa/machdep.c b/sys/arch/hppa/hppa/machdep.c
index 6d1edb83f3e..f2d8d0387e5 100644
--- a/sys/arch/hppa/hppa/machdep.c
+++ b/sys/arch/hppa/hppa/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.83 2002/10/07 14:42:07 mickey Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.84 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1999-2002 Michael Shalayeff
@@ -1306,9 +1306,9 @@ sys_sigreturn(p, v, retval)
 	    copyin((caddr_t)scp, (caddr_t)&ksc, sizeof ksc))
 		return (EINVAL);
 
-#define PSW_MBS (PSW_C|PSW_Q|PSW_P|PSW_D|PSW_I)
-#define PSW_MBZ (PSW_Y|PSW_Z|PSW_S|PSW_X|PSW_M|PSW_R)
-	if ((ksc.sc_ps & (PSW_MBS|PSW_MBZ)) != PSW_MBS)
+#define PSL_MBS (PSL_C|PSL_Q|PSL_P|PSL_D|PSL_I)
+#define PSL_MBZ (PSL_Y|PSL_Z|PSL_S|PSL_X|PSL_M|PSL_R)
+	if ((ksc.sc_ps & (PSL_MBS|PSL_MBZ)) != PSL_MBS)
 		return (EINVAL);
 
 	if (ksc.sc_onstack)
diff --git a/sys/arch/hppa/hppa/vm_machdep.c b/sys/arch/hppa/hppa/vm_machdep.c
index de507e3eb57..608e4e22ebb 100644
--- a/sys/arch/hppa/hppa/vm_machdep.c
+++ b/sys/arch/hppa/hppa/vm_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: vm_machdep.c,v 1.43 2002/10/07 14:38:34 mickey Exp $	*/
+/*	$OpenBSD: vm_machdep.c,v 1.44 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1999-2002 Michael Shalayeff
@@ -200,7 +200,7 @@ cpu_fork(p1, p2, stack, stacksize, func, arg)
 	 */
 	tf->tf_sr7 = HPPA_SID_KERNEL;
 	tf->tf_eiem = ~0;
-	tf->tf_ipsw = PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I /* | PSW_L */;
+	tf->tf_ipsw = PSL_C | PSL_Q | PSL_P | PSL_D | PSL_I /* | PSL_L */;
 
 	/*
 	 * Set up return value registers as libc:fork() expects
diff --git a/sys/arch/hppa/include/db_machdep.h b/sys/arch/hppa/include/db_machdep.h
index 4951a23fb47..410ba34c1ee 100644
--- a/sys/arch/hppa/include/db_machdep.h
+++ b/sys/arch/hppa/include/db_machdep.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_machdep.h,v 1.8 2002/03/15 21:44:18 mickey Exp $	*/
+/*	$OpenBSD: db_machdep.h,v 1.9 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998-2002 Michael Shalayeff
@@ -92,8 +92,8 @@ static __inline int inst_trap_return(u_int ins)	{
 }
 
 #if 0
-#define db_clear_single_step(r)	((r)->tf_flags &= ~(PSW_Z))
-#define db_set_single_step(r)	((r)->tf_flags |= (PSW_Z))
+#define db_clear_single_step(r)	((r)->tf_flags &= ~(PSL_Z))
+#define db_set_single_step(r)	((r)->tf_flags |= (PSL_Z))
 #else
 #define	SOFTWARE_SSTEP		1
 #define	SOFTWARE_SSTEP_EMUL	1
diff --git a/sys/arch/hppa/include/psl.h b/sys/arch/hppa/include/psl.h
index 3c47e2041c2..39a8ffd7f2c 100644
--- a/sys/arch/hppa/include/psl.h
+++ b/sys/arch/hppa/include/psl.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: psl.h,v 1.6 1999/11/25 18:29:01 mickey Exp $	*/
+/*	$OpenBSD: psl.h,v 1.7 2002/10/07 15:32:37 mickey Exp $	*/
 
 /*
  * Copyright (c) 1999 Michael Shalayeff
@@ -43,64 +43,64 @@
 /*
  * Processor Status Word Bit Positions (in PA-RISC bit order)
  */
-#define	PSW_Y_POS	(0)
-#define	PSW_Z_POS	(1)
-#define	PSW_SS_POS	(3)	/* Reserved, Software-defined */
-#define	PSW_E_POS	(5)
-#define	PSW_S_POS	(6)
-#define	PSW_T_POS	(7)
-#define	PSW_H_POS	(8)
-#define	PSW_L_POS	(9)
-#define	PSW_N_POS	(10)
-#define	PSW_X_POS	(11)
-#define	PSW_B_POS	(12)
-#define	PSW_C_POS	(13)
-#define	PSW_V_POS	(14)
-#define	PSW_M_POS	(15)
-#define	PSW_CB_POS	(16)
-#define	PSW_G_POS	(25)
-#define	PSW_F_POS	(26)
-#define	PSW_R_POS	(27)
-#define	PSW_Q_POS	(28)
-#define	PSW_P_POS	(29)
-#define	PSW_D_POS	(30)
-#define	PSW_I_POS	(31)
+#define	PSL_Y_POS	(0)
+#define	PSL_Z_POS	(1)
+#define	PSL_SS_POS	(3)	/* Reserved, Software-defined */
+#define	PSL_E_POS	(5)
+#define	PSL_S_POS	(6)
+#define	PSL_T_POS	(7)
+#define	PSL_H_POS	(8)
+#define	PSL_L_POS	(9)
+#define	PSL_N_POS	(10)
+#define	PSL_X_POS	(11)
+#define	PSL_B_POS	(12)
+#define	PSL_C_POS	(13)
+#define	PSL_V_POS	(14)
+#define	PSL_M_POS	(15)
+#define	PSL_CB_POS	(16)
+#define	PSL_G_POS	(25)
+#define	PSL_F_POS	(26)
+#define	PSL_R_POS	(27)
+#define	PSL_Q_POS	(28)
+#define	PSL_P_POS	(29)
+#define	PSL_D_POS	(30)
+#define	PSL_I_POS	(31)
 
-#define	PSW_BITS	"\020\001I\002D\003P\004Q\005R\006F\007G"  \
+#define	PSL_BITS	"\020\001I\002D\003P\004Q\005R\006F\007G"  \
 			"\021M\022V\023C\024B\025X\026N\027L\030H" \
 			"\031T\032S\033E\037Z\040Y"
 
 /*
  * Processor Status Word Bit Values
  */
-#define	PSW_Y	(1 << (31-PSW_Y_POS))	/* Data Debug Trap Disable */
-#define	PSW_Z	(1 << (31-PSW_Z_POS))	/* Instruction Debug Trap Disable */
-#define	PSW_SS	(1 << (31-PSW_SS_POS))	/* Reserved; Software Single-Step */
-#define	PSW_E	(1 << (31-PSW_E_POS))	/* Little Endian Memory Access Enable */
-#define	PSW_S	(1 << (31-PSW_S_POS))	/* Secure Interval Timer */
-#define	PSW_T	(1 << (31-PSW_T_POS))	/* Taken Branch Trap Enable */
-#define	PSW_H	(1 << (31-PSW_H_POS))	/* Higher-privilege Transfer Trap Enable */
-#define	PSW_L	(1 << (31-PSW_L_POS))	/* Lower-privilege Transfer Trap Enable */
-#define	PSW_N	(1 << (31-PSW_N_POS))	/* Nullify */
-#define	PSW_X	(1 << (31-PSW_X_POS))	/* Data Memory Break Disable */
-#define	PSW_B	(1 << (31-PSW_B_POS))	/* Taken Branch */
-#define	PSW_C	(1 << (31-PSW_C_POS))	/* Instruction Address Translation Enable */
-#define	PSW_V	(1 << (31-PSW_V_POS))	/* Divide Step Correction */
-#define	PSW_M	(1 << (31-PSW_M_POS))	/* High-priority Machine Check Mask */
-#define	PSW_CB	(1 << (31-PSW_CB_POS))	/* Carry/Borrow Bits */
-#define	PSW_G	(1 << (31-PSW_G_POS))	/* Debug Trap Enable */
-#define	PSW_F	(1 << (31-PSW_F_POS))	/* Perfomance Monitor Interrupt Unmask */
-#define	PSW_R	(1 << (31-PSW_R_POS))	/* Recover Counter Enable */
-#define	PSW_Q	(1 << (31-PSW_Q_POS))	/* Interrupt State Collection Enable */
-#define	PSW_P	(1 << (31-PSW_P_POS))	/* Protection Identifier Validation Enable */
-#define	PSW_D	(1 << (31-PSW_D_POS))	/* Data Adress Translation Enable */
-#define	PSW_I	(1 << (31-PSW_I_POS))	/* External Interrupt, Power Failure
+#define	PSL_Y	(1 << (31-PSL_Y_POS))	/* Data Debug Trap Disable */
+#define	PSL_Z	(1 << (31-PSL_Z_POS))	/* Instruction Debug Trap Disable */
+#define	PSL_SS	(1 << (31-PSL_SS_POS))	/* Reserved; Software Single-Step */
+#define	PSL_E	(1 << (31-PSL_E_POS))	/* Little Endian Memory Access Enable */
+#define	PSL_S	(1 << (31-PSL_S_POS))	/* Secure Interval Timer */
+#define	PSL_T	(1 << (31-PSL_T_POS))	/* Taken Branch Trap Enable */
+#define	PSL_H	(1 << (31-PSL_H_POS))	/* Higher-privilege Transfer Trap Enable */
+#define	PSL_L	(1 << (31-PSL_L_POS))	/* Lower-privilege Transfer Trap Enable */
+#define	PSL_N	(1 << (31-PSL_N_POS))	/* Nullify */
+#define	PSL_X	(1 << (31-PSL_X_POS))	/* Data Memory Break Disable */
+#define	PSL_B	(1 << (31-PSL_B_POS))	/* Taken Branch */
+#define	PSL_C	(1 << (31-PSL_C_POS))	/* Instruction Address Translation Enable */
+#define	PSL_V	(1 << (31-PSL_V_POS))	/* Divide Step Correction */
+#define	PSL_M	(1 << (31-PSL_M_POS))	/* High-priority Machine Check Mask */
+#define	PSL_CB	(1 << (31-PSL_CB_POS))	/* Carry/Borrow Bits */
+#define	PSL_G	(1 << (31-PSL_G_POS))	/* Debug Trap Enable */
+#define	PSL_F	(1 << (31-PSL_F_POS))	/* Perfomance Monitor Interrupt Unmask */
+#define	PSL_R	(1 << (31-PSL_R_POS))	/* Recover Counter Enable */
+#define	PSL_Q	(1 << (31-PSL_Q_POS))	/* Interrupt State Collection Enable */
+#define	PSL_P	(1 << (31-PSL_P_POS))	/* Protection Identifier Validation Enable */
+#define	PSL_D	(1 << (31-PSL_D_POS))	/* Data Adress Translation Enable */
+#define	PSL_I	(1 << (31-PSL_I_POS))	/* External Interrupt, Power Failure
 					   Interrupt, and Low-Priority Machine
 					   Check Interrupt unmask */
 
 /*
  * Frequently Used PSW Values
  */
-#define	RESET_PSW	(PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I)
+#define	RESET_PSL	(PSL_R | PSL_Q | PSL_P | PSL_D | PSL_I)
 
 #endif  /* _MACHINE_PSL_H_ */