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authorAlexandre Ratchov <ratchov@cvs.openbsd.org>2010-06-07 23:35:25 +0000
committerAlexandre Ratchov <ratchov@cvs.openbsd.org>2010-06-07 23:35:25 +0000
commit70facb8307224a9045933d4777f2fcfc34197391 (patch)
tree8b00044692ec97e409cfe1c963c6746418a17312 /sys/dev/eisa/eisa.c
parent9aa567ba6ab3da2fa00ce5a84f8e5d4c31eaa0a5 (diff)
Fix various problems of auich on SiS 7012 based chips:
- rework auich_halt_pipe() and use it to ensure AUICH_RR is set only after DMA is halted (spec says to do so) - rework auich_calibrate(): clear interrupt and event bits in AUICH_STS and ensure CIV counter is not changed. - in the interrupt handler, set LVI to (qptr - 1) rather than the max value (bug introduced by previous commit) All fixes are from Christopher Zimmermann <madroach at zakweb.de>, Thanks! tested on two different intel-based auich devices, ok jakemsr
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