ansi, no binary change.

ok reyk@

1 files changed, 115 insertions, 298 deletions

diff --git a/sys/dev/ic/ar5211.c b/sys/dev/ic/ar5211.c
index 8ff066b1425..e14969c9b94 100644
--- a/sys/dev/ic/ar5211.c
+++ b/sys/dev/ic/ar5211.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ar5211.c,v 1.20 2005/08/14 11:02:33 miod Exp $	*/
+/*	$OpenBSD: ar5211.c,v 1.21 2005/09/10 14:36:46 jsg Exp $	*/
 
 /*
  * Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -45,8 +45,7 @@ static const struct ar5k_ar5211_ini_rf ar5211_rf[] =
 AR5K_HAL_FUNCTIONS(extern, ar5k_ar5211,);
 
 const void
-ar5k_ar5211_fill(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_fill(struct ath_hal *hal)
 {
 	hal->ah_magic = AR5K_AR5211_MAGIC;
 
@@ -179,12 +178,8 @@ ar5k_ar5211_fill(hal)
 }
 
 struct ath_hal *
-ar5k_ar5211_attach(device, sc, st, sh, status)
-	u_int16_t device;
-	void *sc;
-	bus_space_tag_t st;
-	bus_space_handle_t sh;
-	int *status;
+ar5k_ar5211_attach(u_int16_t device, void *sc, bus_space_tag_t st,
+    bus_space_handle_t sh, int *status)
 {
 	struct ath_hal *hal = (struct ath_hal*) sc;
 	u_int8_t mac[IEEE80211_ADDR_LEN];
@@ -225,9 +220,7 @@ ar5k_ar5211_attach(device, sc, st, sh, status)
 }
 
 HAL_BOOL
-ar5k_ar5211_nic_reset(hal, val)
-	struct ath_hal *hal;
-	u_int32_t val;
+ar5k_ar5211_nic_reset(struct ath_hal *hal, u_int32_t val)
 {
 	HAL_BOOL ret = AH_FALSE;
 	u_int32_t mask = val ? val : ~0;
@@ -261,9 +254,7 @@ ar5k_ar5211_nic_reset(hal, val)
 }
 
 HAL_BOOL
-ar5k_ar5211_nic_wakeup(hal, flags)
-	struct ath_hal *hal;
-	u_int16_t flags;
+ar5k_ar5211_nic_wakeup(struct ath_hal *hal, u_int16_t flags)
 {
 	u_int32_t turbo, mode, clock;
 
@@ -337,9 +328,7 @@ ar5k_ar5211_nic_wakeup(hal, flags)
 }
 
 u_int16_t
-ar5k_ar5211_radio_revision(hal, chip)
-	struct ath_hal *hal;
-	HAL_CHIP chip;
+ar5k_ar5211_radio_revision(struct ath_hal *hal, HAL_CHIP chip)
 {
 	int i;
 	u_int32_t srev;
@@ -377,9 +366,7 @@ ar5k_ar5211_radio_revision(hal, chip)
 }
 
 const HAL_RATE_TABLE *
-ar5k_ar5211_get_rate_table(hal, mode)
-	struct ath_hal *hal;
-	u_int mode;
+ar5k_ar5211_get_rate_table(struct ath_hal *hal, u_int mode)
 {
 	switch (mode) {
 	case HAL_MODE_11A:
@@ -399,8 +386,7 @@ ar5k_ar5211_get_rate_table(hal, mode)
 }
 
 void
-ar5k_ar5211_detach(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_detach(struct ath_hal *hal)
 {
 	/*
 	 * Free HAL structure, assume interrupts are down
@@ -409,12 +395,8 @@ ar5k_ar5211_detach(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_reset(hal, op_mode, channel, change_channel, status)
-	struct ath_hal *hal;
-	HAL_OPMODE op_mode;
-	HAL_CHANNEL *channel;
-	HAL_BOOL change_channel;
-	HAL_STATUS *status;
+ar5k_ar5211_reset(struct ath_hal *hal, HAL_OPMODE op_mode, HAL_CHANNEL *channel,
+    HAL_BOOL change_channel, HAL_STATUS *status)
 {
 	struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
 	u_int8_t mac[IEEE80211_ADDR_LEN];
@@ -665,8 +647,7 @@ ar5k_ar5211_reset(hal, op_mode, channel, change_channel, status)
 }
 
 void
-ar5k_ar5211_set_opmode(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_set_opmode(struct ath_hal *hal)
 {
 	u_int32_t pcu_reg, low_id, high_id;
 
@@ -704,9 +685,7 @@ ar5k_ar5211_set_opmode(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_calibrate(hal, channel)
-	struct ath_hal *hal;
-	HAL_CHANNEL *channel;
+ar5k_ar5211_calibrate(struct ath_hal *hal, HAL_CHANNEL *channel)
 {
 	u_int32_t i_pwr, q_pwr;
 	int32_t iq_corr, i_coff, i_coffd, q_coff, q_coffd;
@@ -748,9 +727,7 @@ ar5k_ar5211_calibrate(hal, channel)
  */
 
 HAL_BOOL
-ar5k_ar5211_update_tx_triglevel(hal, increase)
-	struct ath_hal *hal;
-	HAL_BOOL increase;
+ar5k_ar5211_update_tx_triglevel(struct ath_hal *hal, HAL_BOOL increase)
 {
 	u_int32_t trigger_level, imr;
 	HAL_BOOL status = AH_FALSE;
@@ -787,10 +764,8 @@ ar5k_ar5211_update_tx_triglevel(hal, increase)
 }
 
 int
-ar5k_ar5211_setup_tx_queue(hal, queue_type, queue_info)
-	struct ath_hal *hal;
-	HAL_TX_QUEUE queue_type;
-	const HAL_TXQ_INFO *queue_info;
+ar5k_ar5211_setup_tx_queue(struct ath_hal *hal, HAL_TX_QUEUE queue_type,
+    const HAL_TXQ_INFO *queue_info)
 {
 	u_int queue;
 
@@ -830,10 +805,8 @@ ar5k_ar5211_setup_tx_queue(hal, queue_type, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5211_setup_tx_queueprops(hal, queue, queue_info)
-	struct ath_hal *hal;
-	int queue;
-	const HAL_TXQ_INFO *queue_info;
+ar5k_ar5211_setup_tx_queueprops(struct ath_hal *hal, int queue,
+    const HAL_TXQ_INFO *queue_info)
 {
 	AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
 
@@ -852,9 +825,7 @@ ar5k_ar5211_setup_tx_queueprops(hal, queue, queue_info)
 }
 
 HAL_BOOL
-ar5k_ar5211_release_tx_queue(hal, queue)
-	struct ath_hal *hal;
-	u_int queue;
+ar5k_ar5211_release_tx_queue(struct ath_hal *hal, u_int queue)
 {
 	AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
 
@@ -866,9 +837,7 @@ ar5k_ar5211_release_tx_queue(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_reset_tx_queue(hal, queue)
-	struct ath_hal *hal;
-	u_int queue;
+ar5k_ar5211_reset_tx_queue(struct ath_hal *hal, u_int queue)
 {
 	u_int32_t cw_min, cw_max, retry_lg, retry_sh;
 	struct ieee80211_channel *channel = (struct ieee80211_channel*)
@@ -1044,9 +1013,7 @@ ar5k_ar5211_reset_tx_queue(hal, queue)
 }
 
 u_int32_t
-ar5k_ar5211_get_tx_buf(hal, queue)
-	struct ath_hal *hal;
-	u_int queue;
+ar5k_ar5211_get_tx_buf(struct ath_hal *hal, u_int queue)
 {
 	AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
 
@@ -1057,10 +1024,7 @@ ar5k_ar5211_get_tx_buf(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_put_tx_buf(hal, queue, phys_addr)
-	struct ath_hal *hal;
-	u_int queue;
-	u_int32_t phys_addr;
+ar5k_ar5211_put_tx_buf(struct ath_hal *hal, u_int queue, u_int32_t phys_addr)
 {
 	AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
 
@@ -1077,9 +1041,7 @@ ar5k_ar5211_put_tx_buf(hal, queue, phys_addr)
 }
 
 HAL_BOOL
-ar5k_ar5211_tx_start(hal, queue)
-	struct ath_hal *hal;
-	u_int queue;
+ar5k_ar5211_tx_start(struct ath_hal *hal, u_int queue)
 {
 	AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
 
@@ -1094,9 +1056,7 @@ ar5k_ar5211_tx_start(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_stop_tx_dma(hal, queue)
-	struct ath_hal *hal;
-	u_int queue;
+ar5k_ar5211_stop_tx_dma(struct ath_hal *hal, u_int queue)
 {
 	int i = 100, pending;
 
@@ -1120,22 +1080,10 @@ ar5k_ar5211_stop_tx_dma(hal, queue)
 }
 
 HAL_BOOL
-ar5k_ar5211_setup_tx_desc(hal, desc, packet_length, header_length, type,
-    tx_power, tx_rate0, tx_tries0, key_index, antenna_mode, flags, rtscts_rate,
-    rtscts_duration)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
-	u_int packet_length;
-	u_int header_length;
-	HAL_PKT_TYPE type;
-	u_int tx_power;
-	u_int tx_rate0;
-	u_int tx_tries0;
-	u_int key_index;
-	u_int antenna_mode;
-	u_int flags;
-	u_int rtscts_rate;
-	u_int rtscts_duration;
+ar5k_ar5211_setup_tx_desc(struct ath_hal *hal, struct ath_desc *desc,
+    u_int packet_length, u_int header_length, HAL_PKT_TYPE type, u_int tx_power,
+    u_int tx_rate0, u_int tx_tries0, u_int key_index, u_int antenna_mode,
+    u_int flags, u_int rtscts_rate, u_int rtscts_duration)
 {
 	struct ar5k_ar5211_tx_desc *tx_desc;
 
@@ -1185,12 +1133,8 @@ ar5k_ar5211_setup_tx_desc(hal, desc, packet_length, header_length, type,
 }
 
 HAL_BOOL
-ar5k_ar5211_fill_tx_desc(hal, desc, segment_length, first_segment, last_segment)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
-	u_int segment_length;
-	HAL_BOOL first_segment;
-	HAL_BOOL last_segment;
+ar5k_ar5211_fill_tx_desc(struct ath_hal *hal, struct ath_desc *desc,
+    u_int segment_length, HAL_BOOL first_segment, HAL_BOOL last_segment)
 {
 	struct ar5k_ar5211_tx_desc *tx_desc;
 
@@ -1214,24 +1158,15 @@ ar5k_ar5211_fill_tx_desc(hal, desc, segment_length, first_segment, last_segment)
 }
 
 HAL_BOOL
-ar5k_ar5211_setup_xtx_desc(hal, desc, tx_rate1, tx_tries1, tx_rate2, tx_tries2,
-    tx_rate3, tx_tries3)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
-	u_int tx_rate1;
-	u_int tx_tries1;
-	u_int tx_rate2;
-	u_int tx_tries2;
-	u_int tx_rate3;
-	u_int tx_tries3;
+ar5k_ar5211_setup_xtx_desc(struct ath_hal *hal, struct ath_desc *desc,
+    u_int tx_rate1, u_int tx_tries1, u_int tx_rate2, u_int tx_tries2,
+    u_int tx_rate3, u_int tx_tries3)
 {
 	return (AH_FALSE);
 }
 
 HAL_STATUS
-ar5k_ar5211_proc_tx_desc(hal, desc)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
+ar5k_ar5211_proc_tx_desc(struct ath_hal *hal, struct ath_desc *desc)
 {
 	struct ar5k_ar5211_tx_status *tx_status;
 	struct ar5k_ar5211_tx_desc *tx_desc;
@@ -1286,8 +1221,7 @@ ar5k_ar5211_proc_tx_desc(hal, desc)
 }
 
 HAL_BOOL
-ar5k_ar5211_has_veol(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_has_veol(struct ath_hal *hal)
 {
 	return (AH_TRUE);
 }
@@ -1297,30 +1231,25 @@ ar5k_ar5211_has_veol(hal)
  */
 
 u_int32_t
-ar5k_ar5211_get_rx_buf(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_rx_buf(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_RXDP));
 }
 
 void
-ar5k_ar5211_put_rx_buf(hal, phys_addr)
-	struct ath_hal *hal;
-	u_int32_t phys_addr;
+ar5k_ar5211_put_rx_buf(struct ath_hal *hal, u_int32_t phys_addr)
 {
 	AR5K_REG_WRITE(AR5K_AR5211_RXDP, phys_addr);
 }
 
 void
-ar5k_ar5211_start_rx(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_start_rx(struct ath_hal *hal)
 {
 	AR5K_REG_WRITE(AR5K_AR5211_CR, AR5K_AR5211_CR_RXE);
 }
 
 HAL_BOOL
-ar5k_ar5211_stop_rx_dma(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_stop_rx_dma(struct ath_hal *hal)
 {
 	int i;
 
@@ -1338,24 +1267,20 @@ ar5k_ar5211_stop_rx_dma(hal)
 }
 
 void
-ar5k_ar5211_start_rx_pcu(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_start_rx_pcu(struct ath_hal *hal)
 {
 	AR5K_REG_DISABLE_BITS(AR5K_AR5211_DIAG_SW, AR5K_AR5211_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5211_stop_pcu_recv(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_stop_pcu_recv(struct ath_hal *hal)
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5211_DIAG_SW, AR5K_AR5211_DIAG_SW_DIS_RX);
 }
 
 void
-ar5k_ar5211_set_mcast_filter(hal, filter0, filter1)
-	struct ath_hal *hal;
-	u_int32_t filter0;
-	u_int32_t filter1;
+ar5k_ar5211_set_mcast_filter(struct ath_hal *hal, u_int32_t filter0,
+    u_int32_t filter1)
 {
 	/* Set the multicat filter */
 	AR5K_REG_WRITE(AR5K_AR5211_MCAST_FIL0, filter0);
@@ -1363,9 +1288,7 @@ ar5k_ar5211_set_mcast_filter(hal, filter0, filter1)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_mcast_filterindex(hal, index)
-	struct ath_hal *hal;
-	u_int32_t index;
+ar5k_ar5211_set_mcast_filterindex(struct ath_hal *hal, u_int32_t index)
 {
 	if (index >= 64) {
 	    return (AH_FALSE);
@@ -1381,9 +1304,7 @@ ar5k_ar5211_set_mcast_filterindex(hal, index)
 }
 
 HAL_BOOL
-ar5k_ar5211_clear_mcast_filter_idx(hal, index)
-	struct ath_hal *hal;
-	u_int32_t index;
+ar5k_ar5211_clear_mcast_filter_idx(struct ath_hal *hal, u_int32_t index)
 {
 
 	if (index >= 64) {
@@ -1400,26 +1321,20 @@ ar5k_ar5211_clear_mcast_filter_idx(hal, index)
 }
 
 u_int32_t
-ar5k_ar5211_get_rx_filter(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_rx_filter(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_RX_FILTER));
 }
 
 void
-ar5k_ar5211_set_rx_filter(hal, filter)
-	struct ath_hal *hal;
-	u_int32_t filter;
+ar5k_ar5211_set_rx_filter(struct ath_hal *hal, u_int32_t filter)
 {
 	AR5K_REG_WRITE(AR5K_AR5211_RX_FILTER, filter);
 }
 
 HAL_BOOL
-ar5k_ar5211_setup_rx_desc(hal, desc, size, flags)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
-	u_int32_t size;
-	u_int flags;
+ar5k_ar5211_setup_rx_desc(struct ath_hal *hal, struct ath_desc *desc,
+    u_int32_t size, u_int flags)
 {
 	struct ar5k_ar5211_rx_desc *rx_desc;
 
@@ -1436,11 +1351,8 @@ ar5k_ar5211_setup_rx_desc(hal, desc, size, flags)
 }
 
 HAL_STATUS
-ar5k_ar5211_proc_rx_desc(hal, desc, phys_addr, next)
-	struct ath_hal *hal;
-	struct ath_desc *desc;
-	u_int32_t phys_addr;
-	struct ath_desc *next;
+ar5k_ar5211_proc_rx_desc(struct ath_hal *hal, struct ath_desc *desc,
+    u_int32_t phys_addr, struct ath_desc *next)
 {
 	struct ar5k_ar5211_rx_status *rx_status;
 
@@ -1508,8 +1420,7 @@ ar5k_ar5211_proc_rx_desc(hal, desc, phys_addr, next)
 }
 
 void
-ar5k_ar5211_set_rx_signal(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_set_rx_signal(struct ath_hal *hal)
 {
 	/* Signal state monitoring is not yet supported */
 }
@@ -1519,8 +1430,7 @@ ar5k_ar5211_set_rx_signal(hal)
  */
 
 void
-ar5k_ar5211_dump_state(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_dump_state(struct ath_hal *hal)
 {
 #ifdef AR5K_DEBUG
 #define AR5K_PRINT_REGISTER(_x)						\
@@ -1609,12 +1519,8 @@ ar5k_ar5211_dump_state(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_get_diag_state(hal, id, device, size)
-	struct ath_hal *hal;
-	int id;
-	void **device;
-	u_int *size;
-
+ar5k_ar5211_get_diag_state(struct ath_hal *hal, int id, void **device,
+    u_int *size)
 {
 	/*
 	 * We'll ignore this right now. This seems to be some kind of an obscure
@@ -1624,17 +1530,13 @@ ar5k_ar5211_get_diag_state(hal, id, device, size)
 }
 
 void
-ar5k_ar5211_get_lladdr(hal, mac)
-	struct ath_hal *hal;
-	u_int8_t *mac;
+ar5k_ar5211_get_lladdr(struct ath_hal *hal, u_int8_t *mac)
 {
 	bcopy(hal->ah_sta_id, mac, IEEE80211_ADDR_LEN);
 }
 
 HAL_BOOL
-ar5k_ar5211_set_lladdr(hal, mac)
-	struct ath_hal *hal;
-	const u_int8_t *mac;
+ar5k_ar5211_set_lladdr(struct ath_hal *hal, const u_int8_t *mac)
 {
 	u_int32_t low_id, high_id;
 
@@ -1652,11 +1554,8 @@ ar5k_ar5211_set_lladdr(hal, mac)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_regdomain(hal, regdomain, status)
-	struct ath_hal *hal;
-	u_int16_t regdomain;
-	HAL_STATUS *status;
-
+ar5k_ar5211_set_regdomain(struct ath_hal *hal, u_int16_t regdomain,
+    HAL_STATUS *status)
 {
 	ieee80211_regdomain_t ieee_regdomain;
 
@@ -1674,9 +1573,7 @@ ar5k_ar5211_set_regdomain(hal, regdomain, status)
 }
 
 void
-ar5k_ar5211_set_ledstate(hal, state)
-	struct ath_hal *hal;
-	HAL_LED_STATE state;
+ar5k_ar5211_set_ledstate(struct ath_hal *hal, HAL_LED_STATE state)
 {
 	u_int32_t led;
 
@@ -1714,11 +1611,8 @@ ar5k_ar5211_set_ledstate(hal, state)
 }
 
 void
-ar5k_ar5211_set_associd(hal, bssid, assoc_id, tim_offset)
-	struct ath_hal *hal;
-	const u_int8_t *bssid;
-	u_int16_t assoc_id;
-	u_int16_t tim_offset;
+ar5k_ar5211_set_associd(struct ath_hal *hal, const u_int8_t *bssid,
+    u_int16_t assoc_id, u_int16_t tim_offset)
 {
 	u_int32_t low_id, high_id;
 
@@ -1748,9 +1642,7 @@ ar5k_ar5211_set_associd(hal, bssid, assoc_id, tim_offset)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_gpio_output(hal, gpio)
-	struct ath_hal *hal;
-	u_int32_t gpio;
+ar5k_ar5211_set_gpio_output(struct ath_hal *hal, u_int32_t gpio)
 {
 	if (gpio > AR5K_AR5211_NUM_GPIO)
 		return (AH_FALSE);
@@ -1763,9 +1655,7 @@ ar5k_ar5211_set_gpio_output(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_gpio_input(hal, gpio)
-	struct ath_hal *hal;
-	u_int32_t gpio;
+ar5k_ar5211_set_gpio_input(struct ath_hal *hal, u_int32_t gpio)
 {
 	if (gpio > AR5K_AR5211_NUM_GPIO)
 		return (AH_FALSE);
@@ -1778,9 +1668,7 @@ ar5k_ar5211_set_gpio_input(hal, gpio)
 }
 
 u_int32_t
-ar5k_ar5211_get_gpio(hal, gpio)
-	struct ath_hal *hal;
-	u_int32_t gpio;
+ar5k_ar5211_get_gpio(struct ath_hal *hal, u_int32_t gpio)
 {
 	if (gpio > AR5K_AR5211_NUM_GPIO)
 		return (0xffffffff);
@@ -1791,10 +1679,7 @@ ar5k_ar5211_get_gpio(hal, gpio)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_gpio(hal, gpio, val)
-	struct ath_hal *hal;
-	u_int32_t gpio;
-	u_int32_t val;
+ar5k_ar5211_set_gpio(struct ath_hal *hal, u_int32_t gpio, u_int32_t val)
 {
 	u_int32_t data;
 
@@ -1813,10 +1698,8 @@ ar5k_ar5211_set_gpio(hal, gpio, val)
 }
 
 void
-ar5k_ar5211_set_gpio_intr(hal, gpio, interrupt_level)
-	struct ath_hal *hal;
-	u_int gpio;
-	u_int32_t interrupt_level;
+ar5k_ar5211_set_gpio_intr(struct ath_hal *hal, u_int gpio,
+    u_int32_t interrupt_level)
 {
 	u_int32_t data;
 
@@ -1841,15 +1724,13 @@ ar5k_ar5211_set_gpio_intr(hal, gpio, interrupt_level)
 }
 
 u_int32_t
-ar5k_ar5211_get_tsf32(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_tsf32(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_TSF_L32));
 }
 
 u_int64_t
-ar5k_ar5211_get_tsf64(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_tsf64(struct ath_hal *hal)
 {
 	u_int64_t tsf = AR5K_REG_READ(AR5K_AR5211_TSF_U32);
 
@@ -1857,23 +1738,20 @@ ar5k_ar5211_get_tsf64(hal)
 }
 
 void
-ar5k_ar5211_reset_tsf(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_reset_tsf(struct ath_hal *hal)
 {
 	AR5K_REG_ENABLE_BITS(AR5K_AR5211_BEACON,
 	    AR5K_AR5211_BEACON_RESET_TSF);
 }
 
 u_int16_t
-ar5k_ar5211_get_regdomain(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_regdomain(struct ath_hal *hal)
 {
 	return (ar5k_get_regdomain(hal));
 }
 
 HAL_BOOL
-ar5k_ar5211_detect_card_present(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_detect_card_present(struct ath_hal *hal)
 {
 	u_int16_t magic;
 
@@ -1889,9 +1767,7 @@ ar5k_ar5211_detect_card_present(hal)
 }
 
 void
-ar5k_ar5211_update_mib_counters(hal, statistics)
-	struct ath_hal *hal;
-	HAL_MIB_STATS *statistics;
+ar5k_ar5211_update_mib_counters(struct ath_hal *hal, HAL_MIB_STATS *statistics)
 {
 	statistics->ackrcv_bad += AR5K_REG_READ(AR5K_AR5211_ACK_FAIL);
 	statistics->rts_bad += AR5K_REG_READ(AR5K_AR5211_RTS_FAIL);
@@ -1901,16 +1777,13 @@ ar5k_ar5211_update_mib_counters(hal, statistics)
 }
 
 HAL_RFGAIN
-ar5k_ar5211_get_rf_gain(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_rf_gain(struct ath_hal *hal)
 {
 	return (HAL_RFGAIN_INACTIVE);
 }
 
 HAL_BOOL
-ar5k_ar5211_set_slot_time(hal, slot_time)
-	struct ath_hal *hal;
-	u_int slot_time;
+ar5k_ar5211_set_slot_time(struct ath_hal *hal, u_int slot_time)
 {
 	if (slot_time < HAL_SLOT_TIME_9 || slot_time > HAL_SLOT_TIME_MAX)
 		return (AH_FALSE);
@@ -1921,16 +1794,13 @@ ar5k_ar5211_set_slot_time(hal, slot_time)
 }
 
 u_int
-ar5k_ar5211_get_slot_time(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_slot_time(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_DCU_GBL_IFS_SLOT) & 0xffff);
 }
 
 HAL_BOOL
-ar5k_ar5211_set_ack_timeout(hal, timeout)
-	struct ath_hal *hal;
-	u_int timeout;
+ar5k_ar5211_set_ack_timeout(struct ath_hal *hal, u_int timeout)
 {
 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5211_TIME_OUT_ACK),
 	    hal->ah_turbo) <= timeout)
@@ -1943,17 +1813,14 @@ ar5k_ar5211_set_ack_timeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5211_get_ack_timeout(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_ack_timeout(struct ath_hal *hal)
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
 	    AR5K_AR5211_TIME_OUT_ACK), hal->ah_turbo));
 }
 
 HAL_BOOL
-ar5k_ar5211_set_cts_timeout(hal, timeout)
-	struct ath_hal *hal;
-	u_int timeout;
+ar5k_ar5211_set_cts_timeout(struct ath_hal *hal, u_int timeout)
 {
 	if (ar5k_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_AR5211_TIME_OUT_CTS),
 	    hal->ah_turbo) <= timeout)
@@ -1966,8 +1833,7 @@ ar5k_ar5211_set_cts_timeout(hal, timeout)
 }
 
 u_int
-ar5k_ar5211_get_cts_timeout(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_cts_timeout(struct ath_hal *hal)
 {
 	return (ar5k_clocktoh(AR5K_REG_MS(AR5K_REG_READ(AR5K_AR5211_TIME_OUT),
 	    AR5K_AR5211_TIME_OUT_CTS), hal->ah_turbo));
@@ -1978,9 +1844,7 @@ ar5k_ar5211_get_cts_timeout(hal)
  */
 
 HAL_BOOL
-ar5k_ar5211_is_cipher_supported(hal, cipher)
-	struct ath_hal *hal;
-	HAL_CIPHER cipher;
+ar5k_ar5211_is_cipher_supported(struct ath_hal *hal, HAL_CIPHER cipher)
 {
 	/*
 	 * The AR5211 only supports WEP
@@ -1992,16 +1856,13 @@ ar5k_ar5211_is_cipher_supported(hal, cipher)
 }
 
 u_int32_t
-ar5k_ar5211_get_keycache_size(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_keycache_size(struct ath_hal *hal)
 {
 	return (AR5K_AR5211_KEYCACHE_SIZE);
 }
 
 HAL_BOOL
-ar5k_ar5211_reset_key(hal, entry)
-	struct ath_hal *hal;
-	u_int16_t entry;
+ar5k_ar5211_reset_key(struct ath_hal *hal, u_int16_t entry)
 {
 	int i;
 
@@ -2014,9 +1875,7 @@ ar5k_ar5211_reset_key(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5211_is_key_valid(hal, entry)
-	struct ath_hal *hal;
-	u_int16_t entry;
+ar5k_ar5211_is_key_valid(struct ath_hal *hal, u_int16_t entry)
 {
 	AR5K_ASSERT_ENTRY(entry, AR5K_AR5211_KEYTABLE_SIZE);
 
@@ -2031,12 +1890,8 @@ ar5k_ar5211_is_key_valid(hal, entry)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_key(hal, entry, keyval, mac, xor_notused)
-	struct ath_hal *hal;
-	u_int16_t entry;
-	const HAL_KEYVAL *keyval;
-	const u_int8_t *mac;
-	int xor_notused;
+ar5k_ar5211_set_key(struct ath_hal *hal, u_int16_t entry,
+    const HAL_KEYVAL *keyval, const u_int8_t *mac, int xor_notused)
 {
 	int i;
 	u_int32_t key_v[AR5K_AR5211_KEYCACHE_SIZE - 2];
@@ -2082,10 +1937,8 @@ ar5k_ar5211_set_key(hal, entry, keyval, mac, xor_notused)
 }
 
 HAL_BOOL
-ar5k_ar5211_set_key_lladdr(hal, entry, mac)
-	struct ath_hal *hal;
-	u_int16_t entry;
-	const u_int8_t *mac;
+ar5k_ar5211_set_key_lladdr(struct ath_hal *hal, u_int16_t entry,
+    const u_int8_t *mac)
 {
 	u_int32_t low_id, high_id;
 	const u_int8_t *mac_v;
@@ -2113,11 +1966,8 @@ ar5k_ar5211_set_key_lladdr(hal, entry, mac)
  */
 
 HAL_BOOL
-ar5k_ar5211_set_power(hal, mode, set_chip, sleep_duration)
-	struct ath_hal *hal;
-	HAL_POWER_MODE mode;
-	HAL_BOOL set_chip;
-	u_int16_t sleep_duration;
+ar5k_ar5211_set_power(struct ath_hal *hal, HAL_POWER_MODE mode,
+    HAL_BOOL set_chip, u_int16_t sleep_duration)
 {
 	u_int32_t staid;
 	int i;
@@ -2182,23 +2032,20 @@ ar5k_ar5211_set_power(hal, mode, set_chip, sleep_duration)
 }
 
 HAL_POWER_MODE
-ar5k_ar5211_get_power_mode(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_power_mode(struct ath_hal *hal)
 {
 	return (hal->ah_power_mode);
 }
 
 HAL_BOOL
-ar5k_ar5211_query_pspoll_support(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_query_pspoll_support(struct ath_hal *hal)
 {
 	/* nope */
 	return (AH_FALSE);
 }
 
 HAL_BOOL
-ar5k_ar5211_init_pspoll(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_init_pspoll(struct ath_hal *hal)
 {
 	/*
 	 * Not used on the AR5211
@@ -2207,17 +2054,14 @@ ar5k_ar5211_init_pspoll(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_enable_pspoll(hal, bssid, assoc_id)
-	struct ath_hal *hal;
-	u_int8_t *bssid;
-	u_int16_t assoc_id;
+ar5k_ar5211_enable_pspoll(struct ath_hal *hal, u_int8_t *bssid,
+    u_int16_t assoc_id)
 {
 	return (AH_FALSE);
 }
 
 HAL_BOOL
-ar5k_ar5211_disable_pspoll(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_disable_pspoll(struct ath_hal *hal)
 {
 	return (AH_FALSE);
 }
@@ -2227,10 +2071,8 @@ ar5k_ar5211_disable_pspoll(hal)
  */
 
 void
-ar5k_ar5211_init_beacon(hal, next_beacon, interval)
-	struct ath_hal *hal;
-	u_int32_t next_beacon;
-	u_int32_t interval;
+ar5k_ar5211_init_beacon(struct ath_hal *hal, u_int32_t next_beacon,
+    u_int32_t interval)
 {
 	u_int32_t timer1, timer2, timer3;
 
@@ -2268,13 +2110,9 @@ ar5k_ar5211_init_beacon(hal, next_beacon, interval)
 }
 
 void
-ar5k_ar5211_set_beacon_timers(hal, state, tsf, dtim_count, cfp_count)
-	struct ath_hal *hal;
-	const HAL_BEACON_STATE *state;
-	u_int32_t tsf;
-	u_int32_t dtim_count;
-	u_int32_t cfp_count;
-
+ar5k_ar5211_set_beacon_timers(struct ath_hal *hal,
+    const HAL_BEACON_STATE *state, u_int32_t tsf, u_int32_t dtim_count,
+    u_int32_t cfp_count)
 {
 	u_int32_t cfp_period, next_cfp;
 
@@ -2335,8 +2173,7 @@ ar5k_ar5211_set_beacon_timers(hal, state, tsf, dtim_count, cfp_count)
 }
 
 void
-ar5k_ar5211_reset_beacon(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_reset_beacon(struct ath_hal *hal)
 {
 	/*
 	 * Disable beacon timer
@@ -2352,9 +2189,7 @@ ar5k_ar5211_reset_beacon(hal)
 }
 
 HAL_BOOL
-ar5k_ar5211_wait_for_beacon(hal, phys_addr)
-	struct ath_hal *hal;
-	bus_addr_t phys_addr;
+ar5k_ar5211_wait_for_beacon(struct ath_hal *hal, bus_addr_t phys_addr)
 {
 	HAL_BOOL ret;
 
@@ -2376,16 +2211,13 @@ ar5k_ar5211_wait_for_beacon(hal, phys_addr)
  */
 
 HAL_BOOL
-ar5k_ar5211_is_intr_pending(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_is_intr_pending(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_INTPEND) == 0 ? AH_FALSE : AH_TRUE);
 }
 
 HAL_BOOL
-ar5k_ar5211_get_isr(hal, interrupt_mask)
-	struct ath_hal *hal;
-	u_int32_t *interrupt_mask;
+ar5k_ar5211_get_isr(struct ath_hal *hal, u_int32_t *interrupt_mask)
 {
 	u_int32_t data;
 
@@ -2422,17 +2254,14 @@ ar5k_ar5211_get_isr(hal, interrupt_mask)
 }
 
 u_int32_t
-ar5k_ar5211_get_intr(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_intr(struct ath_hal *hal)
 {
 	/* Return the interrupt mask stored previously */
 	return (hal->ah_imr);
 }
 
 HAL_INT
-ar5k_ar5211_set_intr(hal, new_mask)
-	struct ath_hal *hal;
-	HAL_INT new_mask;
+ar5k_ar5211_set_intr(struct ath_hal *hal, HAL_INT new_mask)
 {
 	HAL_INT old_mask, int_mask;
 
@@ -2488,8 +2317,7 @@ ar5k_ar5211_set_intr(hal, new_mask)
  */
 
 HAL_BOOL
-ar5k_ar5211_get_capabilities(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_get_capabilities(struct ath_hal *hal)
 {
 	u_int16_t ee_header;
 
@@ -2540,9 +2368,7 @@ ar5k_ar5211_get_capabilities(hal)
 }
 
 void
-ar5k_ar5211_radar_alert(hal, enable)
-	struct ath_hal *hal;
-	HAL_BOOL enable;
+ar5k_ar5211_radar_alert(struct ath_hal *hal, HAL_BOOL enable)
 {
 	/*
 	 * Enable radar detection
@@ -2569,18 +2395,14 @@ ar5k_ar5211_radar_alert(hal, enable)
  */
 
 HAL_BOOL
-ar5k_ar5211_eeprom_is_busy(hal)
-	struct ath_hal *hal;
+ar5k_ar5211_eeprom_is_busy(struct ath_hal *hal)
 {
 	return (AR5K_REG_READ(AR5K_AR5211_CFG) & AR5K_AR5211_CFG_EEBS ?
 	    AH_TRUE : AH_FALSE);
 }
 
 int
-ar5k_ar5211_eeprom_read(hal, offset, data)
-	struct ath_hal *hal;
-	u_int32_t offset;
-	u_int16_t *data;
+ar5k_ar5211_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)
 {
 	u_int32_t status, i;
 
@@ -2607,10 +2429,7 @@ ar5k_ar5211_eeprom_read(hal, offset, data)
 }
 
 int
-ar5k_ar5211_eeprom_write(hal, offset, data)
-	struct ath_hal *hal;
-	u_int32_t offset;
-	u_int16_t data;
+ar5k_ar5211_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)
 {
 	u_int32_t status, timeout;
 
@@ -2643,10 +2462,8 @@ ar5k_ar5211_eeprom_write(hal, offset, data)
  */
 
 void
-ar5k_ar5211_rfregs(hal, channel, freq, ee_mode)
-	struct ath_hal *hal;
-	HAL_CHANNEL *channel;
-	u_int freq, ee_mode;
+ar5k_ar5211_rfregs(struct ath_hal *hal, HAL_CHANNEL *channel, u_int freq,
+    u_int ee_mode)
 {
 	struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
 	struct ar5k_ar5211_ini_rf rf[AR5K_ELEMENTS(ar5211_rf)];