diff options
| author | Reyk Floeter <reyk@cvs.openbsd.org> | 2008-07-30 07:15:40 +0000 |
|---|---|---|
| committer | Reyk Floeter <reyk@cvs.openbsd.org> | 2008-07-30 07:15:40 +0000 |
| commit | 2c279d86a8e846c71f5302965d5205367531cccb (patch) | |
| tree | 66861ff671cdf2c82023a1984f120d63e46a4d5a /sys/dev/ic/ar5212reg.h | |
| parent | f34f301f42651ae9879010be50d6449bd1044721 (diff) | |
Update the RF, RFGAIN, MODE, INI, and BBGAIN initialization tables
with different versions for various ar5212 variants and add an extra
table for PCI-E devices. This fixes support for various newer devices
(like the 1st generation MacBook, T61 variants) but it still does not
work on a number of other devices.
Tested by many
ok deraadt@
Diffstat (limited to 'sys/dev/ic/ar5212reg.h')
| -rw-r--r-- | sys/dev/ic/ar5212reg.h | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/sys/dev/ic/ar5212reg.h b/sys/dev/ic/ar5212reg.h index 2684b603429..6a259b10cb4 100644 --- a/sys/dev/ic/ar5212reg.h +++ b/sys/dev/ic/ar5212reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ar5212reg.h,v 1.11 2007/03/12 01:04:52 reyk Exp $ */ +/* $OpenBSD: ar5212reg.h,v 1.12 2008/07/30 07:15:39 reyk Exp $ */ /* * Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org> @@ -1175,13 +1175,15 @@ typedef enum { /* * PHY clock sleep registers */ -#define AR5K_AR5212_PHY_SCLOCK 0x99f0 -#define AR5K_AR5212_PHY_SCLOCK_32MHZ 0x0000000c -#define AR5K_AR5212_PHY_SDELAY 0x99f4 -#define AR5K_AR5212_PHY_SDELAY_32MHZ 0x000000ff -#define AR5K_AR5212_PHY_SPENDING 0x99f8 -#define AR5K_AR5212_PHY_SPENDING_AR5111 0x00000018 -#define AR5K_AR5212_PHY_SPENDING_AR5112 0x00000014 +#define AR5K_AR5212_PHY_SCLOCK 0x99f0 +#define AR5K_AR5212_PHY_SCLOCK_32MHZ 0x0000000c +#define AR5K_AR5212_PHY_SDELAY 0x99f4 +#define AR5K_AR5212_PHY_SDELAY_32MHZ 0x000000ff +#define AR5K_AR5212_PHY_SPENDING 0x99f8 +#define AR5K_AR5212_PHY_SPENDING_AR5111 0x00000018 +#define AR5K_AR5212_PHY_SPENDING_AR5112 0x00000014 +#define AR5K_AR5212_PHY_SPENDING_AR5112A 0x0000000e +#define AR5K_AR5212_PHY_SPENDING_AR5424 0x00000012 /* * PHY timing IQ calibration result register |