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authorJonathan Gray <jsg@cvs.openbsd.org>2005-09-10 14:36:47 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2005-09-10 14:36:47 +0000
commit28e89a88f52d685d411a4a0dc4814cd09902b871 (patch)
treeb9747ad2c730eea3b49fd7f521097209436bb56a /sys/dev/ic/ar5xxx.c
parentc64761659a10c1ab82ed76332c34c6c8a1cc0849 (diff)
ansi, no binary change.
ok reyk@
Diffstat (limited to 'sys/dev/ic/ar5xxx.c')
-rw-r--r--sys/dev/ic/ar5xxx.c178
1 files changed, 46 insertions, 132 deletions
diff --git a/sys/dev/ic/ar5xxx.c b/sys/dev/ic/ar5xxx.c
index 9ad962dee86..c638e0dcf31 100644
--- a/sys/dev/ic/ar5xxx.c
+++ b/sys/dev/ic/ar5xxx.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ar5xxx.c,v 1.28 2005/08/17 12:22:49 reyk Exp $ */
+/* $OpenBSD: ar5xxx.c,v 1.29 2005/09/10 14:36:46 jsg Exp $ */
/*
* Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -121,9 +121,7 @@ static const struct ar5k_ini_rfgain ar5k_rfg[] = AR5K_INI_RFGAIN;
* Perform a lookup if the device is supported by the HAL
*/
const char *
-ath_hal_probe(vendor, device)
- u_int16_t vendor;
- u_int16_t device;
+ath_hal_probe(u_int16_t vendor, u_int16_t device)
{
int i;
@@ -143,12 +141,8 @@ ath_hal_probe(vendor, device)
* Fills in the HAL structure and initialises the device
*/
struct ath_hal *
-ath_hal_attach(device, sc, st, sh, status)
- u_int16_t device;
- void *sc;
- bus_space_tag_t st;
- bus_space_handle_t sh;
- int *status;
+ath_hal_attach(u_int16_t device, void *sc, bus_space_tag_t st,
+ bus_space_handle_t sh, int *status)
{
ieee80211_regdomain_t ieee_regdomain;
u_int16_t regdomain;
@@ -293,12 +287,8 @@ ath_hal_attach(device, sc, st, sh, status)
}
u_int16_t
-ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble)
- struct ath_hal *hal;
- const HAL_RATE_TABLE *rates;
- u_int32_t frame_length;
- u_int16_t rate_index;
- HAL_BOOL short_preamble;
+ath_hal_computetxtime(struct ath_hal *hal, const HAL_RATE_TABLE *rates,
+ u_int32_t frame_length, u_int16_t rate_index, HAL_BOOL short_preamble)
{
const HAL_RATE *rate;
u_int32_t value;
@@ -359,26 +349,19 @@ ath_hal_computetxtime(hal, rates, frame_length, rate_index, short_preamble)
}
u_int
-ath_hal_mhz2ieee(mhz, flags)
- u_int mhz;
- u_int flags;
+ath_hal_mhz2ieee(u_int mhz, u_int flags)
{
return (ieee80211_mhz2ieee(mhz, flags));
}
u_int
-ath_hal_ieee2mhz(ieee, flags)
- u_int ieee;
- u_int flags;
+ath_hal_ieee2mhz(u_int ieee, u_int flags)
{
return (ieee80211_ieee2mhz(ieee, flags));
}
HAL_BOOL
-ar5k_check_channel(hal, freq, flags)
- struct ath_hal *hal;
- u_int16_t freq;
- u_int flags;
+ar5k_check_channel(struct ath_hal *hal, u_int16_t freq, u_int flags)
{
/* Check if the channel is in our supported range */
if (flags & IEEE80211_CHAN_2GHZ) {
@@ -395,16 +378,9 @@ ar5k_check_channel(hal, freq, flags)
}
HAL_BOOL
-ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode,
- outdoor, extended)
- struct ath_hal *hal;
- HAL_CHANNEL *channels;
- u_int max_channels;
- u_int *channels_size;
- HAL_CTRY_CODE country;
- u_int16_t mode;
- HAL_BOOL outdoor;
- HAL_BOOL extended;
+ath_hal_init_channels(struct ath_hal *hal, HAL_CHANNEL *channels,
+ u_int max_channels, u_int *channels_size, HAL_CTRY_CODE country,
+ u_int16_t mode, HAL_BOOL outdoor, HAL_BOOL extended)
{
u_int i, c;
u_int32_t domain_current;
@@ -536,9 +512,7 @@ ath_hal_init_channels(hal, channels, max_channels, channels_size, country, mode,
*/
const char *
-ar5k_printver(type, val)
- enum ar5k_srev_type type;
- u_int32_t val;
+ar5k_printver(enum ar5k_srev_type type, u_int32_t val)
{
struct ar5k_srev_name names[] = AR5K_SREV_NAME;
const char *name = "xxxx";
@@ -558,8 +532,7 @@ ar5k_printver(type, val)
}
void
-ar5k_radar_alert(hal)
- struct ath_hal *hal;
+ar5k_radar_alert(struct ath_hal *hal)
{
/*
* Limit ~1/s
@@ -580,8 +553,7 @@ ar5k_radar_alert(hal)
}
u_int16_t
-ar5k_regdomain_from_ieee(ieee)
- ieee80211_regdomain_t ieee;
+ar5k_regdomain_from_ieee(ieee80211_regdomain_t ieee)
{
u_int32_t regdomain = (u_int32_t)ieee;
@@ -592,8 +564,7 @@ ar5k_regdomain_from_ieee(ieee)
}
ieee80211_regdomain_t
-ar5k_regdomain_to_ieee(regdomain)
- u_int16_t regdomain;
+ar5k_regdomain_to_ieee(u_int16_t regdomain)
{
ieee80211_regdomain_t ieee = (ieee80211_regdomain_t)regdomain & 0xff;
@@ -601,8 +572,7 @@ ar5k_regdomain_to_ieee(regdomain)
}
u_int16_t
-ar5k_get_regdomain(hal)
- struct ath_hal *hal;
+ar5k_get_regdomain(struct ath_hal *hal)
{
#ifndef COUNTRYCODE
/*
@@ -632,9 +602,7 @@ ar5k_get_regdomain(hal)
}
u_int32_t
-ar5k_bitswap(val, bits)
- u_int32_t val;
- u_int bits;
+ar5k_bitswap(u_int32_t val, u_int bits)
{
u_int32_t retval = 0, bit, i;
@@ -647,25 +615,19 @@ ar5k_bitswap(val, bits)
}
u_int
-ar5k_htoclock(usec, turbo)
- u_int usec;
- HAL_BOOL turbo;
+ar5k_htoclock(u_int usec, HAL_BOOL turbo)
{
return (turbo == AH_TRUE ? (usec * 80) : (usec * 40));
}
u_int
-ar5k_clocktoh(clock, turbo)
- u_int clock;
- HAL_BOOL turbo;
+ar5k_clocktoh(u_int clock, HAL_BOOL turbo)
{
return (turbo == AH_TRUE ? (clock / 80) : (clock / 40));
}
void
-ar5k_rt_copy(dst, src)
- HAL_RATE_TABLE *dst;
- const HAL_RATE_TABLE *src;
+ar5k_rt_copy(HAL_RATE_TABLE *dst, const HAL_RATE_TABLE *src)
{
bzero(dst, sizeof(HAL_RATE_TABLE));
dst->rateCount = src->rateCount;
@@ -673,12 +635,8 @@ ar5k_rt_copy(dst, src)
}
HAL_BOOL
-ar5k_register_timeout(hal, reg, flag, val, is_set)
- struct ath_hal *hal;
- u_int32_t reg;
- u_int32_t flag;
- u_int32_t val;
- HAL_BOOL is_set;
+ar5k_register_timeout(struct ath_hal *hal, u_int32_t reg, u_int32_t flag,
+ u_int32_t val, HAL_BOOL is_set)
{
int i;
u_int32_t data;
@@ -703,10 +661,7 @@ ar5k_register_timeout(hal, reg, flag, val, is_set)
*/
u_int16_t
-ar5k_eeprom_bin2freq(hal, bin, mode)
- struct ath_hal *hal;
- u_int16_t bin;
- u_int mode;
+ar5k_eeprom_bin2freq(struct ath_hal *hal, u_int16_t bin, u_int mode)
{
u_int16_t val;
@@ -731,10 +686,7 @@ ar5k_eeprom_bin2freq(hal, bin, mode)
}
int
-ar5k_eeprom_read_ants(hal, offset, mode)
- struct ath_hal *hal;
- u_int32_t *offset;
- u_int mode;
+ar5k_eeprom_read_ants(struct ath_hal *hal, u_int32_t *offset, u_int mode)
{
struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
u_int32_t o = *offset;
@@ -790,10 +742,7 @@ ar5k_eeprom_read_ants(hal, offset, mode)
}
int
-ar5k_eeprom_read_modes(hal, offset, mode)
- struct ath_hal *hal;
- u_int32_t *offset;
- u_int mode;
+ar5k_eeprom_read_modes(struct ath_hal *hal, u_int32_t *offset, u_int mode)
{
struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
u_int32_t o = *offset;
@@ -874,8 +823,7 @@ ar5k_eeprom_read_modes(hal, offset, mode)
}
int
-ar5k_eeprom_init(hal)
- struct ath_hal *hal;
+ar5k_eeprom_init(struct ath_hal *hal)
{
struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
u_int32_t offset;
@@ -1053,9 +1001,7 @@ ar5k_eeprom_init(hal)
}
int
-ar5k_eeprom_read_mac(hal, mac)
- struct ath_hal *hal;
- u_int8_t *mac;
+ar5k_eeprom_read_mac(struct ath_hal *hal, u_int8_t *mac)
{
u_int32_t total, offset;
u_int16_t data;
@@ -1088,10 +1034,8 @@ ar5k_eeprom_read_mac(hal, mac)
}
HAL_BOOL
-ar5k_eeprom_regulation_domain(hal, write, regdomain)
- struct ath_hal *hal;
- HAL_BOOL write;
- ieee80211_regdomain_t *regdomain;
+ar5k_eeprom_regulation_domain(struct ath_hal *hal, HAL_BOOL write,
+ ieee80211_regdomain_t *regdomain)
{
/* Read current value */
if (write != AH_TRUE) {
@@ -1121,9 +1065,7 @@ ar5k_eeprom_regulation_domain(hal, write, regdomain)
*/
HAL_BOOL
-ar5k_channel(hal, channel)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
+ar5k_channel(struct ath_hal *hal, HAL_CHANNEL *channel)
{
HAL_BOOL ret;
@@ -1162,8 +1104,7 @@ ar5k_channel(hal, channel)
}
u_int32_t
-ar5k_ar5110_chan2athchan(channel)
- HAL_CHANNEL *channel;
+ar5k_ar5110_chan2athchan(HAL_CHANNEL *channel)
{
u_int32_t athchan;
@@ -1181,9 +1122,7 @@ ar5k_ar5110_chan2athchan(channel)
}
HAL_BOOL
-ar5k_ar5110_channel(hal, channel)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
+ar5k_ar5110_channel(struct ath_hal *hal, HAL_CHANNEL *channel)
{
u_int32_t data;
@@ -1199,9 +1138,7 @@ ar5k_ar5110_channel(hal, channel)
}
HAL_BOOL
-ar5k_ar5111_chan2athchan(ieee, athchan)
- u_int ieee;
- struct ar5k_athchan_2ghz *athchan;
+ar5k_ar5111_chan2athchan(u_int ieee, struct ar5k_athchan_2ghz *athchan)
{
int channel;
@@ -1227,9 +1164,7 @@ ar5k_ar5111_chan2athchan(ieee, athchan)
}
HAL_BOOL
-ar5k_ar5111_channel(hal, channel)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
+ar5k_ar5111_channel(struct ath_hal *hal, HAL_CHANNEL *channel)
{
u_int ieee_channel, ath_channel;
u_int32_t data0, data1, clock;
@@ -1270,9 +1205,7 @@ ar5k_ar5111_channel(hal, channel)
}
HAL_BOOL
-ar5k_ar5112_channel(hal, channel)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
+ar5k_ar5112_channel(struct ath_hal *hal, HAL_CHANNEL *channel)
{
u_int32_t data, data0, data1, data2;
u_int16_t c;
@@ -1317,10 +1250,8 @@ ar5k_ar5112_channel(hal, channel)
}
u_int
-ar5k_rfregs_op(rf, offset, reg, bits, first, col, set)
- u_int32_t *rf;
- u_int32_t offset, reg, bits, first, col;
- HAL_BOOL set;
+ar5k_rfregs_op(u_int32_t *rf, u_int32_t offset, u_int32_t reg, u_int32_t bits,
+ u_int32_t first, u_int32_t col, HAL_BOOL set)
{
u_int32_t mask, entry, last, data, shift, position;
int32_t left;
@@ -1366,8 +1297,7 @@ ar5k_rfregs_op(rf, offset, reg, bits, first, col, set)
}
u_int32_t
-ar5k_rfregs_gainf_corr(hal)
- struct ath_hal *hal;
+ar5k_rfregs_gainf_corr(struct ath_hal *hal)
{
u_int32_t mix, step;
u_int32_t *rf;
@@ -1403,8 +1333,7 @@ ar5k_rfregs_gainf_corr(hal)
}
HAL_BOOL
-ar5k_rfregs_gain_readback(hal)
- struct ath_hal *hal;
+ar5k_rfregs_gain_readback(struct ath_hal *hal)
{
u_int32_t step, mix, level[4];
u_int32_t *rf;
@@ -1446,8 +1375,7 @@ ar5k_rfregs_gain_readback(hal)
}
int32_t
-ar5k_rfregs_gain_adjust(hal)
- struct ath_hal *hal;
+ar5k_rfregs_gain_adjust(struct ath_hal *hal)
{
int ret = 0;
const struct ar5k_gain_opt *go;
@@ -1504,10 +1432,7 @@ ar5k_rfregs_gain_adjust(hal)
}
HAL_BOOL
-ar5k_rfregs(hal, channel, mode)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
- u_int mode;
+ar5k_rfregs(struct ath_hal *hal, HAL_CHANNEL *channel, u_int mode)
{
ar5k_rfgain_t *func = NULL;
HAL_BOOL ret;
@@ -1539,10 +1464,7 @@ ar5k_rfregs(hal, channel, mode)
}
HAL_BOOL
-ar5k_ar5111_rfregs(hal, channel, mode)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
- u_int mode;
+ar5k_ar5111_rfregs(struct ath_hal *hal, HAL_CHANNEL *channel, u_int mode)
{
struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
const u_int rf_size = AR5K_ELEMENTS(ar5111_rf);
@@ -1637,10 +1559,7 @@ ar5k_ar5111_rfregs(hal, channel, mode)
}
HAL_BOOL
-ar5k_ar5112_rfregs(hal, channel, mode)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
- u_int mode;
+ar5k_ar5112_rfregs(struct ath_hal *hal, HAL_CHANNEL *channel, u_int mode)
{
struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
const u_int rf_size = AR5K_ELEMENTS(ar5112_rf);
@@ -1722,9 +1641,7 @@ ar5k_ar5112_rfregs(hal, channel, mode)
}
HAL_BOOL
-ar5k_rfgain(hal, phy, freq)
- struct ath_hal *hal;
- u_int phy, freq;
+ar5k_rfgain(struct ath_hal *hal, u_int phy, u_int freq)
{
int i;
@@ -1757,10 +1674,7 @@ ar5k_rfgain(hal, phy, freq)
* Common TX power setup
*/
void
-ar5k_txpower_table(hal, channel, max_power)
- struct ath_hal *hal;
- HAL_CHANNEL *channel;
- int16_t max_power;
+ar5k_txpower_table(struct ath_hal *hal, HAL_CHANNEL *channel, int16_t max_power)
{
u_int16_t txpower, *rates;
int i;