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authorTheo de Raadt <deraadt@cvs.openbsd.org>2010-08-02 17:13:58 +0000
committerTheo de Raadt <deraadt@cvs.openbsd.org>2010-08-02 17:13:58 +0000
commit70b7830dd2d1272ab45568772e1ddfe337c6ff0c (patch)
tree7b5f37fb57942492a293f4ea3bb00ecfc1d546b6 /sys/dev/ic/athn.c
parent69cb66963e5fbbc966db55e0e7aa0a54b35bbf3e (diff)
The EC GPE is always edge. edge interrupts have their STS bit reset
at interrupt reception; level interrupts have STS cleared when processing is complete. Since the STS has already been reset at interrupt reception we should not reset late.. Found by marco
Diffstat (limited to 'sys/dev/ic/athn.c')
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