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authorDamien Bergamini <damien@cvs.openbsd.org>2010-05-11 19:34:21 +0000
committerDamien Bergamini <damien@cvs.openbsd.org>2010-05-11 19:34:21 +0000
commit73b25af4f81c0b4cad7f80f28a17c1f17cbd2bb9 (patch)
tree80ac5fbce86af779028df2e23f18cbf63604e7e6 /sys/dev/ic/athn.c
parent7cdc4f9eb78d328200a38185a05e059793b770a0 (diff)
enable fast PLL clock for 5GHz on AR9280 >=2.0 (unless EEPROM says the
opposite) and on AR9380 2.0. tested on my AR9280 2.1 with a NETGEAR WNHDE111 AP.
Diffstat (limited to 'sys/dev/ic/athn.c')
-rw-r--r--sys/dev/ic/athn.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/sys/dev/ic/athn.c b/sys/dev/ic/athn.c
index b687eb8979c..7797eedae30 100644
--- a/sys/dev/ic/athn.c
+++ b/sys/dev/ic/athn.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: athn.c,v 1.37 2010/05/10 17:44:21 damien Exp $ */
+/* $OpenBSD: athn.c,v 1.38 2010/05/11 19:34:20 damien Exp $ */
/*-
* Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
@@ -705,14 +705,11 @@ athn_init_pll(struct athn_softc *sc, const struct ieee80211_channel *c)
} else if (AR_SREV_9280_10_OR_LATER(sc)) {
pll = SM(AR_RTC_9160_PLL_REFDIV, 0x05);
if (c != NULL && IEEE80211_IS_CHAN_5GHZ(c)) {
- if (AR_SREV_9280_20(sc)) {
- /* Workaround for AR9280 2.0/5GHz. */
- if ((c->ic_freq % 20) == 0 ||
- (c->ic_freq % 10) == 0)
- pll = 0x2850;
- else
- pll = 0x142c;
- } else
+ if (sc->flags & ATHN_FLAG_FAST_PLL_CLOCK)
+ pll = 0x142c;
+ else if (AR_SREV_9280_20(sc))
+ pll = 0x2850;
+ else
pll |= SM(AR_RTC_9160_PLL_DIV, 0x28);
} else
pll |= SM(AR_RTC_9160_PLL_DIV, 0x2c);
@@ -2107,10 +2104,10 @@ athn_hw_reset(struct athn_softc *sc, struct ieee80211_channel *c,
athn_init_dma(sc);
- /* Program OBS bus to see MAC interrupts. */
+ /* Program observation bus to see MAC interrupts. */
AR_WRITE(sc, sc->obs_off, 8);
- /* Setup interrupt mitigation. */
+ /* Setup Rx interrupt mitigation. */
AR_WRITE(sc, AR_RIMT, SM(AR_RIMT_FIRST, 2000) | SM(AR_RIMT_LAST, 500));
ops->init_baseband(sc);