diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2005-02-08 11:08:57 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2005-02-08 11:08:57 +0000 |
| commit | b446f1a72b19951eed072490294f1706b8d57e66 (patch) | |
| tree | 7e515a08b4cd03ac6daa401b0497d7db55863ac7 /sys/dev/ic/rtwreg.h | |
| parent | 2db005f5137ee07899a84b7817531729c145d056 (diff) | |
From NetBSD:
sys/dev/ic/rtw.c rev 1.38:
Use clue from rtk(4) and re(4) to fix the rtw(4) packet
filter. Previously, I was using the wrong CRC32 function
to hash multicast addresses; to compensate, I set the
multicast filter to all 1s. Now that I hash the addresses
correctly, I do not any longer set the filter to all 1s.
In rtw_ioctl, avoid gratuitous re-initialization when the
interface flags change. If a !IFF_UP -> IFF_UP transition,
call rtw_init(); otherwise, only reload the packet filter.
sys/dev/ic/rtwreg.h rev 1.10:
Put useful combinations of Receiver Control Register flags
in RTW_RCR_PKTFILT_MASK, RTW_RCR_MONITOR, and
RTW_RCR_PKTFILT_DEFAULT. (XXX RTW_RCR_MONITOR should be
called RTW_RCR_PKTFILT_MONITOR.)
Diffstat (limited to 'sys/dev/ic/rtwreg.h')
| -rw-r--r-- | sys/dev/ic/rtwreg.h | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/sys/dev/ic/rtwreg.h b/sys/dev/ic/rtwreg.h index 6d4ae58c6a6..de84461801c 100644 --- a/sys/dev/ic/rtwreg.h +++ b/sys/dev/ic/rtwreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: rtwreg.h,v 1.3 2005/01/22 10:14:25 jsg Exp $ */ +/* $OpenBSD: rtwreg.h,v 1.4 2005/02/08 11:08:56 jsg Exp $ */ /* $NetBSD: rtwreg.h,v 1.4 2004/12/21 09:07:23 dyoung Exp $ */ /*- * Copyright (c) 2004, 2005 David Young. All rights reserved. @@ -305,6 +305,37 @@ #define RTW_RCR_APM BIT(1) #define RTW_RCR_AAP BIT(0) /* accept frames w/ destination */ +/* Additional bits to set in monitor mode. */ +#define RTW_RCR_MONITOR ( \ + RTW_RCR_AAP | \ + RTW_RCR_ACF | \ + RTW_RCR_ACRC32 | \ + RTW_RCR_AICV | \ + 0) + +/* The packet filter bits. */ +#define RTW_RCR_PKTFILTER_MASK (\ + RTW_RCR_AAP | \ + RTW_RCR_AB | \ + RTW_RCR_ACF | \ + RTW_RCR_ACRC32 | \ + RTW_RCR_ADD3 | \ + RTW_RCR_ADF | \ + RTW_RCR_AICV | \ + RTW_RCR_AM | \ + RTW_RCR_AMF | \ + RTW_RCR_APM | \ + RTW_RCR_APWRMGT | \ + 0) + +/* Receive power-management frames and mgmt/ctrl/data frames. */ +#define RTW_RCR_PKTFILTER_DEFAULT ( \ + RTW_RCR_ADF | \ + RTW_RCR_AMF | \ + RTW_RCR_APM | \ + RTW_RCR_APWRMGT | \ + 0) + #define RTW_TINT 0x48 /* Timer Interrupt Register, 32b */ #define RTW_TBDA 0x4c /* Transmit Beacon Descriptor Start Address, * 32b, 256-byte alignment |