diff options
author | Kenneth R Westerback <krw@cvs.openbsd.org> | 2001-03-10 05:04:07 +0000 |
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committer | Kenneth R Westerback <krw@cvs.openbsd.org> | 2001-03-10 05:04:07 +0000 |
commit | b7e20995db86208b2251a5c86650c10bb1a9c880 (patch) | |
tree | 31185386f93293d585728afa2a685d7cfaba8190 /sys/dev/ic/siop_common.c | |
parent | 1e06e200b7fdf06722ba9a9d41d31a99e28b0f65 (diff) |
First support for 53c1010 chip. This enables support up to U2W for
either or both channels on the 53c1010. U3W/U160 support coming.
The particulars of 53c1010 support was derived from the FreeBSD/Linux
sym-2 driver under development by Gerard ROUDIER (groudier@FreeBSD.org).
This first support ensures that registers and bits now reserved are
not used by the 53c1010. It uses the new DFBC register to obtain
DMA FIFO relics.
A single new feature (SF_CHIP_C10) was added, rather than a new
feature for each change the 53c1010 incorporates.
These changes were sufficient to get the imbedded 53c1010 on a Tyan
S2510U3NG board to support installation of OpenBSD to a Quantum Atlas
10K2 drive, and several subsequent 'make build' and 'make release'
cycles using disks on both channels, with and without
softupdates.
More 53c1010 specific code is yet to be extracted from sym-2,
including the changes necessary to enable U160.
Diffstat (limited to 'sys/dev/ic/siop_common.c')
-rw-r--r-- | sys/dev/ic/siop_common.c | 52 |
1 files changed, 33 insertions, 19 deletions
diff --git a/sys/dev/ic/siop_common.c b/sys/dev/ic/siop_common.c index fc569695f60..47e1fd813c9 100644 --- a/sys/dev/ic/siop_common.c +++ b/sys/dev/ic/siop_common.c @@ -1,4 +1,4 @@ -/* $OpenBSD: siop_common.c,v 1.4 2001/03/06 16:29:32 krw Exp $ */ +/* $OpenBSD: siop_common.c,v 1.5 2001/03/10 05:04:06 krw Exp $ */ /* $NetBSD: siop_common.c,v 1.12 2001/02/11 18:04:50 bouyer Exp $ */ /* @@ -93,7 +93,7 @@ siop_common_reset(sc) stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3); bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, STEST1_DBLEN); - if (sc->features & SF_CHIP_QUAD) { + if ((sc->features & (SF_CHIP_QUAD | SF_CHIP_C10)) == SF_CHIP_QUAD) { /* wait for PPL to lock */ while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) & STEST4_LOCK) == 0) @@ -297,7 +297,8 @@ siop_sdtr_neg(siop_cmd) /* ok, found it. we now are sync. */ sc->targets[target]->id |= scf_period[i].scf << (24 + SCNTL3_SCF_SHIFT); - if (sync < 25) /* Ultra */ + if ((sync < 25) + && ((sc->features & SF_CHIP_C10) == 0)) sc->targets[target]->id |= SCNTL3_ULTRA << 24; sc->targets[target]->id |= @@ -335,7 +336,8 @@ reject: /* ok, found it. we now are sync. */ sc->targets[target]->id |= scf_period[i].scf << (24 + SCNTL3_SCF_SHIFT); - if (sync < 25) /* Ultra */ + if ((sync < 25) + && ((sc->features & SF_CHIP_C10) == 0)) sc->targets[target]->id |= SCNTL3_ULTRA << 24; sc->targets[target]->id |= @@ -432,26 +434,32 @@ siop_sdp(siop_cmd) dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff; if (siop_cmd->xs->flags & SCSI_DATA_OUT) { /* need to account for stale data in FIFO */ - int dfifo = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO); - if (sc->features & SF_CHIP_FIFO) { - dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh, - SIOP_CTEST5) & CTEST5_BOMASK) << 8; - dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff; - } else { - dbc += (dfifo - (dbc & 0x7f)) & 0x7f; + if (sc->features & SF_CHIP_C10) + dbc += bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC); + else { + int dfifo = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO); + if (sc->features & SF_CHIP_FIFO) { + dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh, + SIOP_CTEST5) & CTEST5_BOMASK) << 8; + dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff; + } else { + dbc += (dfifo - (dbc & 0x7f)) & 0x7f; + } } sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0); if (sstat & SSTAT0_OLF) dbc++; - if (sstat & SSTAT0_ORF) - dbc++; + if ((sc->features & SF_CHIP_C10) == 0) + if (sstat & SSTAT0_ORF) + dbc++; if (siop_cmd->siop_target->flags & TARF_ISWIDE) { sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT2); if (sstat & SSTAT2_OLF1) dbc++; - if (sstat & SSTAT2_ORF1) - dbc++; + if ((sc->features & SF_CHIP_C10) == 0) + if (sstat & SSTAT2_ORF1) + dbc++; } /* clear the FIFO */ bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3, @@ -514,10 +522,16 @@ siop_modechange(sc) stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2); switch(stest4) { case STEST4_MODE_DIF: - printf("%s: switching to differential mode\n", - sc->sc_dev.dv_xname); - bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, - stest2 | STEST2_DIF); + if (sc->features & SF_CHIP_C10) { + printf("%s: invalid SCSI mode 0x%x\n", + sc->sc_dev.dv_xname, stest4); + return 0; + } else { + printf("%s: switching to differential mode\n", + sc->sc_dev.dv_xname); + bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, + stest2 | STEST2_DIF); + } break; case STEST4_MODE_SE: printf("%s: switching to single-ended mode\n", |