Add support for RTL8188EE.

This needs a new firmware image, which should be added to the rtwn
firmware package shortly.

testing and lots of help from kevlo@
ok kevlo@ stsp@

3 files changed, 110 insertions, 18 deletions

diff --git a/sys/dev/ic/r92creg.h b/sys/dev/ic/r92creg.h
index c2be8db4696..8dbf64c72c6 100644
--- a/sys/dev/ic/r92creg.h
+++ b/sys/dev/ic/r92creg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: r92creg.h,v 1.17 2018/09/13 09:28:07 kevlo Exp $	*/
+/*	$OpenBSD: r92creg.h,v 1.18 2018/09/21 01:45:53 jmatthew Exp $	*/
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -58,6 +58,8 @@
 #define R92C_FSISR			0x054
 #define R92C_HSIMR			0x058
 #define R92C_HSISR			0x05c
+#define R92C_AFE_XTAL_CTRL_EXT		0x078
+#define R88E_XCK_OUT_CTRL		0x07c
 #define R92C_MCUFWDL			0x080
 #define R92C_HMEBOX_EXT(idx)		(0x088 + (idx) * 2)
 #define R88E_HIMR			0x0b0
@@ -96,6 +98,7 @@
 #define R92C_MBIST_START		0x174
 #define R92C_MBIST_DONE			0x178
 #define R92C_MBIST_FAIL			0x17c
+#define R88E_32K_CTRL			0x194
 #define R92C_C2HEVT_MSG			0x1a0
 #define R92C_C2HEVT_CLEAR		0x1af
 #define R92C_C2HEVT_MSG_TEST		0x1b8
@@ -117,6 +120,7 @@
 /* Rx DMA Configuration. */
 #define R92C_RXDMA_AGG_PG_TH		0x280
 #define R92C_RXPKT_NUM			0x284
+#define R88E_RXDMA_CTRL			0x286
 #define R92C_RXDMA_STATUS		0x288
 
 #define R92C_PCIE_CTRL_REG		0x300
@@ -165,8 +169,9 @@
 #define R92C_RD_RESP_PKT_TH		0x463
 #define R92C_INIRTS_RATE_SEL		0x480
 #define R92C_INIDATA_RATE_SEL(macid)	(0x484 + (macid))
-#define R88E_TX_RPT_CTRL		0x4ec
 #define R92C_MAX_AGGR_NUM		0x4ca
+#define R88E_TX_RPT_CTRL		0x4ec
+#define R88E_TX_RPT_TIME		0x4f0
 /* EDCA Configuration. */
 #define R92C_EDCA_VO_PARAM		0x500
 #define R92C_EDCA_VI_PARAM		0x504
@@ -329,6 +334,9 @@
 #define R92C_AFE_XTAL_CTRL_ADDR_M	0x007ff800
 #define R92C_AFE_XTAL_CTRL_ADDR_S	11
 
+/* Bits for R88E_XCK_OUT_CTRL. */
+#define R88E_XCK_OUT_CTRL_EN		1
+
 /* Bits for R92C_EFUSE_CTRL. */
 #define R92C_EFUSE_CTRL_DATA_M	0x000000ff
 #define R92C_EFUSE_CTRL_DATA_S	0
@@ -339,6 +347,7 @@
 /* Bits for R92C_GPIO_MUXCFG. */
 #define R92C_GPIO_MUXCFG_RFKILL	0x0008
 #define R92C_GPIO_MUXCFG_ENBT	0x0020
+#define R92C_GPIO_MUXCFG_ENSIC	0x1000
 
 /* Bits for R92C_GPIO_IO_SEL. */
 #define R92C_GPIO_IO_SEL_RFKILL	0x0008
@@ -365,10 +374,30 @@
 #define R92C_MCUFWDL_CPRST		0x00800000
 
 /* Bits for R88E_HIMR. */
+#define R88E_HIMR_ROK			0x00000001
+#define R88E_HIMR_RDU			0x00000002
+#define R88E_HIMR_VODOK			0x00000004
+#define R88E_HIMR_VIDOK			0x00000008
+#define R88E_HIMR_BEDOK			0x00000010
+#define R88E_HIMR_BKDOK			0x00000020
+#define R88E_HIMR_MGNTDOK		0x00000040
+#define R88E_HIMR_HIGHDOK		0x00000080
 #define R88E_HIMR_CPWM			0x00000100
 #define R88E_HIMR_CPWM2			0x00000200
+#define R88E_HIMR_C2HCMD		0x00000400
+#define R88E_HIMR_HISR1_IND_INT		0x00000800
+#define R88E_HIMR_ATIMEND		0x00001000
+#define R88E_HIMR_BCNDMAINT_E		0x00004000
+#define R88E_HIMR_HSISR_IND_ON_INT	0x00008000
+#define R88E_HIMR_BCNDOK0		0x00010000
+#define R88E_HIMR_BCNDMAINT0		0x00100000
+#define R88E_HIMR_TSF_BIT32_TOGGLE	0x01000000
+#define R88E_HIMR_TBDOK			0x02000000
 #define R88E_HIMR_TBDER			0x04000000
+#define R88E_HIMR_GTINT3		0x08000000
+#define R88E_HIMR_GTINT4		0x10000000
 #define R88E_HIMR_PSTIMEOUT		0x20000000
+#define R88E_HIMR_TXCCK			0x40000000
 
 /* Bits for R88E_HIMRE.*/
 #define R88E_HIMRE_RXFOVW		0x00000100
@@ -376,6 +405,13 @@
 #define R88E_HIMRE_RXERR		0x00000400
 #define R88E_HIMRE_TXERR		0x00000800
 
+/* Bits for R88E_HSIMR */
+#define R88E_HSIMR_GPIO12_0_INT_EN	0x00000001
+#define R88E_HSIMR_SPS_OCP_INT_EN	0x00000020
+#define R88E_HSIMR_RON_INT_EN		0x00000040
+#define R88E_HSIMR_PDN_INT_EN		0x00000080
+#define R88E_HSIMR_GPIO9_INT_EN		0x02000000
+
 /* Bits for R92C_EFUSE_ACCESS. */
 #define R92C_EFUSE_ACCESS_OFF		0x00
 #define R92C_EFUSE_ACCESS_ON		0x69
@@ -1100,7 +1136,7 @@ struct r88e_tx_pwr {
 } __packed;
 
 /*
- * RTL8188EU ROM image.
+ * RTL8188E ROM images.
  */
 struct r88e_rom {
 	uint16_t		id;
@@ -1119,6 +1155,18 @@ struct r88e_rom {
 	uint8_t			reserved4[3];
 	uint8_t			rf_ant_opt;
 	uint8_t			reserved5[6];
+} __packed;
+
+struct r88e_pci_rom {
+	uint8_t			macaddr[IEEE80211_ADDR_LEN];
+	uint16_t 		vid;
+	uint16_t 		did;
+	uint16_t 		svid;
+	uint16_t 		smid;
+	uint8_t			reserved[290];
+} __packed;
+
+struct r88e_usb_rom {
 	uint16_t		vid;
 	uint16_t		pid;
 	uint8_t			usb_opt;
diff --git a/sys/dev/ic/rtwn.c b/sys/dev/ic/rtwn.c
index 01aca68667f..8ede63992db 100644
--- a/sys/dev/ic/rtwn.c
+++ b/sys/dev/ic/rtwn.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rtwn.c,v 1.37 2018/09/13 09:28:07 kevlo Exp $	*/
+/*	$OpenBSD: rtwn.c,v 1.38 2018/09/21 01:45:53 jmatthew Exp $	*/
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -637,18 +637,29 @@ rtwn_r88e_read_rom(struct rtwn_softc *sc)
 {
 	struct ieee80211com *ic = &sc->sc_ic;
 	struct r88e_rom *rom = &sc->sc_r88e_rom;
+	struct r88e_pci_rom *pcirom = &sc->sc_r88e_pci_rom;
+	struct r88e_usb_rom *usbrom = &sc->sc_r88e_usb_rom;
+	int romsize;
+
+	if (sc->chip & RTWN_CHIP_PCI)
+		romsize = sizeof(struct r88e_pci_rom);
+	else
+		romsize = sizeof(struct r88e_usb_rom);
 
 	/* Read full ROM image. */
 	rtwn_efuse_read(sc, (uint8_t *)&sc->sc_r88e_rom,
-	    sizeof(sc->sc_r88e_rom));
+	    sizeof(sc->sc_r88e_rom) + romsize);
 
-	sc->crystal_cap = rom->xtal;
+	sc->crystal_cap = (sc->chip & RTWN_CHIP_PCI) ? 0x20 : rom->xtal;
 	DPRINTF(("Crystal cap=0x%x\n", sc->crystal_cap));
 
 	sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY);
 	DPRINTF(("regulatory type=%d\n", sc->regulatory));
 
-	IEEE80211_ADDR_COPY(ic->ic_myaddr, rom->macaddr);
+	if (sc->chip & RTWN_CHIP_PCI)
+		IEEE80211_ADDR_COPY(ic->ic_myaddr, pcirom->macaddr);
+	else
+		IEEE80211_ADDR_COPY(ic->ic_myaddr, usbrom->macaddr);
 }
 
 int
@@ -1729,6 +1740,13 @@ rtwn_rf_init(struct rtwn_softc *sc)
 		sc->rf_chnlbw[i] = rtwn_rf_read(sc, i, R92C_RF_CHNLBW);
 	}
 
+	/* magic value for HP 8188EEs */
+	if (sc->chip == (RTWN_CHIP_88E | RTWN_CHIP_PCI)) {
+		struct r88e_pci_rom *pcirom = &sc->sc_r88e_pci_rom;
+		if ((pcirom->svid == 0x103c) && (pcirom->smid == 0x197d))
+			rtwn_rf_write(sc, 0, 0x52, 0x7e4bd);
+	}
+
 	if ((sc->chip & (RTWN_CHIP_UMC_A_CUT | RTWN_CHIP_92C)) ==
 	    RTWN_CHIP_UMC_A_CUT) {
 		rtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255);
@@ -2186,6 +2204,9 @@ rtwn_set_chan(struct rtwn_softc *sc, struct ieee80211_channel *c,
 		    ((sc->chip & RTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 :
 		    R92C_RF_CHNLBW_BW20));
 	}
+
+	if (sc->chip == (RTWN_CHIP_88E | RTWN_CHIP_PCI))
+		DELAY(25000);
 }
 
 int
@@ -2609,12 +2630,23 @@ rtwn_enable_intr(struct rtwn_softc *sc)
 {
 	if (sc->chip & RTWN_CHIP_88E) {
 		rtwn_write_4(sc, R88E_HISR, 0xffffffff);
-		rtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM |
-		R88E_HIMR_CPWM2 | R88E_HIMR_TBDER |
-		R88E_HIMR_PSTIMEOUT);
-		rtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW |
-		    R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR |
-		    R88E_HIMRE_TXERR);
+		if (sc->chip & RTWN_CHIP_USB) {
+			rtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM |
+			R88E_HIMR_CPWM2 | R88E_HIMR_TBDER |
+			R88E_HIMR_PSTIMEOUT);
+			rtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW |
+			    R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR |
+			    R88E_HIMRE_TXERR);
+		} else {
+			rtwn_write_4(sc, R88E_HIMR,
+			    RTWN_88E_INT_ENABLE);
+			rtwn_write_4(sc, R88E_HIMRE,
+			    R88E_HIMRE_RXFOVW);
+			rtwn_write_1(sc, R92C_C2HEVT_CLEAR, 0);
+			rtwn_write_4(sc, R92C_HSIMR,
+			    R88E_HSIMR_PDN_INT_EN | R88E_HSIMR_RON_INT_EN);
+		}
+
 		if (sc->chip & RTWN_CHIP_USB) {
 			rtwn_write_1(sc, R92C_USB_SPECIAL_OPTION,
 			    rtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) |
@@ -2626,7 +2658,7 @@ rtwn_enable_intr(struct rtwn_softc *sc)
 		if (sc->chip & RTWN_CHIP_USB)
 			imask = 0xffffffff;
 		else if (sc->chip & RTWN_CHIP_PCI)
-			imask = RTWN_INT_ENABLE;
+			imask = RTWN_92C_INT_ENABLE;
 		else
 			panic("unknown chip type 0x%x", sc->chip);
 
diff --git a/sys/dev/ic/rtwnvar.h b/sys/dev/ic/rtwnvar.h
index a5a3c674c6e..698c76a2b78 100644
--- a/sys/dev/ic/rtwnvar.h
+++ b/sys/dev/ic/rtwnvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rtwnvar.h,v 1.10 2017/07/08 14:26:23 kevlo Exp $	*/
+/*	$OpenBSD: rtwnvar.h,v 1.11 2018/09/21 01:45:53 jmatthew Exp $	*/
 
 /*-
  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
@@ -48,10 +48,14 @@ struct rtwn_ops {
 #define RTWN_LED_LINK	0
 #define RTWN_LED_DATA	1
 
-#define RTWN_INT_ENABLE	(R92C_IMR_ROK | R92C_IMR_VODOK | R92C_IMR_VIDOK | \
+#define RTWN_92C_INT_ENABLE (R92C_IMR_ROK | R92C_IMR_VODOK | R92C_IMR_VIDOK | \
 			R92C_IMR_BEDOK | R92C_IMR_BKDOK | R92C_IMR_MGNTDOK | \
 			R92C_IMR_HIGHDOK | R92C_IMR_BDOK | R92C_IMR_RDU | \
 			R92C_IMR_RXFOVW)
+#define RTWN_88E_INT_ENABLE (R88E_HIMR_PSTIMEOUT | R88E_HIMR_HSISR_IND_ON_INT | \
+			R88E_HIMR_C2HCMD | R88E_HIMR_ROK | R88E_HIMR_VODOK | \
+			R88E_HIMR_VIDOK | R88E_HIMR_BEDOK | R88E_HIMR_BKDOK | \
+			R88E_HIMR_MGNTDOK | R88E_HIMR_HIGHDOK | R88E_HIMR_RDU)
 
 struct rtwn_softc {
 	/* sc_ops must be initialized by the attachment driver! */
@@ -95,10 +99,18 @@ struct rtwn_softc {
 	int				fwcur;
 	union {
 		struct r92c_rom		r92c_rom;
-		struct r88e_rom		r88e_rom;
+		struct {
+			struct r88e_rom	r88e_rom;
+			union {
+				struct r88e_pci_rom pci;
+				struct r88e_usb_rom usb;
+			} u;
+		} __packed _88e;
 	} u;
 #define sc_r92c_rom	u.r92c_rom
-#define sc_r88e_rom	u.r88e_rom
+#define sc_r88e_rom	u._88e.r88e_rom
+#define sc_r88e_pci_rom	u._88e.u.pci
+#define sc_r88e_usb_rom	u._88e.u.usb
 
 	uint32_t			rf_chnlbw[R92C_MAX_CHAINS];
 };