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authorAaron Campbell <aaron@cvs.openbsd.org>2000-07-03 02:59:25 +0000
committerAaron Campbell <aaron@cvs.openbsd.org>2000-07-03 02:59:25 +0000
commit1d2e65d31dea55ceaa861df95da29e74227bc118 (patch)
treeeacfea6d2769a0dd6a650052503ef5cbb1673520 /sys/dev/isa/i82365_isasubr.c
parentde981be5295eb2475cd90e39ae95071c374013c5 (diff)
From NetBSD:
- Fix an incorrect interrupt sharing type. - Always clear PCIC_INTR_ENABLE; it doesn't do what one might think. - Eliminate stray interrupts during the IRQ probe.
Diffstat (limited to 'sys/dev/isa/i82365_isasubr.c')
-rw-r--r--sys/dev/isa/i82365_isasubr.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/sys/dev/isa/i82365_isasubr.c b/sys/dev/isa/i82365_isasubr.c
index eb51eeb701d..24a765cf939 100644
--- a/sys/dev/isa/i82365_isasubr.c
+++ b/sys/dev/isa/i82365_isasubr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i82365_isasubr.c,v 1.12 2000/06/20 17:56:24 millert Exp $ */
+/* $OpenBSD: i82365_isasubr.c,v 1.13 2000/07/03 02:59:24 aaron Exp $ */
/* $NetBSD: i82365_isasubr.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */
/*
@@ -194,7 +194,7 @@ pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
struct pcic_handle *h = (struct pcic_handle *)pch;
struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
isa_chipset_tag_t ic = sc->intr_est;
- int irq, ist;
+ int irq, ist, reg;
void *ih;
if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
@@ -202,21 +202,22 @@ pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
ist = IST_PULSE;
else
- ist = IST_LEVEL;
+ ist = IST_EDGE;
irq = pcic_intr_find(sc, ist);
if (!irq)
return (NULL);
+ h->ih_irq = irq;
+ reg = pcic_read(h, PCIC_INTR);
+ reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
+ pcic_write(h, PCIC_INTR, reg | irq);
+
ih = isa_intr_establish(ic, irq, ist, ipl, fct, arg,
h->pcmcia->dv_xname);
if (!ih)
return (NULL);
- h->ih_irq = irq;
- pcic_write(h, PCIC_INTR,
- (pcic_read(h, PCIC_INTR) & ~PCIC_INTR_IRQ_MASK) | irq);
-
printf(" irq %d", irq);
return (ih);
}
@@ -233,11 +234,11 @@ pcic_isa_chip_intr_disestablish(pch, ih)
h->ih_irq = 0;
+ isa_intr_disestablish(ic, ih);
+
reg = pcic_read(h, PCIC_INTR);
reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
pcic_write(h, PCIC_INTR, reg);
-
- isa_intr_disestablish(ic, ih);
}
int