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authorJason Wright <jason@cvs.openbsd.org>1999-03-09 00:02:46 +0000
committerJason Wright <jason@cvs.openbsd.org>1999-03-09 00:02:46 +0000
commit53105b08943704bef27540b6d66cd96e849675fa (patch)
tree53797405e21f6582f9dae3904e19352cdb82e808 /sys/dev/mii
parent7714938277bc7a48caabbc41892578c1a8c37ef1 (diff)
reference docs
Diffstat (limited to 'sys/dev/mii')
-rw-r--r--sys/dev/mii/icsphyreg.h6
-rw-r--r--sys/dev/mii/nsphyreg.h6
-rw-r--r--sys/dev/mii/qsphyreg.h6
-rw-r--r--sys/dev/mii/sqphyreg.h6
4 files changed, 16 insertions, 8 deletions
diff --git a/sys/dev/mii/icsphyreg.h b/sys/dev/mii/icsphyreg.h
index efa8544ec8e..19151bbddca 100644
--- a/sys/dev/mii/icsphyreg.h
+++ b/sys/dev/mii/icsphyreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: icsphyreg.h,v 1.1 1998/11/11 19:34:46 jason Exp $ */
+/* $OpenBSD: icsphyreg.h,v 1.2 1999/03/09 00:02:44 jason Exp $ */
/* $NetBSD: icsphyreg.h,v 1.1 1998/11/02 23:46:20 thorpej Exp $ */
/*-
@@ -42,7 +42,9 @@
#define _DEV_MII_ICSPHYREG_H_
/*
- * ICS1890 registers.
+ * Register definitions for the ICS1890 Ethernet PHY
+ * Further documentation can be found at:
+ * http://www.icst.com/products/pinfo/1890.htm
*/
#define MII_ICSPHY_ECR 0x10 /* Extended Control Register */
diff --git a/sys/dev/mii/nsphyreg.h b/sys/dev/mii/nsphyreg.h
index 5fe0328fb70..0f8b37fee4d 100644
--- a/sys/dev/mii/nsphyreg.h
+++ b/sys/dev/mii/nsphyreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: nsphyreg.h,v 1.1 1998/09/10 17:17:34 jason Exp $ */
+/* $OpenBSD: nsphyreg.h,v 1.2 1999/03/09 00:02:45 jason Exp $ */
/* $NetBSD: nsphyreg.h,v 1.1 1998/08/10 23:58:39 thorpej Exp $ */
/*-
@@ -42,7 +42,9 @@
#define _DEV_MII_NSPHYREG_H_
/*
- * DP83840 registers.
+ * National Semiconductor DP83840 Ethernet PHY register definitions
+ * Further documentation can be found at:
+ * http://www.national.com/pf/DP/DP83840A.html
*/
#define MII_NSPHY_DCR 0x12 /* Disconnect counter */
diff --git a/sys/dev/mii/qsphyreg.h b/sys/dev/mii/qsphyreg.h
index 5194ccd180a..d8facaf2dd1 100644
--- a/sys/dev/mii/qsphyreg.h
+++ b/sys/dev/mii/qsphyreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: qsphyreg.h,v 1.1 1998/09/10 17:17:34 jason Exp $ */
+/* $OpenBSD: qsphyreg.h,v 1.2 1999/03/09 00:02:45 jason Exp $ */
/* $NetBSD: qsphyreg.h,v 1.1 1998/08/11 00:01:03 thorpej Exp $ */
/*-
@@ -42,7 +42,9 @@
#define _DEV_MII_QSPHYREG_H_
/*
- * QS6612 registers.
+ * Register definitions for the Quality Semiconductor QS6612
+ * Further documentation can be found at:
+ * http://www.qualitysemi.com/products/network.html
*/
#define MII_QSPHY_MCTL 0x11 /* Mode control */
diff --git a/sys/dev/mii/sqphyreg.h b/sys/dev/mii/sqphyreg.h
index 169c1de4c7e..cbee06d84ff 100644
--- a/sys/dev/mii/sqphyreg.h
+++ b/sys/dev/mii/sqphyreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: sqphyreg.h,v 1.1 1998/11/11 19:34:49 jason Exp $ */
+/* $OpenBSD: sqphyreg.h,v 1.2 1999/03/09 00:02:45 jason Exp $ */
/* $NetBSD: sqphyreg.h,v 1.1 1998/11/03 23:51:29 thorpej Exp $ */
/*-
@@ -42,7 +42,9 @@
#define _DEV_MII_SQPHYREG_H_
/*
- * Seeq 80220 registers.
+ * Seeq 80220 Register definitions.
+ * Further documentation can be found at:
+ * http://www.seeq.com/80220.html
*/
#define MII_SQPHY_CONFIG1 0x10 /* Configuration 1 Register */