diff options
| author | Owain Ainsworth <oga@cvs.openbsd.org> | 2008-11-22 04:52:46 +0000 |
|---|---|---|
| committer | Owain Ainsworth <oga@cvs.openbsd.org> | 2008-11-22 04:52:46 +0000 |
| commit | 4d03db53bf9cac1ae0dd6aade1bf2d3e738086e9 (patch) | |
| tree | 7a4449c40a3fb0caee8d16a4df8a682f11922fda /sys/dev/pci/drm/i915_drv.c | |
| parent | 176507e4b6297f38a38207cc353b910fe35600a4 (diff) | |
inteldrm currently checks the pcidev of the device every time it needs to check
what revision it is to determine which route to take.
instead, use the flags field of the pcidevs array to provide a static
list of flags related to series, type, and certain features and check those
instead. Makes me less sad and knocks another 600 bytes off my kernel.
Diffstat (limited to 'sys/dev/pci/drm/i915_drv.c')
| -rw-r--r-- | sys/dev/pci/drm/i915_drv.c | 63 |
1 files changed, 40 insertions, 23 deletions
diff --git a/sys/dev/pci/drm/i915_drv.c b/sys/dev/pci/drm/i915_drv.c index 0148f823798..672a99fb214 100644 --- a/sys/dev/pci/drm/i915_drv.c +++ b/sys/dev/pci/drm/i915_drv.c @@ -39,35 +39,52 @@ void i915drm_attach(struct device *, struct device *, void *); int inteldrm_ioctl(struct drm_device *, u_long, caddr_t, struct drm_file *); static drm_pci_id_list_t i915_pciidlist[] = { - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830M_IGD, CHIP_I8XX}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_IGD, CHIP_I8XX}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_IGD, CHIP_I8XX}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865G_IGD, CHIP_I8XX}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGD_1, CHIP_I9XX|CHIP_I915}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_IGD, CHIP_I9XX|CHIP_I915}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830M_IGD, + CHIP_I830|CHIP_M}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_IGD, + CHIP_I845G}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_IGD, + CHIP_I85X|CHIP_M}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865G_IGD, + CHIP_I865G}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGD_1, + CHIP_I915G|CHIP_I9XX}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_IGD, + CHIP_I915G|CHIP_I9XX}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD_1, - CHIP_I9XX|CHIP_I915}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945G_IGD_1, CHIP_I9XX|CHIP_I915}, + CHIP_I915GM|CHIP_I9XX|CHIP_M}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945G_IGD_1, + CHIP_I945G|CHIP_I9XX}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD_1, - CHIP_I9XX|CHIP_I915}, + CHIP_I945GM|CHIP_I9XX|CHIP_M}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_IGD_1, - CHIP_I9XX|CHIP_I915}, + CHIP_I945GM|CHIP_I9XX|CHIP_M}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_IGD_1, - CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_IGD_1, CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q965_IGD_1, CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G965_IGD_1, CHIP_I9XX|CHIP_I965}, + CHIP_I965|CHIP_I9XX}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_IGD_1, + CHIP_I965|CHIP_I9XX}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q965_IGD_1, + CHIP_I965|CHIP_I9XX}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G965_IGD_1, + CHIP_I965|CHIP_I9XX}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM965_IGD_1, - CHIP_I9XX|CHIP_I965}, + CHIP_I965GM|CHIP_I965|CHIP_I9XX|CHIP_M}, {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GME965_IGD_1, - CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_IGD_1, CHIP_I9XX|CHIP_I915}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_IGD_1, CHIP_I9XX|CHIP_I915}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_IGD_1, CHIP_I9XX|CHIP_I915}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IGD_1, CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, 0x2E02, CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IGD_1, CHIP_I9XX|CHIP_I965}, - {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_IGD_1, CHIP_I9XX|CHIP_I965}, + CHIP_I965|CHIP_I9XX}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_IGD_1, + CHIP_G33|CHIP_I9XX|CHIP_HWS}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_IGD_1, + CHIP_G33|CHIP_I9XX|CHIP_HWS}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_IGD_1, + CHIP_G33|CHIP_I9XX|CHIP_HWS}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IGD_1, + CHIP_GM45|CHIP_I965|CHIP_I9XX|CHIP_M|CHIP_HWS}, + {PCI_VENDOR_INTEL, 0x2E02, + CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IGD_1, + CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS}, + {PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_IGD_1, + CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS}, {0, 0, 0} }; |