Use DIV_ROUND_UP instead of howmany to reduce the diffs with Linux.

5 files changed, 24 insertions, 23 deletions

diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h
index c66e02ea10a..a18e65aca49 100644
--- a/sys/dev/pci/drm/drmP.h
+++ b/sys/dev/pci/drm/drmP.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: drmP.h,v 1.159 2014/01/21 08:55:24 kettenis Exp $ */
+/* $OpenBSD: drmP.h,v 1.160 2014/01/22 04:04:53 kettenis Exp $ */
 /* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
  * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
  */
@@ -147,6 +147,7 @@ typedef uint32_t __be32;
 #define __init
 #define ARRAY_SIZE nitems
 #define DRM_ARRAY_SIZE nitems
+#define DIV_ROUND_UP howmany
 
 #define ERESTARTSYS EINTR
 
diff --git a/sys/dev/pci/drm/i915/intel_display.c b/sys/dev/pci/drm/i915/intel_display.c
index 9f3002477f0..b10ee468ce2 100644
--- a/sys/dev/pci/drm/i915/intel_display.c
+++ b/sys/dev/pci/drm/i915/intel_display.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intel_display.c,v 1.19 2014/01/21 08:57:22 kettenis Exp $	*/
+/*	$OpenBSD: intel_display.c,v 1.20 2014/01/22 04:04:53 kettenis Exp $	*/
 /*
  * Copyright © 2006-2007 Intel Corporation
  *
@@ -6742,7 +6742,7 @@ intel_framebuffer_create(struct drm_device *dev,
 static u32
 intel_framebuffer_pitch_for_width(int width, int bpp)
 {
-	u32 pitch = howmany(width * bpp, 8);
+	u32 pitch = DIV_ROUND_UP(width * bpp, 8);
 	return roundup2(pitch, 64);
 }
 
diff --git a/sys/dev/pci/drm/i915/intel_dp.c b/sys/dev/pci/drm/i915/intel_dp.c
index a4b02898185..32afd838e8f 100644
--- a/sys/dev/pci/drm/i915/intel_dp.c
+++ b/sys/dev/pci/drm/i915/intel_dp.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intel_dp.c,v 1.11 2014/01/21 08:57:22 kettenis Exp $	*/
+/*	$OpenBSD: intel_dp.c,v 1.12 2014/01/22 04:04:53 kettenis Exp $	*/
 /*
  * Copyright © 2008 Intel Corporation
  *
@@ -388,7 +388,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
 		else
 			aux_clock_divider = 225; /* eDP input clock at 450Mhz */
 	} else if (HAS_PCH_SPLIT(dev))
-		aux_clock_divider = howmany(intel_pch_rawclk(dev), 2);
+		aux_clock_divider = DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
 	else
 		aux_clock_divider = intel_hrawclk(dev) / 2;
 
@@ -2681,7 +2681,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
 	assign_final(t11_t12);
 #undef assign_final
 
-#define get_delay(field)	(howmany(final.field, 10))
+#define get_delay(field)	(DIV_ROUND_UP(final.field, 10))
 	intel_dp->panel_power_up_delay = get_delay(t1_t3);
 	intel_dp->backlight_on_delay = get_delay(t8);
 	intel_dp->backlight_off_delay = get_delay(t9);
@@ -2717,7 +2717,7 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
 	 * formula. */
 	pp_div = ((100 * intel_pch_rawclk(dev))/2 - 1)
 			<< PP_REFERENCE_DIVIDER_SHIFT;
-	pp_div |= (howmany(seq->t11_t12, 1000)
+	pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000)
 			<< PANEL_POWER_CYCLE_DELAY_SHIFT);
 
 	/* Haswell doesn't have any port selection bits for the panel
diff --git a/sys/dev/pci/drm/i915/intel_pm.c b/sys/dev/pci/drm/i915/intel_pm.c
index f7faf111efa..b88f7283e2f 100644
--- a/sys/dev/pci/drm/i915/intel_pm.c
+++ b/sys/dev/pci/drm/i915/intel_pm.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intel_pm.c,v 1.14 2014/01/21 08:57:22 kettenis Exp $	*/
+/*	$OpenBSD: intel_pm.c,v 1.15 2014/01/22 04:04:53 kettenis Exp $	*/
 /*
  * Copyright © 2012 Intel Corporation
  *
@@ -1000,7 +1000,7 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
 	 */
 	entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /
 		1000;
-	entries_required = howmany(entries_required, wm->cacheline_size);
+	entries_required = DIV_ROUND_UP(entries_required, wm->cacheline_size);
 
 	DRM_DEBUG_KMS("FIFO entries required for mode: %ld\n", entries_required);
 
@@ -1131,7 +1131,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
 	tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8;
 	if (tlb_miss > 0)
 		entries += tlb_miss;
-	entries = howmany(entries, display->cacheline_size);
+	entries = DIV_ROUND_UP(entries, display->cacheline_size);
 	*plane_wm = entries + display->guard_size;
 	if (*plane_wm > (int)display->max_wm)
 		*plane_wm = display->max_wm;
@@ -1143,7 +1143,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
 	tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8;
 	if (tlb_miss > 0)
 		entries += tlb_miss;
-	entries = howmany(entries, cursor->cacheline_size);
+	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
 	*cursor_wm = entries + cursor->guard_size;
 	if (*cursor_wm > (int)cursor->max_wm)
 		*cursor_wm = (int)cursor->max_wm;
@@ -1219,12 +1219,12 @@ static bool g4x_compute_srwm(struct drm_device *dev,
 	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;
 	large = line_count * line_size;
 
-	entries = howmany(min(small, large), display->cacheline_size);
+	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
 	*display_wm = entries + display->guard_size;
 
 	/* calculate the self-refresh watermark for display cursor */
 	entries = line_count * pixel_size * 64;
-	entries = howmany(entries, cursor->cacheline_size);
+	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
 	*cursor_wm = entries + cursor->guard_size;
 
 	return g4x_check_srwm(dev,
@@ -1444,7 +1444,7 @@ static void i965_update_wm(struct drm_device *dev)
 		/* Use ns/us then divide to preserve precision */
 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
 			pixel_size * hdisplay;
-		entries = howmany(entries, I915_FIFO_LINE_SIZE);
+		entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);
 		srwm = I965_FIFO_SIZE - entries;
 		if (srwm < 0)
 			srwm = 1;
@@ -1454,7 +1454,7 @@ static void i965_update_wm(struct drm_device *dev)
 
 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
 			pixel_size * 64;
-		entries = howmany(entries,
+		entries = DIV_ROUND_UP(entries,
 					  i965_cursor_wm_info.cacheline_size);
 		cursor_sr = i965_cursor_wm_info.fifo_size -
 			(entries + i965_cursor_wm_info.guard_size);
@@ -1563,7 +1563,7 @@ static void i9xx_update_wm(struct drm_device *dev)
 		/* Use ns/us then divide to preserve precision */
 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
 			pixel_size * hdisplay;
-		entries = howmany(entries, wm_info->cacheline_size);
+		entries = DIV_ROUND_UP(entries, wm_info->cacheline_size);
 		DRM_DEBUG_KMS("self-refresh entries: %d\n", entries);
 		srwm = wm_info->fifo_size - entries;
 		if (srwm < 0)
@@ -1709,18 +1709,18 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
 	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;
 	large = line_count * line_size;
 
-	entries = howmany(min(small, large), display->cacheline_size);
+	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
 	*display_wm = entries + display->guard_size;
 
 	/*
 	 * Spec says:
 	 * FBC WM = ((Final Primary WM * 64) / number of bytes per line) + 2
 	 */
-	*fbc_wm = howmany(*display_wm * 64, line_size) + 2;
+	*fbc_wm = DIV_ROUND_UP(*display_wm * 64, line_size) + 2;
 
 	/* calculate the self-refresh watermark for display cursor */
 	entries = line_count * pixel_size * 64;
-	entries = howmany(entries, cursor->cacheline_size);
+	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
 	*cursor_wm = entries + cursor->guard_size;
 
 	return ironlake_check_srwm(dev, level,
@@ -2086,7 +2086,7 @@ sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,
 		sprite_width * 8;
 	if (tlb_miss > 0)
 		entries += tlb_miss;
-	entries = howmany(entries, display->cacheline_size);
+	entries = DIV_ROUND_UP(entries, display->cacheline_size);
 	*sprite_wm = entries + display->guard_size;
 	if (*sprite_wm > (int)display->max_wm)
 		*sprite_wm = display->max_wm;
@@ -2132,7 +2132,7 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
 	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;
 	large = line_count * line_size;
 
-	entries = howmany(min(small, large), display->cacheline_size);
+	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
 	*sprite_wm = entries + display->guard_size;
 
 	return *sprite_wm > 0x3ff ? false : true;
diff --git a/sys/dev/pci/drm/i915/intel_ringbuffer.c b/sys/dev/pci/drm/i915/intel_ringbuffer.c
index dab3e77ba1b..704516d31f1 100644
--- a/sys/dev/pci/drm/i915/intel_ringbuffer.c
+++ b/sys/dev/pci/drm/i915/intel_ringbuffer.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intel_ringbuffer.c,v 1.15 2014/01/21 08:57:22 kettenis Exp $	*/
+/*	$OpenBSD: intel_ringbuffer.c,v 1.16 2014/01/22 04:04:53 kettenis Exp $	*/
 /*
  * Copyright © 2008-2010 Intel Corporation
  *
@@ -1032,7 +1032,7 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring,
 				XY_SRC_COPY_BLT_WRITE_RGB);
 		intel_ring_emit(ring, BLT_DEPTH_32 | BLT_ROP_GXCOPY | 4096);
 		intel_ring_emit(ring, 0);
-		intel_ring_emit(ring, (howmany(len, 4096) << 16) | 1024);
+		intel_ring_emit(ring, (DIV_ROUND_UP(len, 4096) << 16) | 1024);
 		intel_ring_emit(ring, cs_offset);
 		intel_ring_emit(ring, 0);
 		intel_ring_emit(ring, 4096);