diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-02-27 05:34:14 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-02-27 05:34:14 +0000 |
| commit | f69762264f762c5a349846dd3c4afdba1bdfe029 (patch) | |
| tree | dbc9609f89abcc6d5e3e968d9eebb11b7d95207e /sys/dev/pci/drm | |
| parent | cac27cad5eb28538e62c18db17f7eaafefc1f8af (diff) | |
radeon: insert 10ms sleep in dce5_crtc_load_lut
From Daniel Vetter
f1b8859e8db0c47184ad383720a086ee7f892a59 in linux 4.19.y/4.19.106
ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2 in mainline linux
Diffstat (limited to 'sys/dev/pci/drm')
| -rw-r--r-- | sys/dev/pci/drm/radeon/radeon_display.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/radeon/radeon_display.c b/sys/dev/pci/drm/radeon/radeon_display.c index 3166950fcf4..cfb5bfe5814 100644 --- a/sys/dev/pci/drm/radeon/radeon_display.c +++ b/sys/dev/pci/drm/radeon/radeon_display.c @@ -121,6 +121,8 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc) DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); + drm_msleep(10); + WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset, (NI_INPUT_CSC_GRPH_MODE(NI_INPUT_CSC_BYPASS) | NI_INPUT_CSC_OVL_MODE(NI_INPUT_CSC_BYPASS))); |