Add flags for chipset generation in with the other chipset type flags

prevent the horrible constructs we use to determine generation
otherwise.

2 files changed, 48 insertions, 46 deletions

diff --git a/sys/dev/pci/drm/i915_drv.c b/sys/dev/pci/drm/i915_drv.c
index 2e4401e8552..fbbc171f4e5 100644
--- a/sys/dev/pci/drm/i915_drv.c
+++ b/sys/dev/pci/drm/i915_drv.c
@@ -208,53 +208,53 @@ void inteldrm_verify_inactive(struct drm_i915_private *, char *, int);
 
 const static struct drm_pcidev inteldrm_pciidlist[] = {
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830M_IGD,
-	    CHIP_I830|CHIP_M},
+	    CHIP_I830|CHIP_M|CHIP_GEN2},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_IGD,
-	    CHIP_I845G},
+	    CHIP_I845G|CHIP_GEN2},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_IGD,
-	    CHIP_I85X|CHIP_M},
+	    CHIP_I85X|CHIP_M|CHIP_GEN2},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865G_IGD,
-	    CHIP_I865G},
+	    CHIP_I865G|CHIP_GEN2},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGD_1,
-	    CHIP_I915G|CHIP_I9XX},
+	    CHIP_I915G|CHIP_I9XX|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_IGD,
-	    CHIP_I915G|CHIP_I9XX},
+	    CHIP_I915G|CHIP_I9XX|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD_1,
-	    CHIP_I915GM|CHIP_I9XX|CHIP_M},
+	    CHIP_I915GM|CHIP_I9XX|CHIP_M|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945G_IGD_1,
-	    CHIP_I945G|CHIP_I9XX},
+	    CHIP_I945G|CHIP_I9XX|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD_1,
-	    CHIP_I945GM|CHIP_I9XX|CHIP_M},
+	    CHIP_I945GM|CHIP_I9XX|CHIP_M|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_IGD_1,
-	    CHIP_I945GM|CHIP_I9XX|CHIP_M},
+	    CHIP_I945GM|CHIP_I9XX|CHIP_M|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_IGD_1,
-	    CHIP_I965|CHIP_I9XX},
+	    CHIP_I965|CHIP_I9XX|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_IGD_1,
-	    CHIP_I965|CHIP_I9XX},
+	    CHIP_I965|CHIP_I9XX|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q965_IGD_1,
-	    CHIP_I965|CHIP_I9XX},
+	    CHIP_I965|CHIP_I9XX|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G965_IGD_1,
-	    CHIP_I965|CHIP_I9XX},
+	    CHIP_I965|CHIP_I9XX|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM965_IGD_1,
-	    CHIP_I965GM|CHIP_I965|CHIP_I9XX|CHIP_M},
+	    CHIP_I965GM|CHIP_I965|CHIP_I9XX|CHIP_M|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GME965_IGD_1,
-	    CHIP_I965|CHIP_I9XX},
+	    CHIP_I965|CHIP_I9XX|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_IGD_1,
-	    CHIP_G33|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G33|CHIP_I9XX|CHIP_HWS|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_IGD_1,
-	    CHIP_G33|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G33|CHIP_I9XX|CHIP_HWS|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_IGD_1,
-	    CHIP_G33|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G33|CHIP_I9XX|CHIP_HWS|CHIP_GEN3},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IGD_1,
-	    CHIP_G4X|CHIP_GM45|CHIP_I965|CHIP_I9XX|CHIP_M|CHIP_HWS},
+	    CHIP_G4X|CHIP_GM45|CHIP_I965|CHIP_I9XX|CHIP_M|CHIP_HWS|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, 0x2E02,
-	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IGD_1,
-	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_IGD_1,
-	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
 	{PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_IGD_1,
-	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS},
+	    CHIP_G4X|CHIP_I965|CHIP_I9XX|CHIP_HWS|CHIP_GEN4},
 	{0, 0, 0}
 };
 
diff --git a/sys/dev/pci/drm/i915_drv.h b/sys/dev/pci/drm/i915_drv.h
index 81826988552..8bbee04a356 100644
--- a/sys/dev/pci/drm/i915_drv.h
+++ b/sys/dev/pci/drm/i915_drv.h
@@ -332,22 +332,26 @@ struct inteldrm_file {
 };
 
 /* chip type flags */
-#define CHIP_I830	0x0001
-#define CHIP_I845G	0x0002
-#define CHIP_I85X	0x0004
-#define CHIP_I865G	0x0008
-#define CHIP_I9XX	0x0010
-#define CHIP_I915G	0x0020
-#define CHIP_I915GM	0x0040
-#define CHIP_I945G	0x0080
-#define CHIP_I945GM	0x0100
-#define CHIP_I965	0x0200
-#define CHIP_I965GM	0x0400
-#define CHIP_G33	0x0800
-#define CHIP_GM45	0x1000
-#define CHIP_G4X	0x2000
-#define CHIP_M		0x4000
-#define CHIP_HWS	0x8000
+#define CHIP_I830	0x00001
+#define CHIP_I845G	0x00002
+#define CHIP_I85X	0x00004
+#define CHIP_I865G	0x00008
+#define CHIP_I9XX	0x00010
+#define CHIP_I915G	0x00020
+#define CHIP_I915GM	0x00040
+#define CHIP_I945G	0x00080
+#define CHIP_I945GM	0x00100
+#define CHIP_I965	0x00200
+#define CHIP_I965GM	0x00400
+#define CHIP_G33	0x00800
+#define CHIP_GM45	0x01000
+#define CHIP_G4X	0x02000
+#define CHIP_M		0x04000
+#define CHIP_HWS	0x08000
+#define CHIP_GEN2	0x10000
+#define CHIP_GEN3	0x20000
+#define CHIP_GEN4	0x40000
+#define CHIP_GEN6	0x80000
 
 /** driver private structure attached to each drm_gem_object */
 struct inteldrm_obj {
@@ -2324,12 +2328,10 @@ read64(struct drm_i915_private *dev_priv, bus_size_t off)
 
 #define HAS_RESET(dev_priv)	IS_I965G(dev_priv)
 
-#define IS_GEN2(dev_priv)	\
-	(dev_priv->flags & (CHIP_I830 | CHIP_I845G | CHIP_I85X | CHIP_I865G))
-#define IS_GEN3(dev_priv)	\
-	(dev_priv->flags & (CHIP_I915G|CHIP_I915GM|CHIP_I945G|CHIP_I945GM|CHIP_G33))
-#define IS_GEN4(dev_priv)	\
-	(dev_priv->flags & (CHIP_I965G)) /* XXX sandybridge */
+#define IS_GEN2(dev_priv)	(dev_priv->flags & CHIP_GEN2)
+#define IS_GEN3(dev_priv)	(dev_priv->flags & CHIP_GEN3)
+#define IS_GEN4(dev_priv)	(dev_priv->flags & CHIP_GEN4)
+#define IS_GEN6(dev_priv)	(dev_priv->flags & CHIP_GEN6)
 
 /*
  * Interrupts that are always left unmasked.