diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2024-10-07 05:25:27 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2024-10-07 05:25:27 +0000 |
| commit | e94a1e610d31fa1d0faa27999d391fa0c1c348bc (patch) | |
| tree | a09f6299699cb745a7bb19c538888864f22be53e /sys/dev/pci/drm | |
| parent | 6516db43beb129e453875ac59f079b19adeff9ba (diff) | |
drm/amd/display: Add HDMI DSC native YCbCr422 support
From Leo Ma
55fcbe5f60865717479a9d6a8d8d076c8f443759 in linux-6.6.y/6.6.54
07bfa9cdbf3cd2daadfaaba0601f126f45951ffa in mainline linux
Diffstat (limited to 'sys/dev/pci/drm')
| -rw-r--r-- | sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 | ||||
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dc_dsc.h | 3 | ||||
| -rw-r--r-- | sys/dev/pci/drm/amd/display/dc/dsc/dc_dsc.c | 5 |
3 files changed, 7 insertions, 5 deletions
diff --git a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 43173a1f99d..d390e3d62e5 100644 --- a/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -1115,7 +1115,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, params[count].num_slices_v = aconnector->dsc_settings.dsc_num_slices_v; params[count].bpp_overwrite = aconnector->dsc_settings.dsc_bits_per_pixel; params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported; - dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy); + dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); if (!dc_dsc_compute_bandwidth_range( stream->sink->ctx->dc->res_pool->dscs[0], stream->sink->ctx->dc->debug.dsc_min_slice_height_override, @@ -1583,7 +1583,7 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream, { struct dc_dsc_policy dsc_policy = {0}; - dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy); + dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0], stream->sink->ctx->dc->debug.dsc_min_slice_height_override, dsc_policy.min_target_bpp * 16, diff --git a/sys/dev/pci/drm/amd/display/dc/dc_dsc.h b/sys/dev/pci/drm/amd/display/dc/dc_dsc.h index fe3078b8789..01c07545ef6 100644 --- a/sys/dev/pci/drm/amd/display/dc/dc_dsc.h +++ b/sys/dev/pci/drm/amd/display/dc/dc_dsc.h @@ -100,7 +100,8 @@ uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps( */ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, - struct dc_dsc_policy *policy); + struct dc_dsc_policy *policy, + const enum dc_link_encoding_format link_encoding); void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); diff --git a/sys/dev/pci/drm/amd/display/dc/dsc/dc_dsc.c b/sys/dev/pci/drm/amd/display/dc/dsc/dc_dsc.c index 230be292ff3..9edc9b0e3f0 100644 --- a/sys/dev/pci/drm/amd/display/dc/dsc/dc_dsc.c +++ b/sys/dev/pci/drm/amd/display/dc/dsc/dc_dsc.c @@ -861,7 +861,7 @@ static bool setup_dsc_config( memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); - dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy); + dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy, link_encoding); pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; @@ -1134,7 +1134,8 @@ uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps( void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, - struct dc_dsc_policy *policy) + struct dc_dsc_policy *policy, + const enum dc_link_encoding_format link_encoding) { uint32_t bpc = 0; |