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authorPatrick Wildt <patrick@cvs.openbsd.org>2020-03-06 08:39:35 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2020-03-06 08:39:35 +0000
commit0f7d1eb38e8a6ee4cadc7a96203ed6d3db88f2e4 (patch)
treeebe38cd683dacb5700d4704ad5a43396a5fb16e1 /sys/dev/pci/files.pci
parentb2522b43a4b83aacbb47ea54787565effc6df37f (diff)
Add a PCI attachment driver for com(4). Intel has been removing legacy
I/O-Ports on recent machines. Instead the UARTs are memory mapped PCI- devices, as part of a so-called Low Power Subsystem (LPSS). Such an LPSS is also used for I2C and SPI, though they use different PCI device ids. Each LPSS contains the actual device, and some registers to control clocks, resets, etc. These private registers need to be saved and restored upon suspend/resume. Also we should read the current clock settings to calculate the frequency supplied to the device. The UART controller itself is based on Synopsys DesignWare IP, like we're used to from various ARM-based machines ok kettenis@
Diffstat (limited to 'sys/dev/pci/files.pci')
-rw-r--r--sys/dev/pci/files.pci6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/dev/pci/files.pci b/sys/dev/pci/files.pci
index 84771454407..da4a8d24b63 100644
--- a/sys/dev/pci/files.pci
+++ b/sys/dev/pci/files.pci
@@ -1,4 +1,4 @@
-# $OpenBSD: files.pci,v 1.344 2020/02/15 08:47:14 stsp Exp $
+# $OpenBSD: files.pci,v 1.345 2020/03/06 08:39:34 patrick Exp $
# $NetBSD: files.pci,v 1.20 1996/09/24 17:47:15 christos Exp $
#
# Config file and device description for machine-independent PCI code.
@@ -845,5 +845,9 @@ device rge: ether, ifnet, ifmedia
attach rge at pci
file dev/pci/if_rge.c rge
+# NS16550 compatible UART
+attach com at pci with com_pci
+file dev/pci/com_pci.c com_pci
+
include "dev/pci/files.agp"
include "dev/pci/drm/files.drm"