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authorBrad Smith <brad@cvs.openbsd.org>2005-11-28 20:26:05 +0000
committerBrad Smith <brad@cvs.openbsd.org>2005-11-28 20:26:05 +0000
commit97718349009029ab3f5fff034267ea582253dfdf (patch)
treeb7f02c5fabc865afe2a497e02d599002b3b94c17 /sys/dev/pci/if_bge.c
parent24da93a19fdcf62d0f263a30ac849dd24cc8a705 (diff)
back out the last 2 commits to bge(4) for now.
Diffstat (limited to 'sys/dev/pci/if_bge.c')
-rw-r--r--sys/dev/pci/if_bge.c132
1 files changed, 19 insertions, 113 deletions
diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c
index f2df2e47353..0680833aff4 100644
--- a/sys/dev/pci/if_bge.c
+++ b/sys/dev/pci/if_bge.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bge.c,v 1.105 2005/11/27 01:20:41 brad Exp $ */
+/* $OpenBSD: if_bge.c,v 1.106 2005/11/28 20:26:04 brad Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -176,12 +176,6 @@ int bge_miibus_readreg(struct device *, int, int);
void bge_miibus_writereg(struct device *, int, int, int);
void bge_miibus_statchg(struct device *);
-#define BGE_RESET_START 1
-#define BGE_RESET_STOP 2
-void bge_sig_pre_reset(struct bge_softc *, int);
-void bge_sig_post_reset(struct bge_softc *, int);
-void bge_sig_legacy(struct bge_softc *, int);
-void bge_stop_fw(struct bge_softc *);
void bge_reset(struct bge_softc *);
#define BGE_DEBUG
@@ -1270,7 +1264,6 @@ bge_chipinit(struct bge_softc *sc)
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS|
BGE_MODECTL_MAC_ATTN_INTR|BGE_MODECTL_HOST_SEND_BDS);
#endif
- BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
/*
* Disable memory write invalidate. Apparently it is not supported
@@ -1808,36 +1801,23 @@ bge_attach(struct device *parent, struct device *self, void *aux)
printf(": %s", intrstr);
/*
- * PCI Express check.
- */
- sc->bge_pcie = 0;
- if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
- NULL, NULL) != 0)
- sc->bge_pcie = 1;
-
- /*
- * ASF check.
+ * XXX: Broadcom Linux driver. Not in specs or eratta.
+ * PCI Express.
*/
- sc->bge_asf_mode = 0;
- if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER) {
- if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG)
- & BGE_HWCFG_ASF) {
- sc->bge_asf_mode |= ASF_ENABLE;
-
- if (CSR_READ_4(sc, BGE_MODE_CTL)
- & BGE_MODECTL_STACKUP)
- sc->bge_asf_mode |= ASF_STACKUP;
- if (BGE_IS_575X_PLUS(sc))
- sc->bge_asf_mode |= ASF_NEW_HANDSHAKE;
+ if (BGE_IS_575X_PLUS(sc)) {
+ u_int32_t v;
+
+ v = pci_conf_read(pc, pa->pa_tag, BGE_PCI_MSI_CAPID);
+ if (((v >> 8) & 0xff) == BGE_PCIE_CAPID_REG) {
+ v = pci_conf_read(pc, pa->pa_tag, BGE_PCIE_CAPID_REG);
+ if ((v & 0xff) == BGE_PCIE_CAPID)
+ sc->bge_pcie = 1;
}
}
/* Try to reset the chip. */
- bge_stop_fw(sc);
- bge_sig_pre_reset(sc, BGE_RESET_STOP);
+ DPRINTFN(5, ("bge_reset\n"));
bge_reset(sc);
- bge_sig_legacy(sc, BGE_RESET_STOP);
- bge_sig_post_reset(sc, BGE_RESET_STOP);
if (bge_chipinit(sc)) {
printf(": chip initialization failed\n");
@@ -2046,70 +2026,6 @@ fail_1:
}
void
-bge_sig_pre_reset(struct bge_softc *sc, int type)
-{
- bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
-
- if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
- switch (type) {
- case BGE_RESET_START:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */
- break;
- case BGE_RESET_STOP:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */
- break;
- }
- }
-}
-
-void
-bge_sig_post_reset(struct bge_softc *sc, int type)
-{
- if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) {
- switch (type) {
- case BGE_RESET_START:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000001);
- /* START DONE */
- break;
- case BGE_RESET_STOP:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000002);
- break;
- }
- }
-}
-
-void
-bge_sig_legacy(struct bge_softc *sc, int type)
-{
- if (sc->bge_asf_mode) {
- switch (type) {
- case BGE_RESET_START:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */
- break;
- case BGE_RESET_STOP:
- bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */
- break;
- }
- }
-}
-
-void
-bge_stop_fw(struct bge_softc *sc)
-{
- int i;
-
- if (sc->bge_asf_mode) {
- bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, BGE_FW_PAUSE);
-
- for (i = 0; i < 100; i++ ) {
- if (!(CSR_READ_4(sc, BGE_CPU_EVENT) & (1 << 14)))
- break;
- DELAY(10);
- }
- }
-}
-
-void
bge_reset(struct bge_softc *sc)
{
struct pci_attach_args *pa = &sc->bge_pa;
@@ -2170,6 +2086,12 @@ bge_reset(struct bge_softc *sc)
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
/*
+ * Prevent PXE restart: write a magic number to the
+ * general communications memory at 0xB50.
+ */
+ bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
+
+ /*
* Poll the value location we just wrote until
* we see the 1's complement of the magic number.
* This indicates that the firmware initialization
@@ -2212,8 +2134,6 @@ bge_reset(struct bge_softc *sc)
/* Fix up byte swapping */
CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS);
- if (sc->bge_asf_mode & ASF_STACKUP)
- BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
@@ -2996,13 +2916,7 @@ bge_init(void *xsc)
/* Cancel pending I/O and flush buffers. */
bge_stop(sc);
-
- bge_stop_fw(sc);
- bge_sig_pre_reset(sc, BGE_RESET_START);
bge_reset(sc);
- bge_sig_legacy(sc, BGE_RESET_START);
- bge_sig_post_reset(sc, BGE_RESET_START);
-
bge_chipinit(sc);
/*
@@ -3387,15 +3301,7 @@ bge_stop(struct bge_softc *sc)
/*
* Tell firmware we're shutting down.
*/
- bge_stop_fw(sc);
- bge_sig_pre_reset(sc, BGE_RESET_STOP);
- bge_reset(sc);
- bge_sig_legacy(sc, BGE_RESET_STOP);
- bge_sig_post_reset(sc, BGE_RESET_STOP);
- if (sc->bge_asf_mode & ASF_STACKUP)
- BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
- else
- BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
+ BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
/* Free the RX lists. */
bge_free_rx_ring_std(sc);