summaryrefslogtreecommitdiff
path: root/sys/dev/pci/if_em_hw.c
diff options
context:
space:
mode:
authorTheo de Raadt <deraadt@cvs.openbsd.org>2007-05-09 18:02:47 +0000
committerTheo de Raadt <deraadt@cvs.openbsd.org>2007-05-09 18:02:47 +0000
commit316d478e2c695308738cbcc03c28e9ca66fa6bf5 (patch)
treeb2d90b071b7273c56263985abcaed79aa510c532 /sys/dev/pci/if_em_hw.c
parent3c88bfc5895f23f9b093854fbb2623d0ed11c61a (diff)
delete unused functions. typical vendor garbage driver..; ok kettenis
Diffstat (limited to 'sys/dev/pci/if_em_hw.c')
-rw-r--r--sys/dev/pci/if_em_hw.c961
1 files changed, 1 insertions, 960 deletions
diff --git a/sys/dev/pci/if_em_hw.c b/sys/dev/pci/if_em_hw.c
index bac45c1bedc..d0827892f66 100644
--- a/sys/dev/pci/if_em_hw.c
+++ b/sys/dev/pci/if_em_hw.c
@@ -31,7 +31,7 @@
*******************************************************************************/
-/* $OpenBSD: if_em_hw.c,v 1.25 2007/03/16 00:07:37 reyk Exp $ */
+/* $OpenBSD: if_em_hw.c,v 1.26 2007/05/09 18:02:46 deraadt Exp $ */
/* if_em_hw.c
* Shared functions for accessing and configuring the MAC
@@ -80,9 +80,7 @@ static int32_t em_write_kmrn_reg(struct em_hw *hw, uint32_t reg_addr, uint16_t d
static int32_t em_get_software_semaphore(struct em_hw *hw);
static void em_release_software_semaphore(struct em_hw *hw);
-static uint8_t em_arc_subsystem_valid(struct em_hw *hw);
static int32_t em_check_downshift(struct em_hw *hw);
-static int32_t em_check_polarity(struct em_hw *hw, em_rev_polarity *polarity);
static void em_clear_vfta(struct em_hw *hw);
static int32_t em_commit_shadow_ram(struct em_hw *hw);
static int32_t em_config_dsp_after_link_change(struct em_hw *hw, boolean_t link_up);
@@ -104,15 +102,9 @@ static void em_initialize_hardware_bits(struct em_hw *hw);
static boolean_t em_is_onboard_nvm_eeprom(struct em_hw *hw);
static int32_t em_kumeran_lock_loss_workaround(struct em_hw *hw);
static int32_t em_mng_enable_host_if(struct em_hw *hw);
-static int32_t em_mng_host_if_write(struct em_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum);
-static int32_t em_mng_write_cmd_header(struct em_hw* hw, struct em_host_mng_command_header* hdr);
-static int32_t em_mng_write_commit(struct em_hw *hw);
-static int32_t em_phy_ife_get_info(struct em_hw *hw, struct em_phy_info *phy_info);
-static int32_t em_phy_igp_get_info(struct em_hw *hw, struct em_phy_info *phy_info);
static int32_t em_read_eeprom_eerd(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
static int32_t em_write_eeprom_eewr(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
static int32_t em_poll_eerd_eewr_done(struct em_hw *hw, int eerd);
-static int32_t em_phy_m88_get_info(struct em_hw *hw, struct em_phy_info *phy_info);
static void em_put_hw_eeprom_semaphore(struct em_hw *hw);
static int32_t em_read_ich8_byte(struct em_hw *hw, uint32_t index, uint8_t *data);
static int32_t em_verify_write_ich8_byte(struct em_hw *hw, uint32_t index, uint8_t byte);
@@ -3950,54 +3942,6 @@ em_phy_reset(struct em_hw *hw)
}
/******************************************************************************
-* Work-around for 82566 power-down: on D3 entry-
-* 1) disable gigabit link
-* 2) write VR power-down enable
-* 3) read it back
-* if successful continue, else issue LCD reset and repeat
-*
-* hw - struct containing variables accessed by shared code
-******************************************************************************/
-void
-em_phy_powerdown_workaround(struct em_hw *hw)
-{
- int32_t reg;
- uint16_t phy_data;
- int32_t retry = 0;
-
- DEBUGFUNC("em_phy_powerdown_workaround");
-
- if (hw->phy_type != em_phy_igp_3)
- return;
-
- do {
- /* Disable link */
- reg = E1000_READ_REG(hw, PHY_CTRL);
- E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE |
- E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
-
- /* Write VR power-down enable - bits 9:8 should be 10b */
- em_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
- phy_data |= (1 << 9);
- phy_data &= ~(1 << 8);
- em_write_phy_reg(hw, IGP3_VR_CTRL, phy_data);
-
- /* Read it back and test */
- em_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
- if (((phy_data & IGP3_VR_CTRL_MODE_MASK) == IGP3_VR_CTRL_MODE_SHUT) || retry)
- break;
-
- /* Issue PHY reset and repeat at most one more time */
- reg = E1000_READ_REG(hw, CTRL);
- E1000_WRITE_REG(hw, CTRL, reg | E1000_CTRL_PHY_RST);
- retry++;
- } while (retry);
-
- return;
-
-}
-
-/******************************************************************************
* Work-around for 82566 Kumeran PCS lock loss:
* On link status change (i.e. PCI reset, speed change) and link is up and
* speed is gigabit-
@@ -4182,277 +4126,6 @@ em_phy_reset_dsp(struct em_hw *hw)
}
/******************************************************************************
-* Get PHY information from various PHY registers for igp PHY only.
-*
-* hw - Struct containing variables accessed by shared code
-* phy_info - PHY information structure
-******************************************************************************/
-STATIC int32_t
-em_phy_igp_get_info(struct em_hw *hw,
- struct em_phy_info *phy_info)
-{
- int32_t ret_val;
- uint16_t phy_data, min_length, max_length, average;
- em_rev_polarity polarity;
-
- DEBUGFUNC("em_phy_igp_get_info");
-
- /* The downshift status is checked only once, after link is established,
- * and it stored in the hw->speed_downgraded parameter. */
- phy_info->downshift = (em_downshift)hw->speed_downgraded;
-
- /* IGP01E1000 does not need to support it. */
- phy_info->extended_10bt_distance = em_10bt_ext_dist_enable_normal;
-
- /* IGP01E1000 always correct polarity reversal */
- phy_info->polarity_correction = em_polarity_reversal_enabled;
-
- /* Check polarity status */
- ret_val = em_check_polarity(hw, &polarity);
- if (ret_val)
- return ret_val;
-
- phy_info->cable_polarity = polarity;
-
- ret_val = em_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->mdix_mode = (em_auto_x_mode)((phy_data & IGP01E1000_PSSR_MDIX) >>
- IGP01E1000_PSSR_MDIX_SHIFT);
-
- if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) ==
- IGP01E1000_PSSR_SPEED_1000MBPS) {
- /* Local/Remote Receiver Information are only valid at 1000 Mbps */
- ret_val = em_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >>
- SR_1000T_LOCAL_RX_STATUS_SHIFT) ?
- em_1000t_rx_status_ok : em_1000t_rx_status_not_ok;
- phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >>
- SR_1000T_REMOTE_RX_STATUS_SHIFT) ?
- em_1000t_rx_status_ok : em_1000t_rx_status_not_ok;
-
- /* Get cable length */
- ret_val = em_get_cable_length(hw, &min_length, &max_length);
- if (ret_val)
- return ret_val;
-
- /* Translate to old method */
- average = (max_length + min_length) / 2;
-
- if (average <= em_igp_cable_length_50)
- phy_info->cable_length = em_cable_length_50;
- else if (average <= em_igp_cable_length_80)
- phy_info->cable_length = em_cable_length_50_80;
- else if (average <= em_igp_cable_length_110)
- phy_info->cable_length = em_cable_length_80_110;
- else if (average <= em_igp_cable_length_140)
- phy_info->cable_length = em_cable_length_110_140;
- else
- phy_info->cable_length = em_cable_length_140;
- }
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
-* Get PHY information from various PHY registers for ife PHY only.
-*
-* hw - Struct containing variables accessed by shared code
-* phy_info - PHY information structure
-******************************************************************************/
-STATIC int32_t
-em_phy_ife_get_info(struct em_hw *hw,
- struct em_phy_info *phy_info)
-{
- int32_t ret_val;
- uint16_t phy_data;
- em_rev_polarity polarity;
-
- DEBUGFUNC("em_phy_ife_get_info");
-
- phy_info->downshift = (em_downshift)hw->speed_downgraded;
- phy_info->extended_10bt_distance = em_10bt_ext_dist_enable_normal;
-
- ret_val = em_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data);
- if (ret_val)
- return ret_val;
- phy_info->polarity_correction =
- ((phy_data & IFE_PSC_AUTO_POLARITY_DISABLE) >>
- IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT) ?
- em_polarity_reversal_disabled : em_polarity_reversal_enabled;
-
- if (phy_info->polarity_correction == em_polarity_reversal_enabled) {
- ret_val = em_check_polarity(hw, &polarity);
- if (ret_val)
- return ret_val;
- } else {
- /* Polarity is forced. */
- polarity = ((phy_data & IFE_PSC_FORCE_POLARITY) >>
- IFE_PSC_FORCE_POLARITY_SHIFT) ?
- em_rev_polarity_reversed : em_rev_polarity_normal;
- }
- phy_info->cable_polarity = polarity;
-
- ret_val = em_read_phy_reg(hw, IFE_PHY_MDIX_CONTROL, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->mdix_mode = (em_auto_x_mode)
- ((phy_data & (IFE_PMC_AUTO_MDIX | IFE_PMC_FORCE_MDIX)) >>
- IFE_PMC_MDIX_MODE_SHIFT);
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
-* Get PHY information from various PHY registers fot m88 PHY only.
-*
-* hw - Struct containing variables accessed by shared code
-* phy_info - PHY information structure
-******************************************************************************/
-STATIC int32_t
-em_phy_m88_get_info(struct em_hw *hw,
- struct em_phy_info *phy_info)
-{
- int32_t ret_val;
- uint16_t phy_data;
- em_rev_polarity polarity;
-
- DEBUGFUNC("em_phy_m88_get_info");
-
- /* The downshift status is checked only once, after link is established,
- * and it stored in the hw->speed_downgraded parameter. */
- phy_info->downshift = (em_downshift)hw->speed_downgraded;
-
- ret_val = em_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->extended_10bt_distance =
- ((phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) >>
- M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT) ?
- em_10bt_ext_dist_enable_lower : em_10bt_ext_dist_enable_normal;
-
- phy_info->polarity_correction =
- ((phy_data & M88E1000_PSCR_POLARITY_REVERSAL) >>
- M88E1000_PSCR_POLARITY_REVERSAL_SHIFT) ?
- em_polarity_reversal_disabled : em_polarity_reversal_enabled;
-
- /* Check polarity status */
- ret_val = em_check_polarity(hw, &polarity);
- if (ret_val)
- return ret_val;
- phy_info->cable_polarity = polarity;
-
- ret_val = em_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->mdix_mode = (em_auto_x_mode)((phy_data & M88E1000_PSSR_MDIX) >>
- M88E1000_PSSR_MDIX_SHIFT);
-
- if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
- /* Cable Length Estimation and Local/Remote Receiver Information
- * are only valid at 1000 Mbps.
- */
- if (hw->phy_type != em_phy_gg82563) {
- phy_info->cable_length = (em_cable_length)((phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
- M88E1000_PSSR_CABLE_LENGTH_SHIFT);
- } else {
- ret_val = em_read_phy_reg(hw, GG82563_PHY_DSP_DISTANCE,
- &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->cable_length = (em_cable_length)(phy_data & GG82563_DSPD_CABLE_LENGTH);
- }
-
- ret_val = em_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >>
- SR_1000T_LOCAL_RX_STATUS_SHIFT) ?
- em_1000t_rx_status_ok : em_1000t_rx_status_not_ok;
- phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >>
- SR_1000T_REMOTE_RX_STATUS_SHIFT) ?
- em_1000t_rx_status_ok : em_1000t_rx_status_not_ok;
- }
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
-* Get PHY information from various PHY registers
-*
-* hw - Struct containing variables accessed by shared code
-* phy_info - PHY information structure
-******************************************************************************/
-int32_t
-em_phy_get_info(struct em_hw *hw,
- struct em_phy_info *phy_info)
-{
- int32_t ret_val;
- uint16_t phy_data;
-
- DEBUGFUNC("em_phy_get_info");
-
- phy_info->cable_length = em_cable_length_undefined;
- phy_info->extended_10bt_distance = em_10bt_ext_dist_enable_undefined;
- phy_info->cable_polarity = em_rev_polarity_undefined;
- phy_info->downshift = em_downshift_undefined;
- phy_info->polarity_correction = em_polarity_reversal_undefined;
- phy_info->mdix_mode = em_auto_x_mode_undefined;
- phy_info->local_rx = em_1000t_rx_status_undefined;
- phy_info->remote_rx = em_1000t_rx_status_undefined;
-
- if (hw->media_type != em_media_type_copper) {
- DEBUGOUT("PHY info is only valid for copper media\n");
- return -E1000_ERR_CONFIG;
- }
-
- ret_val = em_read_phy_reg(hw, PHY_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- ret_val = em_read_phy_reg(hw, PHY_STATUS, &phy_data);
- if (ret_val)
- return ret_val;
-
- if ((phy_data & MII_SR_LINK_STATUS) != MII_SR_LINK_STATUS) {
- DEBUGOUT("PHY info is only valid if link is up\n");
- return -E1000_ERR_CONFIG;
- }
-
- if (hw->phy_type == em_phy_igp ||
- hw->phy_type == em_phy_igp_3 ||
- hw->phy_type == em_phy_igp_2)
- return em_phy_igp_get_info(hw, phy_info);
- else if (hw->phy_type == em_phy_ife)
- return em_phy_ife_get_info(hw, phy_info);
- else
- return em_phy_m88_get_info(hw, phy_info);
-}
-
-int32_t
-em_validate_mdi_setting(struct em_hw *hw)
-{
- DEBUGFUNC("em_validate_mdi_settings");
-
- if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) {
- DEBUGOUT("Invalid MDI setting detected\n");
- hw->mdix = 1;
- return -E1000_ERR_CONFIG;
- }
- return E1000_SUCCESS;
-}
-
-
-/******************************************************************************
* Sets up eeprom variables in the hw struct. Must be called after mac_type
* is configured. Additionally, if this is ICH8, the flash controller GbE
* registers must be mapped, or this will crash.
@@ -6088,35 +5761,6 @@ em_rar_set(struct em_hw *hw,
}
/******************************************************************************
- * Writes a value to the specified offset in the VLAN filter table.
- *
- * hw - Struct containing variables accessed by shared code
- * offset - Offset in VLAN filer table to write
- * value - Value to write into VLAN filter table
- *****************************************************************************/
-void
-em_write_vfta(struct em_hw *hw,
- uint32_t offset,
- uint32_t value)
-{
- uint32_t temp;
-
- if (hw->mac_type == em_ich8lan)
- return;
-
- if ((hw->mac_type == em_82544) && ((offset & 0x1) == 1)) {
- temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1));
- E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
- E1000_WRITE_FLUSH(hw);
- E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp);
- E1000_WRITE_FLUSH(hw);
- } else {
- E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
- E1000_WRITE_FLUSH(hw);
- }
-}
-
-/******************************************************************************
* Clears the VLAN filer table
*
* hw - Struct containing variables accessed by shared code
@@ -6234,244 +5878,6 @@ em_id_led_init(struct em_hw * hw)
}
/******************************************************************************
- * Prepares SW controlable LED for use and saves the current state of the LED.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-int32_t
-em_setup_led(struct em_hw *hw)
-{
- uint32_t ledctl;
- int32_t ret_val = E1000_SUCCESS;
-
- DEBUGFUNC("em_setup_led");
-
- switch (hw->mac_type) {
- case em_82542_rev2_0:
- case em_82542_rev2_1:
- case em_82543:
- case em_82544:
- /* No setup necessary */
- break;
- case em_82541:
- case em_82547:
- case em_82541_rev_2:
- case em_82547_rev_2:
- /* Turn off PHY Smart Power Down (if enabled) */
- ret_val = em_read_phy_reg(hw, IGP01E1000_GMII_FIFO,
- &hw->phy_spd_default);
- if (ret_val)
- return ret_val;
- ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
- (uint16_t)(hw->phy_spd_default &
- ~IGP01E1000_GMII_SPD));
- if (ret_val)
- return ret_val;
- /* FALLTHROUGH */
- default:
- if (hw->media_type == em_media_type_fiber) {
- ledctl = E1000_READ_REG(hw, LEDCTL);
- /* Save current LEDCTL settings */
- hw->ledctl_default = ledctl;
- /* Turn off LED0 */
- ledctl &= ~(E1000_LEDCTL_LED0_IVRT |
- E1000_LEDCTL_LED0_BLINK |
- E1000_LEDCTL_LED0_MODE_MASK);
- ledctl |= (E1000_LEDCTL_MODE_LED_OFF <<
- E1000_LEDCTL_LED0_MODE_SHIFT);
- E1000_WRITE_REG(hw, LEDCTL, ledctl);
- } else if (hw->media_type == em_media_type_copper)
- E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_mode1);
- break;
- }
-
- return E1000_SUCCESS;
-}
-
-
-/******************************************************************************
- * Used on 82571 and later Si that has LED blink bits.
- * Callers must use their own timer and should have already called
- * em_id_led_init()
- * Call em_cleanup led() to stop blinking
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-int32_t
-em_blink_led_start(struct em_hw *hw)
-{
- int16_t i;
- uint32_t ledctl_blink = 0;
-
- DEBUGFUNC("em_id_led_blink_on");
-
- if (hw->mac_type < em_82571) {
- /* Nothing to do */
- return E1000_SUCCESS;
- }
- if (hw->media_type == em_media_type_fiber) {
- /* always blink LED0 for PCI-E fiber */
- ledctl_blink = E1000_LEDCTL_LED0_BLINK |
- (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
- } else {
- /* set the blink bit for each LED that's "on" (0x0E) in ledctl_mode2 */
- ledctl_blink = hw->ledctl_mode2;
- for (i=0; i < 4; i++)
- if (((hw->ledctl_mode2 >> (i * 8)) & 0xFF) ==
- E1000_LEDCTL_MODE_LED_ON)
- ledctl_blink |= (E1000_LEDCTL_LED0_BLINK << (i * 8));
- }
-
- E1000_WRITE_REG(hw, LEDCTL, ledctl_blink);
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
- * Restores the saved state of the SW controlable LED.
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-int32_t
-em_cleanup_led(struct em_hw *hw)
-{
- int32_t ret_val = E1000_SUCCESS;
-
- DEBUGFUNC("em_cleanup_led");
-
- switch (hw->mac_type) {
- case em_82542_rev2_0:
- case em_82542_rev2_1:
- case em_82543:
- case em_82544:
- /* No cleanup necessary */
- break;
- case em_82541:
- case em_82547:
- case em_82541_rev_2:
- case em_82547_rev_2:
- /* Turn on PHY Smart Power Down (if previously enabled) */
- ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
- hw->phy_spd_default);
- if (ret_val)
- return ret_val;
- /* FALLTHROUGH */
- default:
- if (hw->phy_type == em_phy_ife) {
- em_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
- break;
- }
- /* Restore LEDCTL settings */
- E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_default);
- break;
- }
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
- * Turns on the software controllable LED
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-int32_t
-em_led_on(struct em_hw *hw)
-{
- uint32_t ctrl = E1000_READ_REG(hw, CTRL);
-
- DEBUGFUNC("em_led_on");
-
- switch (hw->mac_type) {
- case em_82542_rev2_0:
- case em_82542_rev2_1:
- case em_82543:
- /* Set SW Defineable Pin 0 to turn on the LED */
- ctrl |= E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- break;
- case em_82544:
- if (hw->media_type == em_media_type_fiber) {
- /* Set SW Defineable Pin 0 to turn on the LED */
- ctrl |= E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- } else {
- /* Clear SW Defineable Pin 0 to turn on the LED */
- ctrl &= ~E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- }
- break;
- default:
- if (hw->media_type == em_media_type_fiber) {
- /* Clear SW Defineable Pin 0 to turn on the LED */
- ctrl &= ~E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- } else if (hw->phy_type == em_phy_ife) {
- em_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
- (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_ON));
- } else if (hw->media_type == em_media_type_copper) {
- E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_mode2);
- return E1000_SUCCESS;
- }
- break;
- }
-
- E1000_WRITE_REG(hw, CTRL, ctrl);
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
- * Turns off the software controllable LED
- *
- * hw - Struct containing variables accessed by shared code
- *****************************************************************************/
-int32_t
-em_led_off(struct em_hw *hw)
-{
- uint32_t ctrl = E1000_READ_REG(hw, CTRL);
-
- DEBUGFUNC("em_led_off");
-
- switch (hw->mac_type) {
- case em_82542_rev2_0:
- case em_82542_rev2_1:
- case em_82543:
- /* Clear SW Defineable Pin 0 to turn off the LED */
- ctrl &= ~E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- break;
- case em_82544:
- if (hw->media_type == em_media_type_fiber) {
- /* Clear SW Defineable Pin 0 to turn off the LED */
- ctrl &= ~E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- } else {
- /* Set SW Defineable Pin 0 to turn off the LED */
- ctrl |= E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- }
- break;
- default:
- if (hw->media_type == em_media_type_fiber) {
- /* Set SW Defineable Pin 0 to turn off the LED */
- ctrl |= E1000_CTRL_SWDPIN0;
- ctrl |= E1000_CTRL_SWDPIO0;
- } else if (hw->phy_type == em_phy_ife) {
- em_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
- (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_OFF));
- } else if (hw->media_type == em_media_type_copper) {
- E1000_WRITE_REG(hw, LEDCTL, hw->ledctl_mode1);
- return E1000_SUCCESS;
- }
- break;
- }
-
- E1000_WRITE_REG(hw, CTRL, ctrl);
-
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
* Clears all hardware statistics counters.
*
* hw - Struct containing variables accessed by shared code
@@ -6571,73 +5977,6 @@ em_clear_hw_cntrs(struct em_hw *hw)
}
/******************************************************************************
- * Resets Adaptive IFS to its default state.
- *
- * hw - Struct containing variables accessed by shared code
- *
- * Call this after em_init_hw. You may override the IFS defaults by setting
- * hw->ifs_params_forced to TRUE. However, you must initialize hw->
- * current_ifs_val, ifs_min_val, ifs_max_val, ifs_step_size, and ifs_ratio
- * before calling this function.
- *****************************************************************************/
-void
-em_reset_adaptive(struct em_hw *hw)
-{
- DEBUGFUNC("em_reset_adaptive");
-
- if (hw->adaptive_ifs) {
- if (!hw->ifs_params_forced) {
- hw->current_ifs_val = 0;
- hw->ifs_min_val = IFS_MIN;
- hw->ifs_max_val = IFS_MAX;
- hw->ifs_step_size = IFS_STEP;
- hw->ifs_ratio = IFS_RATIO;
- }
- hw->in_ifs_mode = FALSE;
- E1000_WRITE_REG(hw, AIT, 0);
- } else {
- DEBUGOUT("Not in Adaptive IFS mode!\n");
- }
-}
-
-/******************************************************************************
- * Called during the callback/watchdog routine to update IFS value based on
- * the ratio of transmits to collisions.
- *
- * hw - Struct containing variables accessed by shared code
- * tx_packets - Number of transmits since last callback
- * total_collisions - Number of collisions since last callback
- *****************************************************************************/
-void
-em_update_adaptive(struct em_hw *hw)
-{
- DEBUGFUNC("em_update_adaptive");
-
- if (hw->adaptive_ifs) {
- if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) {
- if (hw->tx_packet_delta > MIN_NUM_XMITS) {
- hw->in_ifs_mode = TRUE;
- if (hw->current_ifs_val < hw->ifs_max_val) {
- if (hw->current_ifs_val == 0)
- hw->current_ifs_val = hw->ifs_min_val;
- else
- hw->current_ifs_val += hw->ifs_step_size;
- E1000_WRITE_REG(hw, AIT, hw->current_ifs_val);
- }
- }
- } else {
- if (hw->in_ifs_mode && (hw->tx_packet_delta <= MIN_NUM_XMITS)) {
- hw->current_ifs_val = 0;
- hw->in_ifs_mode = FALSE;
- E1000_WRITE_REG(hw, AIT, 0);
- }
- }
- } else {
- DEBUGOUT("Not in Adaptive IFS mode!\n");
- }
-}
-
-/******************************************************************************
* Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
*
* hw - Struct containing variables accessed by shared code
@@ -7000,83 +6339,6 @@ em_get_cable_length(struct em_hw *hw,
}
/******************************************************************************
- * Check the cable polarity
- *
- * hw - Struct containing variables accessed by shared code
- * polarity - output parameter : 0 - Polarity is not reversed
- * 1 - Polarity is reversed.
- *
- * returns: - E1000_ERR_XXX
- * E1000_SUCCESS
- *
- * For phy's older then IGP, this function simply reads the polarity bit in the
- * Phy Status register. For IGP phy's, this bit is valid only if link speed is
- * 10 Mbps. If the link speed is 100 Mbps there is no polarity so this bit will
- * return 0. If the link speed is 1000 Mbps the polarity status is in the
- * IGP01E1000_PHY_PCS_INIT_REG.
- *****************************************************************************/
-STATIC int32_t
-em_check_polarity(struct em_hw *hw,
- em_rev_polarity *polarity)
-{
- int32_t ret_val;
- uint16_t phy_data;
-
- DEBUGFUNC("em_check_polarity");
-
- if ((hw->phy_type == em_phy_m88) ||
- (hw->phy_type == em_phy_gg82563)) {
- /* return the Polarity bit in the Status register. */
- ret_val = em_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
- &phy_data);
- if (ret_val)
- return ret_val;
- *polarity = ((phy_data & M88E1000_PSSR_REV_POLARITY) >>
- M88E1000_PSSR_REV_POLARITY_SHIFT) ?
- em_rev_polarity_reversed : em_rev_polarity_normal;
-
- } else if (hw->phy_type == em_phy_igp ||
- hw->phy_type == em_phy_igp_3 ||
- hw->phy_type == em_phy_igp_2) {
- /* Read the Status register to check the speed */
- ret_val = em_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS,
- &phy_data);
- if (ret_val)
- return ret_val;
-
- /* If speed is 1000 Mbps, must read the IGP01E1000_PHY_PCS_INIT_REG to
- * find the polarity status */
- if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) ==
- IGP01E1000_PSSR_SPEED_1000MBPS) {
-
- /* Read the GIG initialization PCS register (0x00B4) */
- ret_val = em_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG,
- &phy_data);
- if (ret_val)
- return ret_val;
-
- /* Check the polarity bits */
- *polarity = (phy_data & IGP01E1000_PHY_POLARITY_MASK) ?
- em_rev_polarity_reversed : em_rev_polarity_normal;
- } else {
- /* For 10 Mbps, read the polarity bit in the status register. (for
- * 100 Mbps this bit is always 0) */
- *polarity = (phy_data & IGP01E1000_PSSR_POLARITY_REVERSED) ?
- em_rev_polarity_reversed : em_rev_polarity_normal;
- }
- } else if (hw->phy_type == em_phy_ife) {
- ret_val = em_read_phy_reg(hw, IFE_PHY_EXTENDED_STATUS_CONTROL,
- &phy_data);
- if (ret_val)
- return ret_val;
- *polarity = ((phy_data & IFE_PESC_POLARITY_REVERSED) >>
- IFE_PESC_POLARITY_REVERSED_SHIFT) ?
- em_rev_polarity_reversed : em_rev_polarity_normal;
- }
- return E1000_SUCCESS;
-}
-
-/******************************************************************************
* Check if Downshift occured
*
* hw - Struct containing variables accessed by shared code
@@ -7710,134 +6972,6 @@ em_mng_enable_host_if(struct em_hw * hw)
}
/*****************************************************************************
- * This function writes the buffer content at the offset given on the host if.
- * It also does alignment considerations to do the writes in most efficient way.
- * Also fills up the sum of the buffer in *buffer parameter.
- *
- * returns - E1000_SUCCESS for success.
- ****************************************************************************/
-STATIC int32_t
-em_mng_host_if_write(struct em_hw * hw, uint8_t *buffer,
- uint16_t length, uint16_t offset, uint8_t *sum)
-{
- uint8_t *tmp;
- uint8_t *bufptr = buffer;
- uint32_t data = 0;
- uint16_t remaining, i, j, prev_bytes;
-
- /* sum = only sum of the data and it is not checksum */
-
- if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
- return -E1000_ERR_PARAM;
- }
-
- tmp = (uint8_t *)&data;
- prev_bytes = offset & 0x3;
- offset &= 0xFFFC;
- offset >>= 2;
-
- if (prev_bytes) {
- data = E1000_READ_REG_ARRAY_DWORD(hw, HOST_IF, offset);
- for (j = prev_bytes; j < sizeof(uint32_t); j++) {
- *(tmp + j) = *bufptr++;
- *sum += *(tmp + j);
- }
- E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, offset, data);
- length -= j - prev_bytes;
- offset++;
- }
-
- remaining = length & 0x3;
- length -= remaining;
-
- /* Calculate length in DWORDs */
- length >>= 2;
-
- /* The device driver writes the relevant command block into the
- * ram area. */
- for (i = 0; i < length; i++) {
- for (j = 0; j < sizeof(uint32_t); j++) {
- *(tmp + j) = *bufptr++;
- *sum += *(tmp + j);
- }
-
- E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, offset + i, data);
- }
- if (remaining) {
- for (j = 0; j < sizeof(uint32_t); j++) {
- if (j < remaining)
- *(tmp + j) = *bufptr++;
- else
- *(tmp + j) = 0;
-
- *sum += *(tmp + j);
- }
- E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, offset + i, data);
- }
-
- return E1000_SUCCESS;
-}
-
-
-/*****************************************************************************
- * This function writes the command header after does the checksum calculation.
- *
- * returns - E1000_SUCCESS for success.
- ****************************************************************************/
-STATIC int32_t
-em_mng_write_cmd_header(struct em_hw * hw,
- struct em_host_mng_command_header * hdr)
-{
- uint16_t i;
- uint8_t sum;
- uint8_t *buffer;
-
- /* Write the whole command header structure which includes sum of
- * the buffer */
-
- uint16_t length = sizeof(struct em_host_mng_command_header);
-
- sum = hdr->checksum;
- hdr->checksum = 0;
-
- buffer = (uint8_t *) hdr;
- i = length;
- while (i--)
- sum += buffer[i];
-
- hdr->checksum = 0 - sum;
-
- length >>= 2;
- /* The device driver writes the relevant command block into the ram area. */
- for (i = 0; i < length; i++) {
- E1000_WRITE_REG_ARRAY_DWORD(hw, HOST_IF, i, *((uint32_t *) hdr + i));
- E1000_WRITE_FLUSH(hw);
- }
-
- return E1000_SUCCESS;
-}
-
-
-/*****************************************************************************
- * This function indicates to ARC that a new command is pending which completes
- * one write operation by the driver.
- *
- * returns - E1000_SUCCESS for success.
- ****************************************************************************/
-STATIC int32_t
-em_mng_write_commit(struct em_hw * hw)
-{
- uint32_t hicr;
-
- hicr = E1000_READ_REG(hw, HICR);
- /* Setting this bit tells the ARC that a new command is pending. */
- E1000_WRITE_REG(hw, HICR, hicr | E1000_HICR_C);
-
- return E1000_SUCCESS;
-}
-
-
-/*****************************************************************************
* This function checks the mode of the firmware.
*
* returns - TRUE when the mode is IAMT or FALSE.
@@ -7860,37 +6994,6 @@ em_check_mng_mode(struct em_hw *hw)
return FALSE;
}
-
-/*****************************************************************************
- * This function writes the dhcp info .
- ****************************************************************************/
-int32_t
-em_mng_write_dhcp_info(struct em_hw * hw, uint8_t *buffer,
- uint16_t length)
-{
- int32_t ret_val;
- struct em_host_mng_command_header hdr;
-
- hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
- hdr.command_length = length;
- hdr.reserved1 = 0;
- hdr.reserved2 = 0;
- hdr.checksum = 0;
-
- ret_val = em_mng_enable_host_if(hw);
- if (ret_val == E1000_SUCCESS) {
- ret_val = em_mng_host_if_write(hw, buffer, length, sizeof(hdr),
- &(hdr.checksum));
- if (ret_val == E1000_SUCCESS) {
- ret_val = em_mng_write_cmd_header(hw, &hdr);
- if (ret_val == E1000_SUCCESS)
- ret_val = em_mng_write_commit(hw);
- }
- }
- return ret_val;
-}
-
-
/*****************************************************************************
* This function calculates the checksum.
*
@@ -7950,40 +7053,6 @@ em_enable_tx_pkt_filtering(struct em_hw *hw)
return tx_filter;
}
-/******************************************************************************
- * Verifies the hardware needs to allow ARPs to be processed by the host
- *
- * hw - Struct containing variables accessed by shared code
- *
- * returns: - TRUE/FALSE
- *
- *****************************************************************************/
-uint32_t
-em_enable_mng_pass_thru(struct em_hw *hw)
-{
- uint32_t manc;
- uint32_t fwsm, factps;
-
- if (hw->asf_firmware_present) {
- manc = E1000_READ_REG(hw, MANC);
-
- if (!(manc & E1000_MANC_RCV_TCO_EN) ||
- !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
- return FALSE;
- if (em_arc_subsystem_valid(hw) == TRUE) {
- fwsm = E1000_READ_REG(hw, FWSM);
- factps = E1000_READ_REG(hw, FACTPS);
-
- if (((fwsm & E1000_FWSM_MODE_MASK) ==
- (em_mng_mode_pt << E1000_FWSM_MODE_SHIFT)) &&
- (factps & E1000_FACTPS_MNGCG))
- return TRUE;
- } else
- if ((manc & E1000_MANC_SMBUS_EN) && !(manc & E1000_MANC_ASF_EN))
- return TRUE;
- }
- return FALSE;
-}
static int32_t
em_polarity_reversal_workaround(struct em_hw *hw)
@@ -8397,34 +7466,6 @@ em_check_phy_reset_block(struct em_hw *hw)
E1000_BLK_PHY_RESET : E1000_SUCCESS;
}
-STATIC uint8_t
-em_arc_subsystem_valid(struct em_hw *hw)
-{
- uint32_t fwsm;
-
- /* On 8257x silicon, registers in the range of 0x8800 - 0x8FFC
- * may not be provided a DMA clock when no manageability features are
- * enabled. We do not want to perform any reads/writes to these registers
- * if this is the case. We read FWSM to determine the manageability mode.
- */
- switch (hw->mac_type) {
- case em_82571:
- case em_82572:
- case em_82573:
- case em_80003es2lan:
- fwsm = E1000_READ_REG(hw, FWSM);
- if ((fwsm & E1000_FWSM_MODE_MASK) != 0)
- return TRUE;
- break;
- case em_ich8lan:
- return TRUE;
- default:
- break;
- }
- return FALSE;
-}
-
-
/******************************************************************************
* Configure PCI-Ex no-snoop
*