Add support for 82576 fiber adapters based on Intel code in FreeBSD.

Thanks to Frédéric URBAN for setting up a test network to develop this on.
Tested by various people on copper adapters and fiber support
also tested by mickey.

ok deraadt@

1 files changed, 22 insertions, 2 deletions

diff --git a/sys/dev/pci/if_em_hw.h b/sys/dev/pci/if_em_hw.h
index f78313a9932..1eef8edbdfc 100644
--- a/sys/dev/pci/if_em_hw.h
+++ b/sys/dev/pci/if_em_hw.h
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: if_em_hw.h,v 1.44 2010/07/02 21:41:59 jsg Exp $ */
+/* $OpenBSD: if_em_hw.h,v 1.45 2010/08/03 16:39:34 jsg Exp $ */
 /* $FreeBSD: if_em_hw.h,v 1.15 2005/05/26 23:32:02 tackerman Exp $ */
 
 /* if_em_hw.h
@@ -941,6 +941,7 @@ struct em_ffvt_entry {
 #define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
 #define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
 #define E1000_FCT      0x00030  /* Flow Control Type - RW */
+#define E1000_CONNSW   0x00034  /* Copper/Fiber switch control - RW */
 #define E1000_VET      0x00038  /* VLAN Ether Type - RW */
 #define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */
 #define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */
@@ -1092,6 +1093,9 @@ struct em_ffvt_entry {
 #define E1000_ICTXQMTC 0x0411C  /* Interrupt Cause Tx Queue Minimum Threshold Count */
 #define E1000_ICRXDMTC 0x04120  /* Interrupt Cause Rx Descriptor Minimum Threshold Count */
 #define E1000_ICRXOC   0x04124  /* Interrupt Cause Receiver Overrun Count */
+#define E1000_PCS_CFG0 0x04200  /* PCS Configuration 0 - RW */
+#define E1000_PCS_LCTL 0x04208  /* PCS Link Control - RW */
+#define E1000_PCS_LSTAT 0x0420C /* PCS Link Status - RO */
 #define E1000_RXCSUM   0x05000  /* RX Checksum Control - RW */
 #define E1000_RFCTL    0x05008  /* Receive Filter Control*/
 #define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
@@ -1155,6 +1159,7 @@ struct em_ffvt_entry {
 #define E1000_82542_FCAL     E1000_FCAL
 #define E1000_82542_FCAH     E1000_FCAH
 #define E1000_82542_FCT      E1000_FCT
+#define E1000_82542_CONNSW   E1000_CONNSW
 #define E1000_82542_VET      E1000_VET
 #define E1000_82542_RA       0x00040
 #define E1000_82542_ICR      E1000_ICR
@@ -1347,6 +1352,9 @@ struct em_ffvt_entry {
 #define E1000_82542_ICRXDMTC    E1000_ICRXDMTC
 #define E1000_82542_ICRXOC      E1000_ICRXOC
 #define E1000_82542_HICR        E1000_HICR
+#define E1000_82542_PCS_CFG0	E1000_PCS_CFG0
+#define E1000_82542_PCS_LCTL	E1000_PCS_LCTL
+#define E1000_82542_PCS_LSTAT	E1000_PCS_LSTAT
 
 #define E1000_82542_CPUVEC      E1000_CPUVEC
 #define E1000_82542_MRQC        E1000_MRQC
@@ -1566,6 +1574,16 @@ struct em_hw {
 #define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
 #define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
 #define E1000_CTRL_SW2FW_INT 0x02000000  /* Initiate an interrupt to manageability engine */
+#define E1000_CTRL_I2C_ENA  0x02000000  /* I2C enable */
+
+#define E1000_CONNSW_ENRGSRC	0x4
+#define E1000_PCS_CFG_PCS_EN	8
+
+#define E1000_PCS_LSTS_LINK_OK		0x01
+#define E1000_PCS_LSTS_SPEED_100	0x02
+#define E1000_PCS_LSTS_SPEED_1000	0x04
+#define E1000_PCS_LSTS_DUPLEX_FULL	0x08
+#define E1000_PCS_LSTS_SYNK_OK		0x10
 
 /* Device Status */
 #define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
@@ -1669,6 +1687,7 @@ struct em_hw {
 #define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
 #define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Defineable Pin 6 */
 #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */
+#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */
 #define E1000_CTRL_EXT_SDP4_DIR  0x00000100 /* Direction of SDP4 0=in 1=out */
 #define E1000_CTRL_EXT_SDP5_DIR  0x00000200 /* Direction of SDP5 0=in 1=out */
 #define E1000_CTRL_EXT_SDP6_DIR  0x00000400 /* Direction of SDP6 0=in 1=out */
@@ -1682,7 +1701,8 @@ struct em_hw {
 #define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
 #define E1000_CTRL_EXT_LINK_MODE_TBI  0x00C00000
 #define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000
-#define E1000_CTRL_EXT_LINK_MODE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX  0x00400000
 #define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
 #define E1000_CTRL_EXT_WR_WMARK_MASK  0x03000000
 #define E1000_CTRL_EXT_WR_WMARK_256   0x00000000