PCI shim for if_wi.c as promised. Magic for setting the PLX up

correctly take from the FreeBSD driver and explained by imp@
Currently this is hard-coded for PrismII cards but that will change
when the PrismII auto-detect code is added to if_wi.c.
Tested with a LinkSys WPC11 in a Global Sun GL24110P02 (aka LinSys WDT11)

1 files changed, 216 insertions, 0 deletions

diff --git a/sys/dev/pci/if_wi_pci.c b/sys/dev/pci/if_wi_pci.c
new file mode 100644
index 00000000000..567a4dbf977
--- /dev/null
+++ b/sys/dev/pci/if_wi_pci.c
@@ -0,0 +1,216 @@
+/*	$OpenBSD: if_wi_pci.c,v 1.1 2001/06/06 18:53:50 millert Exp $	*/
+
+/*
+ * Copyright (c) 2001 Todd C. Miller <Todd.Miller@courtesan.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1997, 1998, 1999
+ *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This is a PCI shim for the Wavelan wireless network driver.
+ * It works with PCI adaptors based on the PLX 9050 and PLX 9052
+ * PCI to "dumb bus" bridge chip.  It has been tested with the
+ * Global Sun Technology GL24110P02 (aka Linksys WDT11) and is
+ * expected to work with the Global Sun GL24110P and Eumitcom WL11000P.
+ *
+ * All we do here is handle the PCI match and attach, set up an
+ * interrupt handler entry point, and setup the PLX chip for level
+ * interrupts and config index 1.
+ *
+ * The PLX 9052 provides us with multiple PCI address space mappings.
+ * The primary mappings at PCI registers 0x10 (mem) and 0x14 (I/O) are for
+ * the PLX chip itself, *NOT* the pcmcia card.
+ * The PLX 9052 provides 4 local address space registers: 0x18, 0x1C,
+ * 0x20, and 0x24.  The mem and I/O spaces for the PCMCIA card are
+ * mapped to 0x18 and 0x1C respectively.
+ *
+ * The datasheet may be downloaded from PLX (though you do have to register)
+ * http://www.plxtech.com/products/toolbox/9050.htm
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/timeout.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+#endif
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <dev/ic/if_wireg.h>
+#include <dev/ic/if_wi_ieee.h>
+#include <dev/ic/if_wivar.h>
+
+#define WI_PCI_PLX_LOMEM	0x10	/* PLX chip membase */
+#define WI_PCI_PLX_LOIO		0x14	/* PLX chip iobase */
+#define WI_PCI_LOMEM		0x18	/* ISA membase */
+#define WI_PCI_LOIO		0x1C	/* ISA iobase */
+
+int	wi_pci_match	__P((struct device *, void *, void *));
+void	wi_pci_attach	__P((struct device *, struct device *, void *));
+int	wi_intr		__P((void *));
+int	wi_attach	__P((struct wi_softc *));
+
+struct cfattach wi_pci_ca = {
+	sizeof (struct wi_softc), wi_pci_match, wi_pci_attach
+};
+
+static const struct wi_pci_product {
+	pci_vendor_id_t pp_vendor;
+	pci_product_id_t pp_product;
+} wi_pci_products[] = {
+	{ PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P },
+	{ PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02 },
+	{ PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P },
+	{ 0, 0 }
+};
+
+int
+wi_pci_match(parent, match, aux)
+	struct device *parent;
+	void *match;
+	void *aux;
+{
+	struct pci_attach_args *pa = aux;
+	const struct wi_pci_product *pp;
+
+	for (pp = wi_pci_products; pp->pp_product != 0; pp++) {
+		if (PCI_VENDOR(pa->pa_id) == pp->pp_vendor && 
+		    PCI_PRODUCT(pa->pa_id) == pp->pp_product)
+			return(1);
+	}
+
+	return(0);
+}
+
+void
+wi_pci_attach(parent, self, aux)
+	struct device *parent;
+	struct device *self;
+	void *aux;
+{
+	struct wi_softc *sc = (struct wi_softc *)self;
+	struct pci_attach_args *pa = aux;
+	pci_intr_handle_t ih;
+	bus_space_handle_t ioh, memh;
+	bus_space_tag_t iot = pa->pa_iot;
+	bus_space_tag_t memt = pa->pa_memt;
+	pci_chipset_tag_t pc = pa->pa_pc;
+	pcireg_t csr;
+	const char *intrstr;
+
+	sc->sc_prism2 = 1;		/* All PCI flavors of wi are Prism2 */
+
+	/* Map memory and I/O registers. */
+	if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
+	    &memt, &memh, NULL, NULL) != 0) {
+		printf(": can't map mem space\n");
+		return;
+	}
+	if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
+	    &iot, &ioh, NULL, NULL) != 0) {
+		printf(": can't map I/O space\n");
+		return;
+	}
+	sc->wi_btag = iot;
+	sc->wi_bhandle = ioh;
+
+	/* Enable the card. */
+	csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
+	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+	    csr | PCI_COMMAND_MASTER_ENABLE);
+
+	/* Map and establish the interrupt. */
+	if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
+	    pa->pa_intrline, &ih)) {
+		printf(": couldn't map interrupt\n");
+		return;
+	}
+	intrstr = pci_intr_string(pc, ih);
+	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc,
+	    sc->sc_dev.dv_xname);
+	if (sc->sc_ih == NULL) {
+		printf(": couldn't establish interrupt");
+		if (intrstr != NULL)
+			printf(" at %s", intrstr);
+		printf("\n");
+		return;
+	}
+	printf(": %s", intrstr);
+
+	/* Make sure interrupts are disabled. */
+	CSR_WRITE_2(sc, WI_INT_EN, 0);
+	CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
+
+	/*
+	 * Setup the PLX chip for level interrupts and config index 1
+	 * XXX - should really reset the PLX chip too.
+	 */
+	bus_space_write_1(memt, memh, WI_COR_OFFSET, WI_COR_VALUE);
+
+	wi_attach(sc);
+}