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authorJasper Lievisse Adriaanse <jasper@cvs.openbsd.org>2010-04-29 08:49:46 +0000
committerJasper Lievisse Adriaanse <jasper@cvs.openbsd.org>2010-04-29 08:49:46 +0000
commite8aebf60483d3e18389d43735fc861b1d027732e (patch)
treebe3fcddf761e3156a4140c5964d352d646068e98 /sys/dev/pci/pcidevs.h
parentd32158c887df960ade805239c4feb4d52ee05880 (diff)
- regen
Diffstat (limited to 'sys/dev/pci/pcidevs.h')
-rw-r--r--sys/dev/pci/pcidevs.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h
index d7b942290bb..81d06f0be22 100644
--- a/sys/dev/pci/pcidevs.h
+++ b/sys/dev/pci/pcidevs.h
@@ -2,7 +2,7 @@
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * OpenBSD: pcidevs,v 1.1548 2010/04/17 11:04:57 miod Exp
+ * OpenBSD: pcidevs,v 1.1549 2010/04/29 08:49:06 jasper Exp
*/
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
@@ -2982,6 +2982,8 @@
#define PCI_PRODUCT_INTEL_82801JD_PCIE_6 0x3a7a /* 82801JD PCIE */
#define PCI_PRODUCT_INTEL_82801JD_LAN 0x3a7c /* 82801JD LAN */
#define PCI_PRODUCT_INTEL_P55_LPC 0x3b02 /* P55 LPC */
+#define PCI_PRODUCT_INTEL_3400_LPC_1 0x3b07 /* 3400 LPC */
+#define PCI_PRODUCT_INTEL_3400_LPC_2 0x3b10 /* 3400 LPC */
#define PCI_PRODUCT_INTEL_3400_LPC 0x3b14 /* 3400 LPC */
#define PCI_PRODUCT_INTEL_3400_SATA_1 0x3b20 /* 3400 SATA */
#define PCI_PRODUCT_INTEL_3400_SATA_2 0x3b21 /* 3400 SATA */
@@ -3795,6 +3797,7 @@
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN3 0x008c /* nForce3 LAN */
#define PCI_PRODUCT_NVIDIA_NFORCE2_400_SATA 0x008e /* nForce2 400 SATA */
#define PCI_PRODUCT_NVIDIA_GEFORCE7800GTX 0x0091 /* GeForce 7800 GTX */
+#define PCI_PRODUCT_NVIDIA_GEFORCE7800GT 0x0092 /* GeForce 7800 GT */
#define PCI_PRODUCT_NVIDIA_ITNT2 0x00a0 /* Aladdin TNT2 */
#define PCI_PRODUCT_NVIDIA_GEFORCE6800GO 0x00c8 /* GeForce Go 6800 */
#define PCI_PRODUCT_NVIDIA_GEFORCE6800GO_U 0x00c9 /* GeForce Go 6800 Ultra */
@@ -4588,6 +4591,7 @@
#define PCI_PRODUCT_REALTEK_RT8169SC 0x8167 /* 8169SC */
#define PCI_PRODUCT_REALTEK_RT8168 0x8168 /* 8168 */
#define PCI_PRODUCT_REALTEK_RT8169 0x8169 /* 8169 */
+#define PCI_PRODUCT_REALTEK_RTL8192SE 0x8172 /* 8192SE */
#define PCI_PRODUCT_REALTEK_RT8180 0x8180 /* 8180 */
#define PCI_PRODUCT_REALTEK_RT8185 0x8185 /* 8185 */
#define PCI_PRODUCT_REALTEK_RTL8187SE 0x8199 /* 8187SE */