summaryrefslogtreecommitdiff
path: root/sys/dev/pci/pciidevar.h
diff options
context:
space:
mode:
authorAlexander Yurchenko <grange@cvs.openbsd.org>2004-10-17 18:05:56 +0000
committerAlexander Yurchenko <grange@cvs.openbsd.org>2004-10-17 18:05:56 +0000
commit905289f0c98529a4a6f9565dae685e4583de2971 (patch)
treedba440b2c6bfd800c2f44e2425122d7d425f2fff /sys/dev/pci/pciidevar.h
parent70db682f01c680ea0e3269f2adfde2f6026f1e5c (diff)
Move pciide_softc definition to pciidevar.h.
Diffstat (limited to 'sys/dev/pci/pciidevar.h')
-rw-r--r--sys/dev/pci/pciidevar.h55
1 files changed, 53 insertions, 2 deletions
diff --git a/sys/dev/pci/pciidevar.h b/sys/dev/pci/pciidevar.h
index 5ec917c303f..df093532a8c 100644
--- a/sys/dev/pci/pciidevar.h
+++ b/sys/dev/pci/pciidevar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pciidevar.h,v 1.9 2004/10/17 17:58:30 grange Exp $ */
+/* $OpenBSD: pciidevar.h,v 1.10 2004/10/17 18:05:55 grange Exp $ */
/* $NetBSD: pciidevar.h,v 1.6 2001/01/12 16:04:00 bouyer Exp $ */
/*
@@ -40,7 +40,9 @@
* Author: Christopher G. Demetriou, March 2, 1998.
*/
-struct device;
+#include <dev/ata/atavar.h>
+#include <dev/ic/wdcreg.h>
+#include <dev/ic/wdcvar.h>
/*
* While standard PCI IDE controllers only have 2 channels, it is
@@ -50,6 +52,55 @@ struct device;
*/
#define PCIIDE_MAX_CHANNELS 4
+struct pciide_softc {
+ struct wdc_softc sc_wdcdev; /* common wdc definitions */
+ pci_chipset_tag_t sc_pc; /* PCI registers info */
+ pcitag_t sc_tag;
+ void *sc_pci_ih; /* PCI interrupt handle */
+ int sc_dma_ok; /* bus-master DMA info */
+ bus_space_tag_t sc_dma_iot;
+ bus_space_handle_t sc_dma_ioh;
+ bus_dma_tag_t sc_dmat;
+
+ /*
+ * Some controllers might have DMA restrictions other than
+ * the norm.
+ */
+ bus_size_t sc_dma_maxsegsz;
+ bus_size_t sc_dma_boundary;
+
+ /* For Cypress */
+ const struct cy82c693_handle *sc_cy_handle;
+ int sc_cy_compatchan;
+
+ /* For SiS */
+ u_int8_t sis_type;
+
+ /* Chip description */
+ const struct pciide_product_desc *sc_pp;
+ /* Chip revision */
+ int sc_rev;
+ /* common definitions */
+ struct channel_softc *wdc_chanarray[PCIIDE_NUM_CHANNELS];
+ /* internal bookkeeping */
+ struct pciide_channel { /* per-channel data */
+ struct channel_softc wdc_channel; /* generic part */
+ char *name;
+ int hw_ok; /* hardware mapped & OK? */
+ int compat; /* is it compat? */
+ int dma_in_progress;
+ void *ih; /* compat or pci handle */
+ bus_space_handle_t ctl_baseioh; /* ctrl regs blk, native mode */
+ /* DMA tables and DMA map for xfer, for each drive */
+ struct pciide_dma_maps {
+ bus_dmamap_t dmamap_table;
+ struct idedma_table *dma_table;
+ bus_dmamap_t dmamap_xfer;
+ int dma_flags;
+ } dma_maps[2];
+ } pciide_channels[PCIIDE_NUM_CHANNELS];
+};
+
/*
* Functions defined by machine-dependent code.
*/