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authorDavid Gwynne <dlg@cvs.openbsd.org>2016-06-01 01:18:23 +0000
committerDavid Gwynne <dlg@cvs.openbsd.org>2016-06-01 01:18:23 +0000
commit3047149596e3477683aacb135109e37af21ed5f5 (patch)
treea78041eca9733b054daa446848512c4811074466 /sys/dev/pci
parent169011716c68bad8e98a6b879ced74a008e66566 (diff)
regen
Diffstat (limited to 'sys/dev/pci')
-rw-r--r--sys/dev/pci/pcidevs.h4
-rw-r--r--sys/dev/pci/pcidevs_data.h6
2 files changed, 5 insertions, 5 deletions
diff --git a/sys/dev/pci/pcidevs.h b/sys/dev/pci/pcidevs.h
index d725e2e780d..b705a88db8d 100644
--- a/sys/dev/pci/pcidevs.h
+++ b/sys/dev/pci/pcidevs.h
@@ -2,7 +2,7 @@
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * OpenBSD: pcidevs,v 1.1800 2016/05/25 14:41:02 stsp Exp
+ * OpenBSD: pcidevs,v 1.1801 2016/06/01 01:15:05 dlg Exp
*/
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
@@ -2932,7 +2932,7 @@
#define PCI_PRODUCT_INTEL_80960RP 0x0960 /* i960 RP */
#define PCI_PRODUCT_INTEL_80960RM 0x0962 /* i960 RM */
#define PCI_PRODUCT_INTEL_80960RN 0x0964 /* i960 RN */
-#define PCI_PRODUCT_INTEL_SSDDCP3x00 0x0953 /* SSD DC P3700/P3600/P3500 */
+#define PCI_PRODUCT_INTEL_NVME 0x0953 /* NVMe */
#define PCI_PRODUCT_INTEL_CORE4G_D_ULT_GT1 0x0a02 /* HD Graphics */
#define PCI_PRODUCT_INTEL_CORE4G_HB_1 0x0a04 /* Core 4G Host */
#define PCI_PRODUCT_INTEL_CORE4G_M_ULT_GT1 0x0a06 /* HD Graphics */
diff --git a/sys/dev/pci/pcidevs_data.h b/sys/dev/pci/pcidevs_data.h
index abab1407084..a78bad97dfb 100644
--- a/sys/dev/pci/pcidevs_data.h
+++ b/sys/dev/pci/pcidevs_data.h
@@ -2,7 +2,7 @@
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * OpenBSD: pcidevs,v 1.1800 2016/05/25 14:41:02 stsp Exp
+ * OpenBSD: pcidevs,v 1.1801 2016/06/01 01:15:05 dlg Exp
*/
/* $NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $ */
@@ -9244,8 +9244,8 @@ static const struct pci_known_product pci_known_products[] = {
"i960 RN",
},
{
- PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SSDDCP3x00,
- "SSD DC P3700/P3600/P3500",
+ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NVME,
+ "NVMe",
},
{
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_D_ULT_GT1,