diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2019-07-04 03:21:40 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2019-07-04 03:21:40 +0000 |
| commit | 45588e8fcbe8a90180e30cbddeef48aefe362dbe (patch) | |
| tree | 027164fe62aa2b71eaa34a6f242166763b676fe6 /sys/dev/pci | |
| parent | 3c7a6bcb95ea979bdecb51f650d6ffa4a57d6797 (diff) | |
drm/amdgpu: add picasso support for gmc
From Likun Gao
e21f561ad52a6c909c64d2856a3ad03a4042a5df in mainline linux
Diffstat (limited to 'sys/dev/pci')
| -rw-r--r-- | sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c b/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c index 836227031b8..6e91ffd71c1 100644 --- a/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c +++ b/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c @@ -767,6 +767,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) adev->gmc.gart_size = 512ULL << 20; break; case CHIP_RAVEN: /* DCE SG support */ + case CHIP_PICASSO: /* DCE SG support */ adev->gmc.gart_size = 1024ULL << 20; break; } @@ -857,6 +858,7 @@ static int gmc_v9_0_sw_init(void *handle) adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev); switch (adev->asic_type) { case CHIP_RAVEN: + case CHIP_PICASSO: if (adev->rev_id == 0x0 || adev->rev_id == 0x1) { amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); } else { @@ -987,6 +989,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) case CHIP_VEGA12: break; case CHIP_RAVEN: + case CHIP_PICASSO: soc15_program_register_sequence(adev, golden_settings_athub_1_0_0, ARRAY_SIZE(golden_settings_athub_1_0_0)); @@ -1021,6 +1024,7 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_RAVEN: + case CHIP_PICASSO: mmhub_v1_0_initialize_power_gating(adev); mmhub_v1_0_update_power_gating(adev, true); break; |