Move IWM_NVM_* macro definitions from if_iwm.c to if_iwmreg.h.

2 files changed, 84 insertions, 85 deletions

diff --git a/sys/dev/pci/if_iwm.c b/sys/dev/pci/if_iwm.c
index b1ffd27096d..14c88a6fdfb 100644
--- a/sys/dev/pci/if_iwm.c
+++ b/sys/dev/pci/if_iwm.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_iwm.c,v 1.125 2016/09/04 18:49:21 stsp Exp $	*/
+/*	$OpenBSD: if_iwm.c,v 1.126 2016/09/10 07:38:24 stsp Exp $	*/
 
 /*
  * Copyright (c) 2014, 2016 genua gmbh <info@genua.de>
@@ -2310,89 +2310,6 @@ iwm_fw_valid_rx_ant(struct iwm_softc *sc)
 	return rx_ant;
 }
 
-/* 7k family NVM HW-Section offset (in words) definitions */
-#define IWM_HW_ADDR	0x15
-/* 7k family NVM SW-Section offset (in words) definitions */
-#define IWM_NVM_SW_SECTION	0x1C0
-#define IWM_NVM_VERSION		0
-#define IWM_RADIO_CFG		1
-#define IWM_SKU			2
-#define IWM_N_HW_ADDRS		3
-#define IWM_NVM_CHANNELS	0x1E0 - IWM_NVM_SW_SECTION
-/* 7k family NVM calibration section offset (in words) definitions */
-#define IWM_NVM_CALIB_SECTION	0x2B8
-#define IWM_XTAL_CALIB		(0x316 - IWM_NVM_CALIB_SECTION)
-
-/* 8k family NVM HW-Section offset (in words) definitions */
-#define IWM_HW_ADDR0_WFPM_8000		0x12
-#define IWM_HW_ADDR1_WFPM_8000		0x16
-#define IWM_HW_ADDR0_PCIE_8000		0x8A
-#define IWM_HW_ADDR1_PCIE_8000		0x8E
-#define IWM_MAC_ADDRESS_OVERRIDE_8000	1
-
-/* 8k family NVM SW-Section offset (in words) definitions */
-#define IWM_NVM_SW_SECTION_8000	0x1C0
-#define IWM_NVM_VERSION_8000	0
-#define IWM_RADIO_CFG_8000	0
-#define IWM_SKU_8000		2
-#define IWM_N_HW_ADDRS_8000	3
-
-/* 8k family NVM REGULATORY -Section offset (in words) definitions */
-#define IWM_NVM_CHANNELS_8000		0
-#define IWM_NVM_LAR_OFFSET_8000_OLD	0x4C7
-#define IWM_NVM_LAR_OFFSET_8000		0x507
-#define IWM_NVM_LAR_ENABLED_8000	0x7
-
-/* 8k family NVM calibration section offset (in words) definitions */
-#define IWM_NVM_CALIB_SECTION_8000	0x2B8
-#define IWM_XTAL_CALIB_8000		(0x316 - IWM_NVM_CALIB_SECTION_8000)
-
-/* SKU Capabilities (actual values from NVM definition) */
-#define IWM_NVM_SKU_CAP_BAND_24GHZ	(1 << 0)
-#define IWM_NVM_SKU_CAP_BAND_52GHZ	(1 << 1)
-#define IWM_NVM_SKU_CAP_11N_ENABLE	(1 << 2)
-#define IWM_NVM_SKU_CAP_11AC_ENABLE	(1 << 3)
-#define IWM_NVM_SKU_CAP_MIMO_DISABLE	(1 << 5)
-
-/* radio config bits (actual values from NVM definition) */
-#define IWM_NVM_RF_CFG_DASH_MSK(x)   (x & 0x3)         /* bits 0-1   */
-#define IWM_NVM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
-#define IWM_NVM_RF_CFG_TYPE_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
-#define IWM_NVM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
-#define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
-#define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
-
-#define IWM_NVM_RF_CFG_PNUM_MSK_8000(x)		(x & 0xF)
-#define IWM_NVM_RF_CFG_DASH_MSK_8000(x)		((x >> 4) & 0xF)
-#define IWM_NVM_RF_CFG_STEP_MSK_8000(x)		((x >> 8) & 0xF)
-#define IWM_NVM_RF_CFG_TYPE_MSK_8000(x)		((x >> 12) & 0xFFF)
-#define IWM_NVM_RF_CFG_TX_ANT_MSK_8000(x)	((x >> 24) & 0xF)
-#define IWM_NVM_RF_CFG_RX_ANT_MSK_8000(x)	((x >> 28) & 0xF)
-
-#define DEFAULT_MAX_TX_POWER 16
-
-/*
- * channel flags in NVM
- * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo
- * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel
- * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed
- * @IWM_NVM_CHANNEL_RADAR: radar detection required
- * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate
- * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
- * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
- * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
- * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
- */
-#define IWM_NVM_CHANNEL_VALID	(1 << 0)
-#define IWM_NVM_CHANNEL_IBSS	(1 << 1)
-#define IWM_NVM_CHANNEL_ACTIVE	(1 << 3)
-#define IWM_NVM_CHANNEL_RADAR	(1 << 4)
-#define IWM_NVM_CHANNEL_DFS	(1 << 7)
-#define IWM_NVM_CHANNEL_WIDE	(1 << 8)
-#define IWM_NVM_CHANNEL_40MHZ	(1 << 9)
-#define IWM_NVM_CHANNEL_80MHZ	(1 << 10)
-#define IWM_NVM_CHANNEL_160MHZ	(1 << 11)
-
 void
 iwm_init_channel_map(struct iwm_softc *sc, const uint16_t * const nvm_ch_flags,
 			const uint8_t *nvm_channels, size_t nchan)
diff --git a/sys/dev/pci/if_iwmreg.h b/sys/dev/pci/if_iwmreg.h
index 36b60025bb6..17571bd0780 100644
--- a/sys/dev/pci/if_iwmreg.h
+++ b/sys/dev/pci/if_iwmreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_iwmreg.h,v 1.16 2016/09/03 10:33:15 stsp Exp $	*/
+/*	$OpenBSD: if_iwmreg.h,v 1.17 2016/09/10 07:38:24 stsp Exp $	*/
 
 /******************************************************************************
  *
@@ -1953,6 +1953,88 @@ struct iwm_calib_res_notif_phy_db {
 	uint8_t data[];
 } __packed;
 
+/* 7k family NVM HW-Section offset (in words) definitions */
+#define IWM_HW_ADDR	0x15
+/* 7k family NVM SW-Section offset (in words) definitions */
+#define IWM_NVM_SW_SECTION	0x1C0
+#define IWM_NVM_VERSION		0
+#define IWM_RADIO_CFG		1
+#define IWM_SKU			2
+#define IWM_N_HW_ADDRS		3
+#define IWM_NVM_CHANNELS	0x1E0 - IWM_NVM_SW_SECTION
+/* 7k family NVM calibration section offset (in words) definitions */
+#define IWM_NVM_CALIB_SECTION	0x2B8
+#define IWM_XTAL_CALIB		(0x316 - IWM_NVM_CALIB_SECTION)
+
+/* 8k family NVM HW-Section offset (in words) definitions */
+#define IWM_HW_ADDR0_WFPM_8000		0x12
+#define IWM_HW_ADDR1_WFPM_8000		0x16
+#define IWM_HW_ADDR0_PCIE_8000		0x8A
+#define IWM_HW_ADDR1_PCIE_8000		0x8E
+#define IWM_MAC_ADDRESS_OVERRIDE_8000	1
+
+/* 8k family NVM SW-Section offset (in words) definitions */
+#define IWM_NVM_SW_SECTION_8000	0x1C0
+#define IWM_NVM_VERSION_8000	0
+#define IWM_RADIO_CFG_8000	0
+#define IWM_SKU_8000		2
+#define IWM_N_HW_ADDRS_8000	3
+
+/* 8k family NVM REGULATORY -Section offset (in words) definitions */
+#define IWM_NVM_CHANNELS_8000		0
+#define IWM_NVM_LAR_OFFSET_8000_OLD	0x4C7
+#define IWM_NVM_LAR_OFFSET_8000		0x507
+#define IWM_NVM_LAR_ENABLED_8000	0x7
+
+/* 8k family NVM calibration section offset (in words) definitions */
+#define IWM_NVM_CALIB_SECTION_8000	0x2B8
+#define IWM_XTAL_CALIB_8000		(0x316 - IWM_NVM_CALIB_SECTION_8000)
+
+/* SKU Capabilities (actual values from NVM definition) */
+#define IWM_NVM_SKU_CAP_BAND_24GHZ	(1 << 0)
+#define IWM_NVM_SKU_CAP_BAND_52GHZ	(1 << 1)
+#define IWM_NVM_SKU_CAP_11N_ENABLE	(1 << 2)
+#define IWM_NVM_SKU_CAP_11AC_ENABLE	(1 << 3)
+#define IWM_NVM_SKU_CAP_MIMO_DISABLE	(1 << 5)
+
+/* radio config bits (actual values from NVM definition) */
+#define IWM_NVM_RF_CFG_DASH_MSK(x)   (x & 0x3)         /* bits 0-1   */
+#define IWM_NVM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
+#define IWM_NVM_RF_CFG_TYPE_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
+#define IWM_NVM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
+#define IWM_NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
+#define IWM_NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
+
+#define IWM_NVM_RF_CFG_PNUM_MSK_8000(x)		(x & 0xF)
+#define IWM_NVM_RF_CFG_DASH_MSK_8000(x)		((x >> 4) & 0xF)
+#define IWM_NVM_RF_CFG_STEP_MSK_8000(x)		((x >> 8) & 0xF)
+#define IWM_NVM_RF_CFG_TYPE_MSK_8000(x)		((x >> 12) & 0xFFF)
+#define IWM_NVM_RF_CFG_TX_ANT_MSK_8000(x)	((x >> 24) & 0xF)
+#define IWM_NVM_RF_CFG_RX_ANT_MSK_8000(x)	((x >> 28) & 0xF)
+
+#define DEFAULT_MAX_TX_POWER 16
+
+/*
+ * channel flags in NVM
+ * @IWM_NVM_CHANNEL_VALID: channel is usable for this SKU/geo
+ * @IWM_NVM_CHANNEL_IBSS: usable as an IBSS channel
+ * @IWM_NVM_CHANNEL_ACTIVE: active scanning allowed
+ * @IWM_NVM_CHANNEL_RADAR: radar detection required
+ * @IWM_NVM_CHANNEL_DFS: dynamic freq selection candidate
+ * @IWM_NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
+ * @IWM_NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
+ * @IWM_NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
+ * @IWM_NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
+ */
+#define IWM_NVM_CHANNEL_VALID	(1 << 0)
+#define IWM_NVM_CHANNEL_IBSS	(1 << 1)
+#define IWM_NVM_CHANNEL_ACTIVE	(1 << 3)
+#define IWM_NVM_CHANNEL_RADAR	(1 << 4)
+#define IWM_NVM_CHANNEL_DFS	(1 << 7)
+#define IWM_NVM_CHANNEL_WIDE	(1 << 8)
+#define IWM_NVM_CHANNEL_40MHZ	(1 << 9)
+#define IWM_NVM_CHANNEL_80MHZ	(1 << 10)
+#define IWM_NVM_CHANNEL_160MHZ	(1 << 11)
 
 /* Target of the IWM_NVM_ACCESS_CMD */
 #define IWM_NVM_ACCESS_TARGET_CACHE	0