diff options
| author | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-05-15 15:20:10 +0000 |
|---|---|---|
| committer | Owain Ainsworth <oga@cvs.openbsd.org> | 2010-05-15 15:20:10 +0000 |
| commit | b2f9d7dd11dbfc79a72f30951bef43f5ab7f65a1 (patch) | |
| tree | fa0c1be6aaddeccebbce617ee8ff01ef62a204ff /sys/dev/pci | |
| parent | 1943a41de13092e8e3da688f4172b121a46bd157 (diff) | |
Always check the tiling mode alignment on pin, even if we don't need a
fence register. Stops some chipsets crapping out during rendering.
Tested by Jan Stary; thanks!
Diffstat (limited to 'sys/dev/pci')
| -rw-r--r-- | sys/dev/pci/drm/i915_drv.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/i915_drv.c b/sys/dev/pci/drm/i915_drv.c index d8425d24403..bd122472810 100644 --- a/sys/dev/pci/drm/i915_drv.c +++ b/sys/dev/pci/drm/i915_drv.c @@ -3376,8 +3376,7 @@ i915_gem_object_pin(struct drm_obj *obj, uint32_t alignment, int needs_fence) if (obj_priv->dmamap != NULL && ((alignment && obj_priv->gtt_offset & (alignment - 1)) || obj_priv->gtt_offset & (i915_gem_get_gtt_alignment(obj) - 1) || - (needs_fence && !i915_gem_object_fence_offset_ok(obj, - obj_priv->tiling_mode)))) { + !i915_gem_object_fence_offset_ok(obj, obj_priv->tiling_mode))) { /* if it is already pinned we sanitised the alignment then */ KASSERT(obj_priv->pin_count == 0); if ((ret = i915_gem_object_unbind(obj, 1))) |