Match PCI ids for Intel ICH7 SATA in AHCI mode.

Then ask for SATA IDE mode of operation.

X60/T60 Thinkpads are shipped in AHCI configuration by default,
this makes them work without changing a BIOS option.

2 files changed, 32 insertions, 8 deletions

diff --git a/sys/dev/pci/pciide.c b/sys/dev/pci/pciide.c
index 1647d6f8af0..fbf86d4fac6 100644
--- a/sys/dev/pci/pciide.c
+++ b/sys/dev/pci/pciide.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide.c,v 1.235 2006/04/23 15:08:34 jsg Exp $	*/
+/*	$OpenBSD: pciide.c,v 1.236 2006/04/25 09:09:42 jsg Exp $	*/
 /*	$NetBSD: pciide.c,v 1.127 2001/08/03 01:31:08 tsutsui Exp $	*/
 
 /*
@@ -442,7 +442,15 @@ const struct pciide_product_desc pciide_intel_products[] =  {
 	  IDE_PCI_CLASS_OVERRIDE,
 	  piixsata_chip_map
 	},
-	{ PCI_PRODUCT_INTEL_82801GBM_SATA, /* Intel 82801GB (ICH7M) SATA */
+	{ PCI_PRODUCT_INTEL_82801GR_AHCI, /* Intel 82801GR (ICH7R) AHCI */
+	  IDE_PCI_CLASS_OVERRIDE,
+	  piixsata_chip_map
+	},
+	{ PCI_PRODUCT_INTEL_82801GBM_SATA, /* Intel 82801GBM (ICH7M) SATA */
+	  IDE_PCI_CLASS_OVERRIDE,
+	  piixsata_chip_map
+	},
+	{ PCI_PRODUCT_INTEL_82801GBM_AHCI, /* Intel 82801GBM (ICH7M) AHCI */
 	  IDE_PCI_CLASS_OVERRIDE,
 	  piixsata_chip_map
 	}
@@ -2171,7 +2179,7 @@ piixsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
 	pcireg_t interface = PCI_INTERFACE(pa->pa_class);
 	int channel;
 	bus_size_t cmdsize, ctlsize;
-	u_int8_t reg;
+	u_int8_t reg, ich7 = 0;
 
 	if (pciide_chipen(sc, pa) == 0)
 		return;
@@ -2217,14 +2225,17 @@ piixsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
 			    PCIIDE_INTERFACE_PCI(1);
 		}
 		break;
-	/* ICH 6 */
-	case PCI_PRODUCT_INTEL_82801FB_SATA:
-	case PCI_PRODUCT_INTEL_82801FR_SATA:
-	case PCI_PRODUCT_INTEL_82801FBM_SATA:
 	/* ICH 7 */
 	case PCI_PRODUCT_INTEL_82801GB_SATA:
 	case PCI_PRODUCT_INTEL_82801GR_SATA:
+	case PCI_PRODUCT_INTEL_82801GR_AHCI:
 	case PCI_PRODUCT_INTEL_82801GBM_SATA:
+	case PCI_PRODUCT_INTEL_82801GBM_AHCI:
+		ich7 = 1;
+	/* ICH 6 */
+	case PCI_PRODUCT_INTEL_82801FB_SATA:
+	case PCI_PRODUCT_INTEL_82801FR_SATA:
+	case PCI_PRODUCT_INTEL_82801FBM_SATA:
 		reg = pciide_pci_read(sc->sc_pc, sc->sc_tag, ICH5_SATA_MAP) &
 		    ICH6_SATA_MAP_CMB_MASK;
 		if (reg != ICH6_SATA_MAP_CMB_PRI &&
@@ -2233,6 +2244,15 @@ piixsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
 			    ICH5_SATA_PI);
 			reg |= ICH5_SATA_PI_PRI_NATIVE |
 			    ICH5_SATA_PI_SEC_NATIVE;
+
+			/*
+			 * Ask for SATA IDE Mode, we don't need to do this
+			 * for the combined mode case as combined mode is
+			 * only allowed in IDE Mode
+			 */
+			if (ich7)
+				reg &= ~ICH7_SATA_MAP_SMS_MASK;
+
 			pciide_pci_write(pa->pa_pc, pa->pa_tag,
 			    ICH5_SATA_PI, reg);
 			interface |= PCIIDE_INTERFACE_PCI(0) |
diff --git a/sys/dev/pci/pciide_piix_reg.h b/sys/dev/pci/pciide_piix_reg.h
index 37b1438aac2..57a846477fc 100644
--- a/sys/dev/pci/pciide_piix_reg.h
+++ b/sys/dev/pci/pciide_piix_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_piix_reg.h,v 1.10 2006/04/02 01:36:07 jsg Exp $	*/
+/*	$OpenBSD: pciide_piix_reg.h,v 1.11 2006/04/25 09:09:42 jsg Exp $	*/
 /*	$NetBSD: pciide_piix_reg.h,v 1.5 2001/01/05 15:29:40 bouyer Exp $	*/
 
 /*
@@ -146,6 +146,10 @@ static int8_t piix4_sct_udma[] = {0x00, 0x01, 0x02, 0x01, 0x02, 0x01};
 #define ICH6_SATA_MAP_CMB_MASK	0x03 /* Combined mode bits */
 #define ICH6_SATA_MAP_CMB_PRI	0x01 /* Combined mode, IDE Primary */
 #define ICH6_SATA_MAP_CMB_SEC	0x02 /* Combined mode, IDE Secondary */
+#define ICH7_SATA_MAP_SMS_MASK	0xc0 /* SATA Mode Select */
+#define ICH7_SATA_MAP_SMS_IDE	0x00
+#define ICH7_SATA_MAP_SMS_AHCI	0x40
+#define ICH7_SATA_MAP_SMS_RAID	0x80
 
 
 #endif	/* !_DEV_PCI_PCIIDE_PIIX_REG_H_ */