remove the drm_read and drm_write functions. instead just do the

conditional on whether we treat the data like memspace or system memory
into the one driver that needs this.

Something similar was done upstream a while back.

6 files changed, 89 insertions, 131 deletions

diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h
index 42f7e22e2ff..1af98936f7e 100644
--- a/sys/dev/pci/drm/drmP.h
+++ b/sys/dev/pci/drm/drmP.h
@@ -149,13 +149,6 @@ typedef u_int8_t u8;
 					"lock; addl $0,0(%%rsp)" : : : "memory");
 #endif
 
-#define DRM_READ8(map, offset) drm_read8(map, offset)
-#define DRM_READ16(map, offset) drm_read16(map, offset)
-#define DRM_READ32(map, offset) drm_read32(map, offset)
-#define DRM_WRITE8(map, offset, val) drm_write8(map, offset, val)
-#define DRM_WRITE16(map, offset, val) drm_write16(map, offset, val)
-#define DRM_WRITE32(map, offset, val) drm_write32(map, offset, val)
-
 #define DRM_VERIFYAREA_READ( uaddr, size )				\
 	(!uvm_map_checkprot(&(curproc->p_vmspace->vm_map),		\
 	    (vaddr_t)uaddr, (vaddr_t)uaddr+size, UVM_PROT_READ))
@@ -529,12 +522,6 @@ int	drm_ctxbitmap_init(struct drm_device *);
 void	drm_ctxbitmap_cleanup(struct drm_device *);
 void	drm_ctxbitmap_free(struct drm_device *, int);
 int	drm_ctxbitmap_next(struct drm_device *);
-u_int8_t	drm_read8(drm_local_map_t *, unsigned long);
-u_int16_t drm_read16(drm_local_map_t *, unsigned long);
-u_int32_t drm_read32(drm_local_map_t *, unsigned long);
-void	drm_write8(drm_local_map_t *, unsigned long, u_int8_t);
-void	drm_write16(drm_local_map_t *, unsigned long, u_int16_t);
-void	drm_write32(drm_local_map_t *, unsigned long, u_int32_t);
 
 /* Locking IOCTL support (drm_lock.c) */
 int	drm_lock_take(struct drm_lock_data *, unsigned int);
diff --git a/sys/dev/pci/drm/drm_memory.c b/sys/dev/pci/drm/drm_memory.c
index d2c905fa315..19aef71aded 100644
--- a/sys/dev/pci/drm/drm_memory.c
+++ b/sys/dev/pci/drm/drm_memory.c
@@ -146,86 +146,3 @@ drm_mtrr_del(int handle, unsigned long offset, size_t size, int flags)
 	return 0;
 #endif
 }
-
-u_int8_t
-drm_read8(drm_local_map_t *map, unsigned long offset)
-{
-	u_int8_t *ptr;
-
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		return  (*ptr);
-		
-	default:
-		return (bus_space_read_1(map->bst, map->bsh, offset));
-	}
-}
-
-u_int16_t
-drm_read16(drm_local_map_t *map, unsigned long offset)
-{
-	u_int16_t *ptr;
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		return  (*ptr);
-	default:
-		return (bus_space_read_2(map->bst, map->bsh, offset));
-	}
-}
-
-u_int32_t
-drm_read32(drm_local_map_t *map, unsigned long offset)
-{
-	u_int32_t *ptr;
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		return  (*ptr);
-	default:
-		return (bus_space_read_4(map->bst, map->bsh, offset));
-	}
-}
-
-void
-drm_write8(drm_local_map_t *map, unsigned long offset, u_int8_t val)
-{
-	u_int8_t *ptr;
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		*ptr = val;
-		break;
-	default:
-		bus_space_write_1(map->bst, map->bsh, offset, val);
-	}
-}
-
-void
-drm_write16(drm_local_map_t *map, unsigned long offset, u_int16_t val)
-{
-	u_int16_t *ptr;
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		*ptr = val;
-		break;
-	default:
-		bus_space_write_2(map->bst, map->bsh, offset, val);
-	}
-}
-
-void
-drm_write32(drm_local_map_t *map, unsigned long offset, u_int32_t val)
-{
-	u_int32_t *ptr;
-	switch (map->type) {
-	case _DRM_SCATTER_GATHER:
-		ptr = map->handle + offset;
-		*ptr = val;
-		break;
-	default:
-		bus_space_write_4(map->bst, map->bsh, offset, val);
-	}
-}
diff --git a/sys/dev/pci/drm/radeon_cp.c b/sys/dev/pci/drm/radeon_cp.c
index b098518ff3a..c9ef1079d6e 100644
--- a/sys/dev/pci/drm/radeon_cp.c
+++ b/sys/dev/pci/drm/radeon_cp.c
@@ -489,7 +489,7 @@ radeon_do_cp_reset(drm_radeon_private_t *dev_priv)
 
 	cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
 	RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
-	SET_RING_HEAD(dev_priv, cur_read_ptr);
+	radeondrm_set_ring_head(dev_priv, cur_read_ptr);
 	dev_priv->ring.tail = cur_read_ptr;
 }
 
@@ -617,7 +617,7 @@ radeon_cp_init_ring_buffer(struct drm_device *dev,
 	/* Initialize the ring buffer's read and write pointers */
 	cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
 	RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
-	SET_RING_HEAD(dev_priv, cur_read_ptr);
+	radeondrm_set_ring_head(dev_priv, cur_read_ptr);
 	dev_priv->ring.tail = cur_read_ptr;
 
 #if __OS_HAS_AGP
@@ -665,10 +665,6 @@ radeon_cp_init_ring_buffer(struct drm_device *dev,
 	RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR)
 		     + RADEON_SCRATCH_REG_OFFSET);
 
-	dev_priv->scratch = ((__volatile__ u32 *)
-			     dev_priv->ring_rptr->handle +
-			     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
-
 	RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
 
 	/* Turn on bus mastering */
@@ -702,14 +698,17 @@ radeon_cp_init_ring_buffer(struct drm_device *dev,
 		break;
 	}
 
-	dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
+	radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(0), 0);
+	dev_priv->sarea_priv->last_frame = 0;
 	RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
 
-	dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
+	radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
+	dev_priv->sarea_priv->last_dispatch = 0;
 	RADEON_WRITE(RADEON_LAST_DISPATCH_REG,
 		     dev_priv->sarea_priv->last_dispatch);
 
-	dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
+	radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(2), 0);
+	dev_priv->sarea_priv->last_clear = 0;
 	RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
 
 	radeon_do_wait_for_idle(dev_priv);
@@ -731,11 +730,11 @@ radeon_test_writeback(drm_radeon_private_t *dev_priv)
 	/* Writeback doesn't seem to work everywhere, test it here and possibly
 	 * enable it if it appears to work
 	 */
-	DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0);
+	radeondrm_write_rptr(dev_priv, RADEON_SCRATCHOFF(1), 0);
 	RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
 
 	for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
-		if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
+		if (radeondrm_read_rptr(dev_priv, RADEON_SCRATCHOFF(1)) ==
 		    0xdeadbeef)
 			break;
 		DRM_UDELAY(1);
@@ -1516,7 +1515,8 @@ radeon_freelist_get(struct drm_device *dev)
 	start = dev_priv->last_buf;
 
 	for (t = 0; t < dev_priv->usec_timeout; t++) {
-		u32 done_age = GET_SCRATCH(1);
+		u_int32_t done_age = radeondrm_get_scratch(dev_priv, 1);
+
 		DRM_DEBUG("done_age = %d\n", done_age);
 		for (i = start; i < dma->buf_count; i++) {
 			buf = dma->buflist[i];
@@ -1547,7 +1547,9 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
 	struct drm_buf *buf;
 	int i, t;
 	int start;
-	u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
+	u32 done_age;
+
+	done_age = radeondrm_get_scratch(dev_priv, 1);
 
 	if (++dev_priv->last_buf >= dma->buf_count)
 		dev_priv->last_buf = 0;
@@ -1593,12 +1595,14 @@ radeon_freelist_reset(struct drm_device *dev)
 int
 radeon_wait_ring(drm_radeon_private_t *dev_priv, int n)
 {
-	drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
-	int i;
-	u32 last_head = GET_RING_HEAD(dev_priv);
+	drm_radeon_ring_buffer_t	*ring = &dev_priv->ring;
+	u_int32_t			 last_head;
+	int				 i;
+
+	last_head = radeondrm_get_ring_head(dev_priv);
 
 	for (i = 0; i < dev_priv->usec_timeout; i++) {
-		u_int32_t head = GET_RING_HEAD(dev_priv);
+		u_int32_t head = radeondrm_get_ring_head(dev_priv);
 
 		ring->space = head - ring->tail;
 		if (ring->space <= 0)
diff --git a/sys/dev/pci/drm/radeon_drv.c b/sys/dev/pci/drm/radeon_drv.c
index 5f566195bb3..582e903d626 100644
--- a/sys/dev/pci/drm/radeon_drv.c
+++ b/sys/dev/pci/drm/radeon_drv.c
@@ -686,6 +686,58 @@ radeondrm_ioctl(struct drm_device *dev, u_long cmd, caddr_t data,
 	return (EINVAL);
 }
 
+u_int32_t
+radeondrm_read_rptr(struct drm_radeon_private *dev_priv, u_int32_t off)
+{
+	u_int32_t val;
+
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		val = bus_space_read_4(dev_priv->ring_rptr->bst,
+		    dev_priv->ring_rptr->bsh, off);
+	} else {
+		val = *(((volatile u_int32_t *)dev_priv->ring_rptr->handle) +
+		    (off / sizeof(u_int32_t)));
+		val = letoh32(val);
+	}
+	return (val);
+}
+
+void
+radeondrm_write_rptr(struct drm_radeon_private *dev_priv, u_int32_t off,
+    u_int32_t val)
+{
+	if (dev_priv->flags & RADEON_IS_AGP) {
+		bus_space_write_4(dev_priv->ring_rptr->bst,
+		    dev_priv->ring_rptr->bsh, off, val);
+	} else
+		*(((volatile u_int32_t *)dev_priv->ring_rptr->handle +
+		    (off / sizeof(u_int32_t)))) = htole32(val);
+}
+
+u_int32_t
+radeondrm_get_ring_head(struct drm_radeon_private *dev_priv)
+{
+	if (dev_priv->writeback_works)
+		return (radeondrm_read_rptr(dev_priv, 0));
+	else
+		return (RADEON_READ(RADEON_CP_RB_RPTR));
+}
+
+void
+radeondrm_set_ring_head(struct drm_radeon_private *dev_priv, u_int32_t val)
+{
+	radeondrm_write_rptr(dev_priv, 0, val);
+}
+
+u_int32_t
+radeondrm_get_scratch(struct drm_radeon_private *dev_priv, u_int32_t off)
+{
+	if (dev_priv->writeback_works)
+		return (radeondrm_read_rptr(dev_priv, RADEON_SCRATCHOFF(off)));
+	else
+		return (RADEON_READ( RADEON_SCRATCH_REG0 + 4*(off) ));
+}
+
 void
 radeondrm_begin_ring(struct drm_radeon_private *dev_priv, int ncmd)
 {
@@ -718,7 +770,7 @@ radeondrm_commit_ring(struct drm_radeon_private *dev_priv)
 {
 	/* flush write combining buffer and writes to ring */
 	DRM_MEMORYBARRIER();
-	GET_RING_HEAD(dev_priv);
+	radeondrm_get_ring_head(dev_priv);
 	RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail);
 	/* read from PCI bus to ensure correct posting */
 	RADEON_READ(RADEON_CP_RB_RPTR);
diff --git a/sys/dev/pci/drm/radeon_drv.h b/sys/dev/pci/drm/radeon_drv.h
index 88143a575ed..de9ed885944 100644
--- a/sys/dev/pci/drm/radeon_drv.h
+++ b/sys/dev/pci/drm/radeon_drv.h
@@ -154,10 +154,6 @@ enum radeon_chip_flags {
 	RADEON_IS_IGPGART = 0x01000000UL,
 };
 
-#define GET_RING_HEAD(dev_priv)	(dev_priv->writeback_works ? \
-        DRM_READ32(  (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
-#define SET_RING_HEAD(dev_priv,val)	DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
-
 typedef struct drm_radeon_freelist {
 	unsigned int age;
 	struct drm_buf *buf;
@@ -236,7 +232,6 @@ typedef struct drm_radeon_private {
 	drm_radeon_freelist_t *head;
 	drm_radeon_freelist_t *tail;
 	int last_buf;
-	volatile u32 *scratch;
 	int writeback_works;
 
 	int usec_timeout;
@@ -324,11 +319,18 @@ static __inline__ int radeon_check_offset(drm_radeon_private_t *dev_priv,
 		(off >= gart_start && off <= gart_end));
 }
 
-void	radeondrm_begin_ring(struct drm_radeon_private *, int);
-void	radeondrm_advance_ring(struct drm_radeon_private *);
-void	radeondrm_commit_ring(struct drm_radeon_private *);
-void	radeondrm_out_ring(struct drm_radeon_private *, u_int32_t);
-void	radeondrm_out_ring_table(struct drm_radeon_private *, u_int32_t *, int);
+u_int32_t	radeondrm_read_rptr(struct drm_radeon_private *, u_int32_t);
+void		radeondrm_write_rptr(struct drm_radeon_private *, u_int32_t,
+		    u_int32_t);
+u_int32_t	radeondrm_get_ring_head(struct drm_radeon_private *);
+void		radeondrm_set_ring_head(struct drm_radeon_private *, u_int32_t);
+u_int32_t	radeondrm_get_scratch(struct drm_radeon_private *, u_int32_t);
+void		radeondrm_begin_ring(struct drm_radeon_private *, int);
+void		radeondrm_advance_ring(struct drm_radeon_private *);
+void		radeondrm_commit_ring(struct drm_radeon_private *);
+void		radeondrm_out_ring(struct drm_radeon_private *, u_int32_t);
+void		radeondrm_out_ring_table(struct drm_radeon_private *,
+		    u_int32_t *, int);
 
 				/* radeon_cp.c */
 extern int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
@@ -601,10 +603,6 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 
 #define RADEON_SCRATCHOFF( x )		(RADEON_SCRATCH_REG_OFFSET + 4*(x))
 
-#define GET_SCRATCH( x )	(dev_priv->writeback_works			\
-				? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
-				: RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
-
 #define RADEON_CRTC_CRNT_FRAME 0x0214
 #define RADEON_CRTC2_CRNT_FRAME 0x0314
 
diff --git a/sys/dev/pci/drm/radeon_state.c b/sys/dev/pci/drm/radeon_state.c
index e5e99517470..dd9c78c05b7 100644
--- a/sys/dev/pci/drm/radeon_state.c
+++ b/sys/dev/pci/drm/radeon_state.c
@@ -2341,13 +2341,13 @@ radeon_cp_getparam(struct drm_device *dev, void *data,
 		value = dev_priv->gart_buffers_offset;
 		break;
 	case RADEON_PARAM_LAST_FRAME:
-		value = GET_SCRATCH(0);
+		value = radeondrm_get_scratch(dev_priv, 0);
 		break;
 	case RADEON_PARAM_LAST_DISPATCH:
-		value = GET_SCRATCH(1);
+		value = radeondrm_get_scratch(dev_priv, 1);
 		break;
 	case RADEON_PARAM_LAST_CLEAR:
-		value = GET_SCRATCH(2);
+		value = radeondrm_get_scratch(dev_priv, 2);
 		break;
 	case RADEON_PARAM_IRQ_NR:
 		value = dev->irq;