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authorJonathan Gray <jsg@jsg.id.au>2013-07-01 13:47:25 +1000
committerJonathan Gray <jsg@jsg.id.au>2013-08-12 10:44:06 +1000
commitf74588479e39eb53503bbb3d2b16b40623b2e7a5 (patch)
tree8524b36b0647eefb7e512378743e03db2ff3b613 /sys/dev/pci
parent2c6b0b6794b52c5239f9d70284ce7317d995027b (diff)
drm/radeon: don't use get_engine_clock() on APUs, from 3.8.13
Diffstat (limited to 'sys/dev/pci')
-rw-r--r--sys/dev/pci/drm/radeon/radeon_pm.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/dev/pci/drm/radeon/radeon_pm.c b/sys/dev/pci/drm/radeon/radeon_pm.c
index 25a0485ee15..eb3888d3315 100644
--- a/sys/dev/pci/drm/radeon/radeon_pm.c
+++ b/sys/dev/pci/drm/radeon/radeon_pm.c
@@ -900,7 +900,11 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
struct radeon_device *rdev = dev->dev_private;
seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
- seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
+ /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */
+ if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP))
+ seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
+ else
+ seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
if (rdev->asic->pm.get_memory_clock)
seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));