Improve rdmsr/wrmsr exit handling for both AMD SVM and Intel VMX.

At some point, the logic for handling vmexits related to msr access
changed and the handling for SVM diverged from VMX. While booting the
newest 9front release, abieber@ noticed boot loops on an AMD host.

This commit changes the behavior to be the same between SVM and VMX hosts,
with the exception of a single MSR, and enforces that any rdmsr
instruction must be explicitly handled otherwise a #GP is injected into
the guest. Any wrmsr instructions that are not explicitly handled are
ignored (%rax, %rdx set to 0).

The PAT msr is now shadowed, allowing guests to read a copy of the host
PAT. Their writes are stored in guest vcpu state and not passed through to
the host cpu. (PAT writes are validated, however, and invalid values
inject #GP.)

tested by brynet@, abieber@
ok brynet@, mlarkin@

0 files changed, 0 insertions, 0 deletions