Now that xbox sort-of works on sparc64, port the cgtwelve driver, since

the only way to connect it to a sparc64 machine is via an xbox device.

3 files changed, 724 insertions, 11 deletions

diff --git a/sys/dev/sbus/cgtwelve.c b/sys/dev/sbus/cgtwelve.c
new file mode 100644
index 00000000000..07dd5199454
--- /dev/null
+++ b/sys/dev/sbus/cgtwelve.c
@@ -0,0 +1,496 @@
+/*	$OpenBSD: cgtwelve.c,v 1.1 2005/03/05 01:49:03 miod Exp $	*/
+
+/*
+ * Copyright (c) 2002, 2003 Miodrag Vallat.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * cgtwelve (GS) accelerated 24-bit framebuffer driver.
+ *
+ * Enough experiments and SMI's cg12reg.h made this possible.
+ */
+
+/*
+ * The cgtwelve framebuffer is a 3-slot SBUS card, that will fit only in
+ * SPARCstation 1, 1+, 2 and 5, or in an xbox SBUS extension.
+ *
+ * It is a 24-bit 3D accelerated framebuffer made by Matrox, featuring 4MB
+ * (regular model) or 8MB (high-res model) of video memory, a complex
+ * windowing engine, double buffering modes, three video planes (overlay,
+ * 8 bit and 24 bit color), and a lot of colormap combinations.
+ *
+ * All of this is driven by a set of three Bt462 ramdacs (latched unless
+ * explicitely programmed), and a couple of other Matrox-specific chips.
+ *
+ * XXX The high res card is untested.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/buf.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/conf.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/autoconf.h>
+#include <machine/bus.h>
+#include <machine/pmap.h>
+#include <machine/cpu.h>
+#include <machine/conf.h>
+
+#include <dev/wscons/wsconsio.h>
+#include <dev/wscons/wsdisplayvar.h>
+#include <dev/rasops/rasops.h>
+#include <machine/fbvar.h>
+
+#include <dev/sbus/sbusvar.h>
+
+#include <dev/sbus/cgtwelvereg.h>
+
+#include <dev/cons.h>	/* for prom console hook */
+
+/* per-display variables */
+struct cgtwelve_softc {
+	struct	sunfb	sc_sunfb;	/* common base device */
+	struct	sbusdev sc_sd;		/* sbus device */
+	bus_space_tag_t	sc_bustag;
+	bus_addr_t	sc_paddr;
+
+	volatile struct cgtwelve_dpu *sc_dpu;
+	volatile struct cgtwelve_apu *sc_apu;
+	volatile struct cgtwelve_dac *sc_ramdac;	/* RAMDAC registers */
+	volatile u_char *sc_overlay;	/* overlay or enable plane */
+	volatile u_long *sc_inten;	/* true color plane */
+
+	int	sc_highres;
+	int	sc_nscreens;
+};
+
+int	cgtwelve_ioctl(void *, u_long, caddr_t, int, struct proc *);
+int	cgtwelve_alloc_screen(void *, const struct wsscreen_descr *, void **,
+	    int *, int *, long *);
+void	cgtwelve_free_screen(void *, void *);
+int	cgtwelve_show_screen(void *, void *, int, void (*cb)(void *, int, int),
+	    void *);
+paddr_t	cgtwelve_mmap(void *, off_t, int);
+void	cgtwelve_reset(struct cgtwelve_softc *, int);
+void	cgtwelve_prom(void *);
+
+static __inline__ void cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc,
+	    u_int32_t addr);
+
+struct wsdisplay_accessops cgtwelve_accessops = {
+	cgtwelve_ioctl,
+	cgtwelve_mmap,
+	cgtwelve_alloc_screen,
+	cgtwelve_free_screen,
+	cgtwelve_show_screen,
+	NULL,	/* load_font */
+	NULL,	/* scrollback */
+	NULL,	/* getchar */
+	NULL	/* burner */
+};
+
+int	cgtwelvematch(struct device *, void *, void *);
+void	cgtwelveattach(struct device *, struct device *, void *);
+
+struct cfattach cgtwelve_ca = {
+	sizeof(struct cgtwelve_softc), cgtwelvematch, cgtwelveattach
+};
+
+struct cfdriver cgtwelve_cd = {
+	NULL, "cgtwelve", DV_DULL
+};
+
+
+/*
+ * Match a cgtwelve.
+ */
+int
+cgtwelvematch(struct device *parent, void *vcf, void *aux)
+{
+	struct cfdata *cf = vcf;
+	struct sbus_attach_args *sa = aux;
+
+	if (strcmp(cf->cf_driver->cd_name, sa->sa_name) != 0)
+		return (0);
+
+	return (1);
+}
+
+/*
+ * Attach and initialize a cgtwelve.
+ */
+void
+cgtwelveattach(struct device *parent, struct device *self, void *args)
+{
+	struct cgtwelve_softc *sc = (struct cgtwelve_softc *)self;
+	struct sbus_attach_args *sa = args;
+	bus_space_tag_t bt;
+	bus_space_handle_t bh;
+	int node, isconsole = 0;
+	char *ps;
+
+	bt = sa->sa_bustag;
+	node = sa->sa_node;
+
+	printf(": %s", getpropstring(node, "model"));
+	ps = getpropstring(node, "dev_id");
+	if (*ps != '\0')
+		printf(" (%s)", ps);
+	printf("\n");
+
+	isconsole = node == fbnode;
+
+	if (sa->sa_nreg == 0) {
+		printf("%s: no SBus registers!\n", self->dv_xname);
+		return;
+	}
+
+	sc->sc_bustag = bt;
+
+	/*
+	 * Map registers
+	 */
+	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
+	    CG12_OFF_DPU, sizeof(struct cgtwelve_dpu),
+	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
+		printf("%s: can't map DPU registers\n", self->dv_xname);
+		return;
+	}
+	sc->sc_dpu = bus_space_vaddr(bt, bh);
+	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
+	    CG12_OFF_APU, sizeof(struct cgtwelve_apu),
+	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
+		printf("%s: can't map APU registers\n", self->dv_xname);
+		return;
+	}
+	sc->sc_apu = bus_space_vaddr(bt, bh);
+	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
+	    CG12_OFF_DAC, sizeof(struct cgtwelve_dac),
+	    BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
+		printf("%s: can't map RAMDAC registers\n", self->dv_xname);
+		return;
+	}
+	sc->sc_ramdac = bus_space_vaddr(bt, bh);
+
+	/*
+	 * The console is using the 1-bit overlay plane, while the prom
+	 * will correctly report 32 bit depth.
+	 */
+	fb_setsize(&sc->sc_sunfb, 1, CG12_WIDTH, CG12_HEIGHT,
+	    node, 0);
+	sc->sc_sunfb.sf_depth = 1;
+	sc->sc_sunfb.sf_linebytes = sc->sc_sunfb.sf_width / 8;
+	sc->sc_sunfb.sf_fbsize = sc->sc_sunfb.sf_height *
+	    sc->sc_sunfb.sf_linebytes;
+
+	sc->sc_highres = sc->sc_sunfb.sf_width == CG12_WIDTH_HR;
+
+	/*
+	 * Map planes
+	 */
+	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
+	    (sc->sc_highres ? CG12_OFF_OVERLAY0_HR : CG12_OFF_OVERLAY0),
+	    round_page(sc->sc_highres ? CG12_SIZE_OVERLAY_HR :
+	        CG12_SIZE_OVERLAY), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
+		printf("%s: can't map overlay plane\n", self->dv_xname);
+		return;
+	}
+	sc->sc_overlay = bus_space_vaddr(bt, bh);
+	if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset +
+	    (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN),
+	    round_page(sc->sc_highres ? CG12_SIZE_COLOR24_HR :
+	        CG12_SIZE_COLOR24), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
+		printf("%s: can't map color plane\n", self->dv_xname);
+		return;
+	}
+	sc->sc_inten = bus_space_vaddr(bt, bh);
+	sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset +
+	    (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN));
+
+	/* reset cursor & frame buffer controls */
+	sc->sc_sunfb.sf_depth = 0;	/* force action */
+	cgtwelve_reset(sc, 1);
+
+	sc->sc_sunfb.sf_ro.ri_bits = (void *)sc->sc_overlay;
+	sc->sc_sunfb.sf_ro.ri_hw = sc;
+	fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
+
+	if (isconsole) {
+		fbwscons_console_init(&sc->sc_sunfb, -1, NULL);
+		shutdownhook_establish(cgtwelve_prom, sc);
+	}
+
+	sbus_establish(&sc->sc_sd, &sc->sc_sunfb.sf_dev);
+
+	printf("%s: %dx%d", self->dv_xname,
+	    sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
+	ps = getpropstring(node, "ucoderev");
+	if (*ps != '\0')
+		printf(", microcode rev. %s", ps);
+	printf("\n");
+
+	fbwscons_attach(&sc->sc_sunfb, &cgtwelve_accessops, isconsole);
+}
+
+int
+cgtwelve_ioctl(void *dev, u_long cmd, caddr_t data, int flags, struct proc *p)
+{
+	struct cgtwelve_softc *sc = dev;
+	struct wsdisplay_fbinfo *wdf;
+
+	/*
+	 * Note that, although the emulation (text) mode is running in the
+	 * overlay plane, we advertize the frame buffer as the full-blown
+	 * 32-bit beast it is.
+	 */
+	switch (cmd) {
+	case WSDISPLAYIO_GTYPE:
+		*(u_int *)data = WSDISPLAY_TYPE_SUNCG12;
+		break;
+	case WSDISPLAYIO_GINFO:
+		wdf = (struct wsdisplay_fbinfo *)data;
+		wdf->height = sc->sc_sunfb.sf_height;
+		wdf->width = sc->sc_sunfb.sf_width;
+		wdf->depth = 32;
+		wdf->cmsize = 0;
+		break;
+	case WSDISPLAYIO_LINEBYTES:
+		*(u_int *)data = sc->sc_sunfb.sf_linebytes * 32;
+		break;
+
+	case WSDISPLAYIO_GETCMAP:
+	case WSDISPLAYIO_PUTCMAP:
+		break;
+
+	case WSDISPLAYIO_SMODE:
+		if (*(int *)data == WSDISPLAYIO_MODE_EMUL) {
+			/* Back from X11 to text mode */
+			cgtwelve_reset(sc, 1);
+		} else {
+			/* Starting X11, switch to 32 bit mode */
+			cgtwelve_reset(sc, 32);
+		}
+		break;
+
+	default:
+		return (-1);	/* not supported yet */
+	}
+
+	return (0);
+}
+
+/*
+ * Clean up hardware state (e.g., after bootup or after X crashes).
+ */
+void
+cgtwelve_reset(struct cgtwelve_softc *sc, int depth)
+{
+	u_int32_t c;
+
+	if (sc->sc_sunfb.sf_depth != depth) {
+		if (depth == 1) {
+			/*
+			 * Select the enable plane as sc_overlay, and fill it.
+			 */
+			sc->sc_apu->hpage = sc->sc_highres ?
+			    CG12_HPAGE_ENABLE_HR : CG12_HPAGE_ENABLE;
+			sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
+			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
+			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
+			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
+
+			memset((void *)sc->sc_overlay, 0xff, sc->sc_highres ?
+			    CG12_SIZE_ENABLE_HR : CG12_SIZE_ENABLE);
+
+			/*
+			 * Select the overlay plane as sc_overlay.
+			 */
+			sc->sc_apu->hpage = sc->sc_highres ?
+			    CG12_HPAGE_OVERLAY_HR : CG12_HPAGE_OVERLAY;
+			sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
+			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
+			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
+			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
+
+			/*
+			 * Upload a strict mono colormap, or the text
+			 * upon returning from 32 bit mode would appear
+			 * as (slightly dark) white on white.
+			 */
+			cgtwelve_ramdac_wraddr(sc, 0);
+			sc->sc_ramdac->color = 0x00000000;
+			for (c = 1; c < 256; c++)
+				sc->sc_ramdac->color = 0x00ffffff;
+		} else {
+			/*
+			 * Select the overlay plane as sc_overlay.
+			 */
+			sc->sc_apu->hpage = sc->sc_highres ?
+			    CG12_HPAGE_OVERLAY_HR : CG12_HPAGE_OVERLAY;
+			sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
+			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
+			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
+			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
+
+			/*
+			 * Do not attempt to somewhat preserve screen
+			 * contents - reading the overlay plane and writing
+			 * to the color plane at the same time is not
+			 * reliable, and allocating memory to save a copy
+			 * of the overlay plane would be awful.
+			 */
+			bzero((void *)sc->sc_overlay, sc->sc_highres ?
+			    CG12_SIZE_OVERLAY_HR : CG12_SIZE_OVERLAY);
+
+			/*
+			 * Select the enable plane as sc_overlay, and clear it.
+			 */
+			sc->sc_apu->hpage = sc->sc_highres ?
+			    CG12_HPAGE_ENABLE_HR : CG12_HPAGE_ENABLE;
+			sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
+			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
+			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
+			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
+
+			bzero((void *)sc->sc_overlay, sc->sc_highres ?
+			    CG12_SIZE_ENABLE_HR : CG12_SIZE_ENABLE);
+
+			/*
+			 * Select the intensity (color) plane, and clear it.
+			 */
+			sc->sc_apu->hpage = sc->sc_highres ?
+			    CG12_HPAGE_24BIT_HR : CG12_HPAGE_24BIT;
+			sc->sc_apu->haccess = CG12_HACCESS_24BIT;
+			sc->sc_dpu->pln_sl_host = CG12_PLN_SL_24BIT;
+			sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_24BIT;
+			sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_24BIT;
+
+			memset((void *)sc->sc_inten, 0x00ffffff,
+			    sc->sc_highres ?
+			      CG12_SIZE_COLOR24_HR : CG12_SIZE_COLOR24);
+
+			/*
+			 * Use a direct colormap (ramp)
+			 */
+			cgtwelve_ramdac_wraddr(sc, 0);
+			for (c = 0; c < 256; c++)
+				sc->sc_ramdac->color = c | (c << 8) | (c << 16);
+		}
+	}
+
+	sc->sc_sunfb.sf_depth = depth;
+}
+
+/*
+ * Return the address that would map the given device at the given
+ * offset, allowing for the given protection, or return -1 for error.
+ */
+paddr_t
+cgtwelve_mmap(void *v, off_t offset, int prot)
+{
+	struct cgtwelve_softc *sc = v;
+
+	if (offset & PGOFSET || offset < 0)
+		return (-1);
+
+	/*
+	 * Note that mmap() will invoke this function only if we are NOT
+	 * in emulation mode, so we can assume 32 bit mode safely here.
+	 */
+	if (offset < sc->sc_sunfb.sf_fbsize * 32) {
+		return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr, offset,
+		    prot, BUS_SPACE_MAP_LINEAR));
+	}
+
+	return (-1);
+}
+
+int
+cgtwelve_alloc_screen(void *v, const struct wsscreen_descr *type,
+    void **cookiep, int *curxp, int *curyp, long *attrp)
+{
+	struct cgtwelve_softc *sc = v;
+
+	if (sc->sc_nscreens > 0)
+		return (ENOMEM);
+
+	*cookiep = &sc->sc_sunfb.sf_ro;
+	*curyp = 0;
+	*curxp = 0;
+	sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
+	     0, 0, 0, attrp);
+	sc->sc_nscreens++;
+	return (0);
+}
+
+void
+cgtwelve_free_screen(void *v, void *cookie)
+{
+	struct cgtwelve_softc *sc = v;
+
+	sc->sc_nscreens--;
+}
+
+int
+cgtwelve_show_screen(void *v, void *cookie, int waitok,
+    void (*cb)(void *, int, int), void *cbarg)
+{
+	return (0);
+}
+
+/*
+ * Simple Bt462 programming routines.
+ */
+
+static __inline__ void 
+cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc, u_int32_t addr)
+{
+	sc->sc_ramdac->addr_lo = (addr & 0xff);
+	sc->sc_ramdac->addr_hi = ((addr >> 8) & 0xff);
+}
+
+/*
+ * Shutdown hook used to restore PROM-compatible video mode on shutdown,
+ * so that the PROM prompt is visible again.
+ */
+void
+cgtwelve_prom(void *v)
+{
+	struct cgtwelve_softc *sc = v;
+	extern struct consdev consdev_prom;
+
+	if (sc->sc_sunfb.sf_depth != 1) {
+		cgtwelve_reset(sc, 1);
+
+		/*
+		 * Go back to prom output for the last few messages, so they
+		 * will be displayed correctly.
+		 */
+		cn_tab = &consdev_prom;
+	}
+}
diff --git a/sys/dev/sbus/cgtwelvereg.h b/sys/dev/sbus/cgtwelvereg.h
new file mode 100644
index 00000000000..9235a83d772
--- /dev/null
+++ b/sys/dev/sbus/cgtwelvereg.h
@@ -0,0 +1,213 @@
+/*	$OpenBSD: cgtwelvereg.h,v 1.1 2005/03/05 01:49:03 miod Exp $	*/
+
+/*
+ * Copyright (c) 2002 Miodrag Vallat.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * cgtwelve (GS) accelerated 24-bit framebuffer driver.
+ *
+ * Memory layout and scarce register information from SMI's cg12reg.h
+ */
+
+#define	CG12_HEIGHT		900
+#define	CG12_WIDTH		1152
+
+#define	CG12_HEIGHT_HR		1024
+#define	CG12_WIDTH_HR		1280
+
+/* offsets from the card mapping */
+#define	CG12_OFF_DPU		0x040100
+#define	CG12_OFF_APU		0x040200
+#define	CG12_OFF_DAC		0x040300
+#define	CG12_OFF_OVERLAY0	0x700000
+#define	CG12_OFF_OVERLAY1	0x780000
+#define	CG12_OFF_INTEN		0xc00000
+
+#define	CG12_OFF_OVERLAY0_HR	0xe00000
+#define	CG12_OFF_OVERLAY1_HR	0xf00000
+#define	CG12_OFF_INTEN_HR	0x800000
+
+/* sizes of various parts */
+#define	CG12_SIZE_DPU		0x000100
+#define	CG12_SIZE_APU		0x000100
+#define	CG12_SIZE_DAC		0x000400
+#define	CG12_SIZE_OVERLAY	0x020000
+#define	CG12_SIZE_ENABLE	0x020000
+#define	CG12_SIZE_COLOR8	0x100000
+#define	CG12_SIZE_COLOR24	0x400000
+
+#define	CG12_SIZE_OVERLAY_HR	0x030000
+#define	CG12_SIZE_ENABLE_HR	0x030000
+#define	CG12_SIZE_COLOR8_HR	0x180000
+#define	CG12_SIZE_COLOR24_HR	0x600000
+
+/*
+ * The "direct port access" register constants.
+ * All HACCESSS values include noHSTXY, noHCLIP, and SWAP.
+ */
+
+#define	CG12_HPAGE_OVERLAY	0x00000700	/* overlay page */
+#define	CG12_HPAGE_OVERLAY_HR	0x00000e00
+#define	CG12_HACCESS_OVERLAY	0x00000020	/* 1bit/pixel */
+#define	CG12_PLN_SL_OVERLAY	0x00000017	/* plane 23 */
+#define	CG12_PLN_WR_OVERLAY	0x00800000	/* write mask */
+#define	CG12_PLN_RD_OVERLAY	0xffffffff	/* read mask */
+
+#define	CG12_HPAGE_ENABLE	0x00000700	/* overlay page */
+#define	CG12_HPAGE_ENABLE_HR	0x00000e00
+#define	CG12_HACCESS_ENABLE	0x00000020	/* 1bit/pixel */
+#define	CG12_PLN_SL_ENABLE	0x00000016	/* plane 22 */
+#define	CG12_PLN_WR_ENABLE	0x00400000
+#define	CG12_PLN_RD_ENABLE	0xffffffff
+
+#define	CG12_HPAGE_24BIT	0x00000500	/* intensity page */
+#define	CG12_HPAGE_24BIT_HR	0x00000a00
+#define	CG12_HACCESS_24BIT	0x00000025	/* 32bits/pixel */
+#define	CG12_PLN_SL_24BIT	0x00000000	/* planes 0-31 */
+#define	CG12_PLN_WR_24BIT	0x00ffffff
+#define	CG12_PLN_RD_24BIT	0x00ffffff
+
+#define	CG12_HPAGE_8BIT		0x00000500	/* intensity page */
+#define	CG12_HPAGE_8BIT_HR	0x00000a00
+#define	CG12_HACCESS_8BIT	0x00000023	/* 8bits/pixel */
+#define	CG12_PLN_SL_8BIT	0x00000000	/* planes 0-7 */
+#define	CG12_PLN_WR_8BIT	0x00ffffff
+#define	CG12_PLN_RD_8BIT	0x000000ff
+
+#define	CG12_HPAGE_WID		0x00000700	/* overlay page */
+#define	CG12_HPAGE_WID_HR	0x00000e00
+#define	CG12_HACCESS_WID	0x00000023	/* 8bits/pixel */
+#define	CG12_PLN_SL_WID		0x00000010	/* planes 16-23 */
+#define	CG12_PLN_WR_WID		0x003f0000
+#define	CG12_PLN_RD_WID		0x003f0000
+
+#define	CG12_HPAGE_ZBUF		0x00000000	/* depth page */
+#define	CG12_HPAGE_ZBUF_HR	0x00000000
+#define	CG12_HACCESS_ZBUF	0x00000024	/* 16bits/pixel */
+#define	CG12_PLN_SL_ZBUF	0x00000060
+#define	CG12_PLN_WR_ZBUF	0xffffffff
+#define	CG12_PLN_RD_ZBUF	0xffffffff
+
+/* Direct Port Unit */
+struct cgtwelve_dpu {
+	u_int32_t	r[8];
+	u_int32_t	reload_ctl;
+	u_int32_t	reload_stb;
+	u_int32_t	alu_ctl;
+	u_int32_t	blu_ctl;
+	u_int32_t	control;
+	u_int32_t	xleft;
+	u_int32_t	shift0;
+	u_int32_t	shift1;
+	u_int32_t	zoom;
+	u_int32_t	bsr;
+	u_int32_t	color0;
+	u_int32_t	color1;
+	u_int32_t	compout;
+	u_int32_t	pln_rd_msk_host;
+	u_int32_t	pln_wr_msk_host;
+	u_int32_t	pln_rd_msk_local;
+	u_int32_t	pln_wr_msk_local;
+	u_int32_t	scis_ctl;
+	u_int32_t	csr;
+	u_int32_t	pln_reg_sl;
+	u_int32_t	pln_sl_host;
+	u_int32_t	pln_sl_local0;
+	u_int32_t	pln_sl_local1;
+	u_int32_t	broadcast;
+};
+
+/* APU */
+struct cgtwelve_apu {   
+	u_int32_t	imsg0;
+	u_int32_t	msg0;
+	u_int32_t	imsg1;
+	u_int32_t	msg1;
+	u_int32_t	ien0;
+	u_int32_t	ien1;
+	u_int32_t	iclear;
+	u_int32_t	istatus;
+	u_int32_t	cfcnt;
+	u_int32_t	cfwptr;
+	u_int32_t	cfrptr;
+	u_int32_t	cfilev0;
+	u_int32_t	cfilev1;
+	u_int32_t	rfcnt;
+	u_int32_t	rfwptr;
+	u_int32_t	rfrptr;
+	u_int32_t	rfilev0;
+	u_int32_t	rfilev1;
+	u_int32_t	size;
+	u_int32_t	res0;
+	u_int32_t	res1;
+	u_int32_t	res2;
+	u_int32_t	haccess;
+	u_int32_t	hpage;
+	u_int32_t	laccess;
+	u_int32_t	lpage;
+	u_int32_t	maccess;
+	u_int32_t	ppage;
+	u_int32_t	dwg_ctl;
+	u_int32_t	sam;
+	u_int32_t	sgn;
+	u_int32_t	length;
+	u_int32_t	dwg[8];
+	u_int32_t	reload_ctl;
+	u_int32_t	reload_stb;
+	u_int32_t	c_xleft;
+	u_int32_t	c_ytop;
+	u_int32_t	c_xright;
+	u_int32_t	c_ybot;
+	u_int32_t	f_xleft;
+	u_int32_t	f_xright;
+	u_int32_t	x_dst;
+	u_int32_t	y_dst;
+	u_int32_t	dst_ctl;
+	u_int32_t	morigin;
+	u_int32_t	vsg_ctl;
+	u_int32_t	h_sync;
+	u_int32_t	hblank;
+	u_int32_t	v_sync;
+	u_int32_t	vblank;
+	u_int32_t	vdpyint;
+	u_int32_t	vssyncs;
+	u_int32_t	hdelays;
+	u_int32_t	stdaddr;
+	u_int32_t	hpitches;
+	u_int32_t	zoom;
+	u_int32_t	test;
+};
+
+struct cgtwelve_dac
+{
+	u_int32_t	addr_lo;
+	u_int8_t	pad1[0x100 - 4];
+	u_int32_t	addr_hi;
+	u_int8_t	pad2[0x100 - 4];
+	u_int32_t	control;
+	u_int8_t	pad3[0x100 - 4];
+	u_int32_t	color;
+	u_int8_t	pad4[0x100 - 4];
+};
diff --git a/sys/dev/sbus/files.sbus b/sys/dev/sbus/files.sbus
index 67572e5d9f9..5f619a00e57 100644
--- a/sys/dev/sbus/files.sbus
+++ b/sys/dev/sbus/files.sbus
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.sbus,v 1.29 2005/03/05 01:44:52 miod Exp $
+#	$OpenBSD: files.sbus,v 1.30 2005/03/05 01:49:03 miod Exp $
 #	$NetBSD: files.sbus,v 1.16 2000/12/08 17:29:12 martin Exp $
 #
 # Config file and device description for machine-independent SBUS code.
@@ -52,6 +52,10 @@ file	dev/sbus/cs4231.c		audiocs
 attach	isp at sbus with isp_sbus
 file	dev/sbus/isp_sbus.c		isp_sbus
 
+device	agten: wsemuldisplaydev, rasops8, wsemul_sun
+attach	agten at sbus
+file	dev/sbus/agten.c		agten
+
 device	bwtwo: wsemuldisplaydev, rasops1, wsemul_sun
 attach	bwtwo at sbus
 file	dev/sbus/bwtwo.c		bwtwo
@@ -64,21 +68,17 @@ device	cgthree: wsemuldisplaydev, rasops8, wsemul_sun
 attach	cgthree at sbus
 file	dev/sbus/cgthree.c		cgthree
 
-device	zx: wsemuldisplaydev, rasops32, wsemul_sun
-attach	zx at sbus
-file	dev/sbus/zx.c			zx
-
-device	rfx: wsemuldisplaydev, rasops8, wsemul_sun
-attach	rfx at sbus
-file	dev/sbus/rfx.c			rfx
+device	cgtwelve: wsemuldisplaydev, rasops1, wsemul_sun
+attach	cgtwelve at sbus
+file	dev/sbus/cgtwelve.c		cgtwelve
 
 device	mgx: wsemuldisplaydev, rasops8, wsemul_sun
 attach	mgx at sbus
 file	dev/sbus/mgx.c			mgx
 
-device	agten: wsemuldisplaydev, rasops8, wsemul_sun
-attach	agten at sbus
-file	dev/sbus/agten.c		agten
+device	rfx: wsemuldisplaydev, rasops8, wsemul_sun
+attach	rfx at sbus
+file	dev/sbus/rfx.c			rfx
 
 device	tvtwo: wsemuldisplaydev, rasops32, wsemul_sun
 attach	tvtwo at sbus
@@ -88,6 +88,10 @@ device	vigra: wsemuldisplaydev, rasops8, wsemul_sun
 attach	vigra at sbus
 file	dev/sbus/vigra.c		vigra
 
+device	zx: wsemuldisplaydev, rasops32, wsemul_sun
+attach	zx at sbus
+file	dev/sbus/zx.c			zx
+
 device	magma {}
 attach	magma at sbus
 device	mtty