diff options
author | Brad Smith <brad@cvs.openbsd.org> | 2005-04-24 20:41:35 +0000 |
---|---|---|
committer | Brad Smith <brad@cvs.openbsd.org> | 2005-04-24 20:41:35 +0000 |
commit | 3e180e21d5faca6352ddee4c1d3cddb58cb35893 (patch) | |
tree | a5fcbfd977d21870fa849535b84730235f6ff077 /sys/dev | |
parent | 4fe0d50418e4c2653818243c3dbcf0e5bdc59215 (diff) |
add microcode to support interrupt mitigation on the
82551 F stepping chipset.
From FreeBSD via Dmitry Bogdan <dsb at imcs dot dvgu dot ru>
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/ic/fxp.c | 5 | ||||
-rw-r--r-- | sys/dev/ic/fxpreg.h | 17 | ||||
-rw-r--r-- | sys/dev/microcode/fxp/Makefile | 4 | ||||
-rw-r--r-- | sys/dev/microcode/fxp/build.c | 6 | ||||
-rw-r--r-- | sys/dev/microcode/fxp/rcvbundl.h | 170 |
5 files changed, 169 insertions, 33 deletions
diff --git a/sys/dev/ic/fxp.c b/sys/dev/ic/fxp.c index ce1918e52fe..83f7920ed3c 100644 --- a/sys/dev/ic/fxp.c +++ b/sys/dev/ic/fxp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fxp.c,v 1.68 2005/02/03 14:46:42 hshoexer Exp $ */ +/* $OpenBSD: fxp.c,v 1.69 2005/04/24 20:41:34 brad Exp $ */ /* $NetBSD: if_fxp.c,v 1.2 1997/06/05 02:01:55 thorpej Exp $ */ /* @@ -1859,6 +1859,9 @@ struct ucode { { FXP_REV_82550_C, D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD, "fxp-d102c" }, + { FXP_REV_82551_F, D102_E_CPUSAVER_DWORD, + D102_E_CPUSAVER_BUNDLE_MAX_DWORD, "fxp-d102e" }, + { 0, 0, 0, NULL } }; diff --git a/sys/dev/ic/fxpreg.h b/sys/dev/ic/fxpreg.h index ffb02907684..2373faf3075 100644 --- a/sys/dev/ic/fxpreg.h +++ b/sys/dev/ic/fxpreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: fxpreg.h,v 1.8 2005/01/14 18:14:12 deraadt Exp $ */ +/* $OpenBSD: fxpreg.h,v 1.9 2005/04/24 20:41:34 brad Exp $ */ /* * Copyright (c) 1995, David Greenman @@ -329,10 +329,13 @@ struct fxp_cb_ucode { /* * Chip revision values. */ -#define FXP_REV_82557 1 -#define FXP_REV_82558_A4 4 -#define FXP_REV_82558_B0 5 -#define FXP_REV_82559_A0 8 -#define FXP_REV_82559S_A 9 +#define FXP_REV_82557 1 /* catchall 82557 */ +#define FXP_REV_82558_A4 4 /* 82558 A4 stepping */ +#define FXP_REV_82558_B0 5 /* 82558 B0 stepping */ +#define FXP_REV_82559_A0 8 /* 82559 A0 stepping */ +#define FXP_REV_82559S_A 9 /* 82559S A stepping */ #define FXP_REV_82550 12 -#define FXP_REV_82550_C 13 +#define FXP_REV_82550_C 13 /* 82550 C stepping */ +#define FXP_REV_82551_E 14 /* 82551 E stepping */ +#define FXP_REV_82551_F 15 /* 82551 F stepping */ +#define FXP_REV_82551_10 16 /* 82551 */ diff --git a/sys/dev/microcode/fxp/Makefile b/sys/dev/microcode/fxp/Makefile index 8b190b135a9..674c64b8512 100644 --- a/sys/dev/microcode/fxp/Makefile +++ b/sys/dev/microcode/fxp/Makefile @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile,v 1.2 2004/12/22 12:08:23 deraadt Exp $ +# $OpenBSD: Makefile,v 1.3 2005/04/24 20:41:34 brad Exp $ NOPROG= NOMAN= @@ -10,7 +10,7 @@ NOMAN= (${MACHINE} == "hppa") || (${MACHINE} == "hppa64") || \ (${MACHINE} == "sgi") -FIRM= fxp-d101a fxp-d101b0 fxp-d101ma fxp-d101s fxp-d102 fxp-d102c +FIRM= fxp-d101a fxp-d101b0 fxp-d101ma fxp-d101s fxp-d102 fxp-d102c fxp-d102e CLEANFILES+= ${FIRM} build diff --git a/sys/dev/microcode/fxp/build.c b/sys/dev/microcode/fxp/build.c index c1488c60cbc..7fe2372c0eb 100644 --- a/sys/dev/microcode/fxp/build.c +++ b/sys/dev/microcode/fxp/build.c @@ -1,8 +1,8 @@ -/* $OpenBSD: build.c,v 1.1 2004/12/22 12:02:47 grange Exp $ */ +/* $OpenBSD: build.c,v 1.2 2005/04/24 20:41:34 brad Exp $ */ /* * Copyright (c) 2004 Theo de Raadt <deraadt@openbsd.org> - * Copyright (c) 2004 Dmitry Bogdan + * Copyright (c) 2004 Dmitry Bogdan <dsb@imcs.dvgu.ru> * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -30,6 +30,7 @@ const u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE; const u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE; const u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE; const u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE; +const u_int32_t fxp_ucode_d102e[] = D102_E_RCVBUNDLE_UCODE; #define UCODE(x) x, sizeof(x) @@ -60,6 +61,7 @@ main(int argc, char *argv[]) output("fxp-d101s", UCODE(fxp_ucode_d101s)); output("fxp-d102", UCODE(fxp_ucode_d102)); output("fxp-d102c", UCODE(fxp_ucode_d102c)); + output("fxp-d102e", UCODE(fxp_ucode_d102e)); return (0); } diff --git a/sys/dev/microcode/fxp/rcvbundl.h b/sys/dev/microcode/fxp/rcvbundl.h index 30b29b16c6b..5383855593e 100644 --- a/sys/dev/microcode/fxp/rcvbundl.h +++ b/sys/dev/microcode/fxp/rcvbundl.h @@ -1,4 +1,4 @@ -/* $OpenBSD: rcvbundl.h,v 1.1 2004/08/03 02:34:30 mickey Exp $ */ +/* $OpenBSD: rcvbundl.h,v 1.2 2005/04/24 20:41:34 brad Exp $ */ /* Copyright (c) 1999-2001, Intel Corporation @@ -39,7 +39,7 @@ Version: 3.28 This file contains the loadable micro code arrays to implement receive bundling on the D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step, -D102 B-step with TCO work around and D012 C-step. +D102 B-step with TCO work around, D102 C-step and D102 E-step. Each controller has its own specific micro code array. The array for one controller is totally incompatible with any other controller, and if used will most likely @@ -50,25 +50,6 @@ rcvbundl.h file given above). */ -/* Size of loadable micro code image for each supported chip. */ -#ifndef D100_NUM_MICROCODE_DWORDS -#define D100_NUM_MICROCODE_DWORDS 66 -#endif -#ifndef D101_NUM_MICROCODE_DWORDS -#define D101_NUM_MICROCODE_DWORDS 102 -#endif -#ifndef D101M_NUM_MICROCODE_DWORDS -#define D101M_NUM_MICROCODE_DWORDS 134 -#endif -#ifndef D101S_NUM_MICROCODE_DWORDS -#define D101S_NUM_MICROCODE_DWORDS 134 -#endif -#ifndef D102_NUM_MICROCODE_DWORDS -#define D102_NUM_MICROCODE_DWORDS 134 -#endif -#ifndef D102_NUM_TCO_MICROCODE_DWORDS -#define D102_NUM_TCO_MICROCODE_DWORDS 134 -#endif /************************************************************************* @@ -1126,3 +1107,150 @@ rcvbundl.h file given above). 0x00000000, \ 0x00000000, \ } + +/********************************************************/ +/* Micro code for the D102 E-step */ +/********************************************************/ + +/* Parameter values for the D102 E-step */ +#define D102_E_CPUSAVER_DWORD 42 +#define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54 +#define D102_E_CPUSAVER_MIN_SIZE_DWORD 46 + +#define D102_E_RCVBUNDLE_UCODE \ +{\ +0x007D028F, \ +0x0E4204F9, \ +0x14ED0C85, \ +0x14FA14E9, \ +0x0EF70E36, \ +0x1FFF1FFF, \ +0x00E014B9, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00E014BD, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00E014D5, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00E014C1, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00E014C8, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00200600, \ +0x00E014EE, \ +0x00000000, \ +0x00000000, \ +0x0030FF80, \ +0x00940E46, \ +0x00038200, \ +0x00102000, \ +0x00E00E43, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00300006, \ +0x00E014FB, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00906E41, \ +0x00800E3C, \ +0x00E00E39, \ +0x00000000, \ +0x00906EFD, \ +0x00900EFD, \ +0x00E00EF8, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +0x00000000, \ +} |