Multiple inclusion protection.

15 files changed, 88 insertions, 14 deletions

diff --git a/sys/dev/pci/pciide_acard_reg.h b/sys/dev/pci/pciide_acard_reg.h
index 7b421d67d28..bd73ae0b25d 100644
--- a/sys/dev/pci/pciide_acard_reg.h
+++ b/sys/dev/pci/pciide_acard_reg.h
@@ -27,6 +27,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_ACARD_REG_H_
+#define _DEV_PCI_PCIIDE_ACARD_REG_H_
+
 #define ATP850_IDETIME(channel)	(0x40 + (channel) * 4)
 #define ATP860_IDETIME		0x40
 
@@ -60,3 +63,5 @@ static const u_int8_t acard_udma_conf[] = {0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7};
 #define  ATP8x0_CTRL_EN(chan)	(0x00020000 << (chan))
 #define  ATP860_CTRL_INT	0x00010000
 #define  ATP860_CTRL_80P(chan)	(0x00000100 << (chan))
+
+#endif	/* !_DEV_PCI_PCIIDE_ACARD_REG_H_ */
diff --git a/sys/dev/pci/pciide_acer_reg.h b/sys/dev/pci/pciide_acer_reg.h
index 3793ad82931..749d93fc7a9 100644
--- a/sys/dev/pci/pciide_acer_reg.h
+++ b/sys/dev/pci/pciide_acer_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_acer_reg.h,v 1.6 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_acer_reg.h,v 1.7 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_acer_reg.h,v 1.4 2001/07/26 20:02:22 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_ACER_REG_H_
+#define _DEV_PCI_PCIIDE_ACER_REG_H_
+
 /*  class code attribute register 1 (1 byte) */
 #define ACER_CCAR1	0x43
 #define ACER_CHANSTATUS_RO            0x40
@@ -104,3 +107,5 @@ static int8_t acer_pio[] = {0x0c, 0x58, 0x44, 0x33, 0x31};
 #ifdef unused
 static int8_t acer_dma[] = {0x08, 0x33, 0x31};
 #endif
+
+#endif	/* !_DEV_PCI_PCIIDE_ACER_REG_H_ */
diff --git a/sys/dev/pci/pciide_amd_reg.h b/sys/dev/pci/pciide_amd_reg.h
index ebbff5c6c12..2a93a5efd23 100644
--- a/sys/dev/pci/pciide_amd_reg.h
+++ b/sys/dev/pci/pciide_amd_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_amd_reg.h,v 1.7 2004/03/12 19:10:07 grange Exp $ 	*/
+/*	$OpenBSD: pciide_amd_reg.h,v 1.8 2004/09/24 07:38:38 grange Exp $ 	*/
 /*	$NetBSD: pciide_amd_reg.h,v 1.2 2000/07/06 15:08:11 bouyer Exp $	*/
 
 /*
@@ -34,6 +34,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_AMD_REG_H_
+#define _DEV_PCI_PCIIDE_AMD_REG_H_
+
 /*
  * Registers definitions for AMD 756 PCI IDE controller.  Documentation
  * available at: http://www.amd.com/products/cpg/athlon/techdocs/pdf/22548.pdf
@@ -82,3 +85,5 @@ static const int8_t amd756_pio_rec[] = {0x08, 0x08, 0x08, 0x02, 0x00};
 
 static const int8_t amd756_udma_tim[] =
     {0x02, 0x01, 0x00, 0x04, 0x05, 0x06, 0x07};
+
+#endif	/* !_DEV_PCI_PCIIDE_AMD_REG_H_ */
diff --git a/sys/dev/pci/pciide_apollo_reg.h b/sys/dev/pci/pciide_apollo_reg.h
index 3784bcb5d3a..d8691e834fa 100644
--- a/sys/dev/pci/pciide_apollo_reg.h
+++ b/sys/dev/pci/pciide_apollo_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_apollo_reg.h,v 1.8 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_apollo_reg.h,v 1.9 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_apollo_reg.h,v 1.8 2001/01/05 18:04:43 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_APOLLO_REG_H_
+#define _DEV_PCI_PCIIDE_APOLLO_REG_H_
+
 /*
  * Registers definitions for VIA technologies's Apollo controllers (VT82V580VO,
  * VT82C586A and VT82C586B).
@@ -103,3 +106,5 @@ static int8_t apollo_udma66_tim[] = {0x03, 0x03, 0x02, 0x01, 0x00};
 static int8_t apollo_udma33_tim[] = {0x03, 0x02, 0x00};
 static int8_t apollo_pio_set[] = {0x0a, 0x0a, 0x0a, 0x02, 0x02};
 static int8_t apollo_pio_rec[] = {0x08, 0x08, 0x08, 0x02, 0x00};
+
+#endif	/* !_DEV_PCI_PCIIDE_APOLLO_REG_H_ */
diff --git a/sys/dev/pci/pciide_cmd_reg.h b/sys/dev/pci/pciide_cmd_reg.h
index a6911c6e375..6e7d3ec24bb 100644
--- a/sys/dev/pci/pciide_cmd_reg.h
+++ b/sys/dev/pci/pciide_cmd_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_cmd_reg.h,v 1.8 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_cmd_reg.h,v 1.9 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_cmd_reg.h,v 1.9 2000/08/02 20:23:46 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_CMD_REG_H_
+#define _DEV_PCI_PCIIDE_CMD_REG_H_
+
 /*
  * Registers definitions for CMD Technologies's PCI 064x IDE controllers.
  * Available from http://www.cmd.com/
@@ -106,3 +109,5 @@ static int8_t cmd0646_9_tim_udma[] = {0x03, 0x02, 0x01, 0x02, 0x01, 0x00};
  */
 static int8_t cmd0643_9_data_tim_pio[] = {0xA9, 0x57, 0x44, 0x32, 0x3F};
 static int8_t cmd0643_9_data_tim_dma[] = {0x87, 0x32, 0x3F};
+
+#endif	/* !_DEV_PCI_PCIIDE_CMD_REG_H_ */
diff --git a/sys/dev/pci/pciide_cy693_reg.h b/sys/dev/pci/pciide_cy693_reg.h
index 4185de6c3f8..6eeb27df203 100644
--- a/sys/dev/pci/pciide_cy693_reg.h
+++ b/sys/dev/pci/pciide_cy693_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_cy693_reg.h,v 1.5 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_cy693_reg.h,v 1.6 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_cy693_reg.h,v 1.4 2000/05/15 08:46:01 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_CY693_REG_H_
+#define _DEV_PCI_PCIIDE_CY693_REG_H_
+
 /*
  * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
  * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
@@ -87,3 +90,5 @@ static int8_t cy_dma_rec[] =   {7, 1, 0};
 /* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */
 #define CY_DMA_DATA_MODE_MASK  0x03
 #define CY_DMA_DATA_SINGLE     0x04
+
+#endif	/* !_DEV_PCI_PCIIDE_CY693_REG_H_ */
diff --git a/sys/dev/pci/pciide_hpt_reg.h b/sys/dev/pci/pciide_hpt_reg.h
index fb41c93d22d..0763e57cebc 100644
--- a/sys/dev/pci/pciide_hpt_reg.h
+++ b/sys/dev/pci/pciide_hpt_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_hpt_reg.h,v 1.9 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_hpt_reg.h,v 1.10 2004/09/24 07:38:38 grange Exp $	*/
 /*      $NetBSD: pciide_hpt_reg.h,v 1.4 2001/07/23 14:55:27 bouyer Exp $       */
 
 /*
@@ -31,6 +31,8 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_HPT_REG_H_
+#define _DEV_PCI_PCIIDE_HPT_REG_H_
 
 /*
  * Register definitions for Highpoint PCI IDE controllers.
@@ -154,3 +156,5 @@ static u_int32_t hpt374_dma[] =
 static u_int32_t hpt374_udma[] =
 	{0x121882ea, 0x12148254, 0x120c8242, 0x128c8242, 0x12ac8242,
 	 0x12848242, 0x12808242};
+
+#endif	/* !_DEV_PCI_PCIIDE_HPT_REG_H_ */
diff --git a/sys/dev/pci/pciide_natsemi_reg.h b/sys/dev/pci/pciide_natsemi_reg.h
index ee9291f8197..4a8e83b2436 100644
--- a/sys/dev/pci/pciide_natsemi_reg.h
+++ b/sys/dev/pci/pciide_natsemi_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_natsemi_reg.h,v 1.5 2004/02/02 19:38:43 grange Exp $	*/
+/*	$OpenBSD: pciide_natsemi_reg.h,v 1.6 2004/09/24 07:38:38 grange Exp $	*/
 
 /*
  * Copyright (c) 2001 Jason L. Wright (jason@thought.net)
@@ -27,6 +27,9 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _DEV_PCI_PCIIDE_NATSEMI_REG_H_
+#define _DEV_PCI_PCIIDE_NATSEMI_REG_H_
+
 /*
  * Register definitions for National Semiconductor PC87415.  Definitions
  * based on "PC87415: PCI-IDE DMA Master Mode Interface Controller"
@@ -128,3 +131,5 @@ const static u_int32_t scx200_dma66[] = { 0x000ffff3, 0x00035352, 0x00015151 };
 /* UDMA mode timings */
 const static u_int32_t scx200_udma33[] = { 0x00921250, 0x00911140, 0x00911030 };
 const static u_int32_t scx200_udma66[] = { 0x009436a1, 0x00933481, 0x00923261 };
+
+#endif	/* !_DEV_PCI_PCIIDE_NATSEMI_REG_H_ */
diff --git a/sys/dev/pci/pciide_nforce_reg.h b/sys/dev/pci/pciide_nforce_reg.h
index d0745d8e45b..9df5f8cdd5e 100644
--- a/sys/dev/pci/pciide_nforce_reg.h
+++ b/sys/dev/pci/pciide_nforce_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_nforce_reg.h,v 1.2 2003/12/12 13:00:38 grange Exp $	*/
+/*	$OpenBSD: pciide_nforce_reg.h,v 1.3 2004/09/24 07:38:38 grange Exp $	*/
 
 /*
  * Copyright (c) 2003 Alexander Yurchenko <grange@openbsd.org>
@@ -25,6 +25,9 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _DEV_PCI_PCIIDE_NFORCE_REG_H_
+#define _DEV_PCI_PCIIDE_NFORCE_REG_H_
+
 /* Configuration register */
 #define NFORCE_CONF		0x50
 #define NFORCE_CHAN_EN(chan) \
@@ -54,3 +57,5 @@
 /* Timing values */
 static u_int8_t nforce_pio[] = { 0xa8, 0x65, 0x42, 0x22, 0x20 };
 static u_int8_t nforce_udma[] = { 0x02, 0x01, 0x00, 0x04, 0x05, 0x06, 0x07 };
+
+#endif	/* !_DEV_PCI_PCIIDE_NFORCE_REG_H_ */
diff --git a/sys/dev/pci/pciide_opti_reg.h b/sys/dev/pci/pciide_opti_reg.h
index 27f39cf424d..c1eabe8130c 100644
--- a/sys/dev/pci/pciide_opti_reg.h
+++ b/sys/dev/pci/pciide_opti_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_opti_reg.h,v 1.2 2004/01/31 19:43:43 grange Exp $	*/
+/*	$OpenBSD: pciide_opti_reg.h,v 1.3 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_opti_reg.h,v 1.2 2000/06/07 20:42:53 scw Exp $	*/
 
 /*-
@@ -37,6 +37,9 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _DEV_PCI_PCIIDE_OPTI_REG_H_
+#define _DEV_PCI_PCIIDE_OPTI_REG_H_
+
 /*
  * Register definitions for OPTi PCIIDE controllers based on
  * their 82c621 chip.
@@ -126,3 +129,5 @@ const static u_int8_t opti_tim_as[2][8] = {		/* Address Setup */
 const static u_int8_t opti_tim_em[8] = {		/* Enhanced Mode */
 	0, 0, 0, 1, 2, 0, 1 ,2
 };
+
+#endif	/* !_DEV_PCI_PCIIDE_OPTI_REG_H_ */
diff --git a/sys/dev/pci/pciide_pdc202xx_reg.h b/sys/dev/pci/pciide_pdc202xx_reg.h
index d5b933e0076..97cef8fac8b 100644
--- a/sys/dev/pci/pciide_pdc202xx_reg.h
+++ b/sys/dev/pci/pciide_pdc202xx_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_pdc202xx_reg.h,v 1.10 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_pdc202xx_reg.h,v 1.11 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_pdc202xx_reg.h,v 1.5 2001/07/05 08:38:27 toshii Exp $ */
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_PDC202XX_REG_H_
+#define _DEV_PCI_PCIIDE_PDC202XX_REG_H_
+
 /*
  * Registers definitions for PROMISE PDC20246/PDC20262 PCI IDE controller.
  * Unfortunably the HW docs are not publically available. I've been able
@@ -122,3 +125,5 @@ static int8_t pdc2xx_udma_mc[] = {0x3, 0x2, 0x1, 0x2, 0x1, 0x1};
 #define PDC268_DATA(chan)	(0x03 + IDEDMA_SCH_OFFSET * (chan))
 #define PDC268_CABLE		0x04
 #define PDC268_INTR		0x20
+
+#endif	/* !_DEV_PCI_PCIIDE_PDC202XX_REG_H_ */
diff --git a/sys/dev/pci/pciide_piix_reg.h b/sys/dev/pci/pciide_piix_reg.h
index 0435eea3a20..a4476fa6609 100644
--- a/sys/dev/pci/pciide_piix_reg.h
+++ b/sys/dev/pci/pciide_piix_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_piix_reg.h,v 1.8 2003/11/07 21:34:56 grange Exp $	*/
+/*	$OpenBSD: pciide_piix_reg.h,v 1.9 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_piix_reg.h,v 1.5 2001/01/05 15:29:40 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_PIIX_REG_H_
+#define _DEV_PCI_PCIIDE_PIIX_REG_H_
+
 /*
  * Registers definitions for Intel's PIIX series PCI IDE controllers.
  * See Intel's
@@ -131,3 +134,5 @@ static int8_t piix4_sct_udma[] = {0x00, 0x01, 0x02, 0x01, 0x02, 0x01};
 #define ICH_SATA_PCS_P1E	0x02 /* Port 1 enabled */
 #define ICH_SATA_PCS_P0P	0x10 /* Port 0 present */
 #define ICH_SATA_PCS_P1P	0x20 /* Port 1 present */
+
+#endif	/* !_DEV_PCI_PCIIDE_PIIX_REG_H_ */
diff --git a/sys/dev/pci/pciide_sis_reg.h b/sys/dev/pci/pciide_sis_reg.h
index 534774bdc78..9eebf5b5390 100644
--- a/sys/dev/pci/pciide_sis_reg.h
+++ b/sys/dev/pci/pciide_sis_reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciide_sis_reg.h,v 1.5 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciide_sis_reg.h,v 1.6 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciide_sis_reg.h,v 1.6 2000/05/15 08:46:01 bouyer Exp $	*/
 
 /*
@@ -32,6 +32,9 @@
  *
  */
 
+#ifndef _DEV_PCI_PCIIDE_SIS_REG_H_
+#define _DEV_PCI_PCIIDE_SIS_REG_H_
+
 /*
  * Registers definitions for SiS SiS5597/98 PCI IDE controller.
  * Available from http://www.sis.com.tw/html/databook.html
@@ -112,3 +115,5 @@ static const u_int32_t sis_dma133new_tim[] =
     {0x22196008, 0x0c0a3008, 0x05093008};
 static const u_int32_t sis_udma133new_tim[] =
     {0x9f4, 0x64a, 0x474, 0x254, 0x234, 0x224, 0x214};
+
+#endif	/* !_DEV_PCI_PCIIDE_SIS_REG_H_ */
diff --git a/sys/dev/pci/pciidereg.h b/sys/dev/pci/pciidereg.h
index 4244ca789c6..070e4a7c5fe 100644
--- a/sys/dev/pci/pciidereg.h
+++ b/sys/dev/pci/pciidereg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciidereg.h,v 1.5 2003/09/28 21:01:43 grange Exp $	*/
+/*	$OpenBSD: pciidereg.h,v 1.6 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciidereg.h,v 1.6 2000/11/14 18:42:58 thorpej Exp $	*/
 
 /*
@@ -31,6 +31,9 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _DEV_PCI_PCIIDEREG_H_
+#define _DEV_PCI_PCIIDEREG_H_
+
 /*
  * PCI IDE controller register definitions.
  *
@@ -115,3 +118,5 @@ struct idedma_table {
 
 /* Number of idedma table needed */
 #define NIDEDMA_TABLES (MAXPHYS/PAGE_SIZE + 1)
+
+#endif	/* !_DEV_PCI_PCIIDEREG_H_ */
diff --git a/sys/dev/pci/pciidevar.h b/sys/dev/pci/pciidevar.h
index a4b3d086c33..a8ff73d4d09 100644
--- a/sys/dev/pci/pciidevar.h
+++ b/sys/dev/pci/pciidevar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pciidevar.h,v 1.7 2002/03/14 04:30:34 millert Exp $	*/
+/*	$OpenBSD: pciidevar.h,v 1.8 2004/09/24 07:38:38 grange Exp $	*/
 /*	$NetBSD: pciidevar.h,v 1.6 2001/01/12 16:04:00 bouyer Exp $	*/
 
 /*
@@ -31,6 +31,9 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _DEV_PCI_PCIIDEVAR_H_
+#define _DEV_PCI_PCIIDEVAR_H_
+
 /*
  * PCI IDE driver exported software structures.
  *
@@ -50,3 +53,5 @@ void	*pciide_machdep_compat_intr_establish(struct device *,
 void	pciide_machdep_compat_intr_disestablish(pci_chipset_tag_t pc,
 	    void *);
 #endif
+
+#endif	/* !_DEV_PCI_PCIIDEVAR_H_ */