Replace the ed driver.

ec is used for 3c503 cards, we for SMC/WD 80x3 series and ne for ne[12]00.
This also adds ne2k pnp support.

10 files changed, 2680 insertions, 11 deletions

diff --git a/sys/dev/isa/files.isa b/sys/dev/isa/files.isa
index 90b66cdebb7..eb7e1bb31bf 100644
--- a/sys/dev/isa/files.isa
+++ b/sys/dev/isa/files.isa
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.isa,v 1.42 1998/09/11 10:02:58 fgsch Exp $
+#	$OpenBSD: files.isa,v 1.43 1998/09/22 06:33:17 fgsch Exp $
 #	$NetBSD: files.isa,v 1.21 1996/05/16 03:45:55 mycroft Exp $
 #
 # Config.new file and device description for machine-independent ISA code.
@@ -139,10 +139,22 @@ file	dev/isa/wt.c			wt needs-flag
 # ISA networking drivers
 #
 
+# WD/SMC 80x3 family, SMC Elite Ultra [8216], SMC EtherEZ
+# MUST be first: probe is non invasive, and registers are clobbered
+# by other drivers's probe
+device	we: ether, ifnet, dp8390nic
+attach	we at isa
+file	dev/isa/if_we.c			we
+
 # 3Com common probe code
 define	elink
 file	dev/isa/elink.c			elink
 
+# 3Com 3C503
+device	ec: ether, ifnet, dp8390nic
+attach	ec at isa
+file	dev/isa/if_ec.c			ec
+
 # National Semiconductor DS8390/WD83C690-based boards
 # (WD/SMC 80x3 family, SMC Ultra [8216], 3Com 3C503, NE[12]000, and clones)
 # XXX conflicts with amiga if_ed.c
@@ -207,6 +219,10 @@ attach	le at isa with le_isa
 file	dev/isa/if_le.c			le_isa | le_pci
 file	dev/isa/if_le_isa.c		le_isa
 
+# Novell NE1000, NE2000, and clones
+attach	ne at isa with ne_isa
+file	dev/isa/if_ne_isa.c		ne_isa
+
 #
 # ISA Sound hardware
 #
diff --git a/sys/dev/isa/files.isapnp b/sys/dev/isa/files.isapnp
index 923a73772dc..69ba14f2db4 100644
--- a/sys/dev/isa/files.isapnp
+++ b/sys/dev/isa/files.isapnp
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.isapnp,v 1.7 1998/07/05 07:20:01 downsj Exp $
+#	$OpenBSD: files.isapnp,v 1.8 1998/09/22 06:33:18 fgsch Exp $
 #	$NetBSD: files.isapnp,v 1.7 1997/10/16 17:16:36 matt Exp $
 #
 # Config file and device description for machine-independent ISAPnP code.
@@ -30,6 +30,9 @@ file	dev/isa/if_le_isapnp.c		le_isapnp
 attach	ep at isapnp with ep_isapnp
 file	dev/isa/if_ep_isapnp.c		ep_isapnp
 
+attach	ne at isapnp with ne_isapnp
+file	dev/isa/if_ne_isapnp.c		ne_isapnp
+
 # Yamaha OPL3-SA3
 device  ym: audio, isa_dma, ad1848, auconv
 attach	ym at isapnp with ym_isapnp
diff --git a/sys/dev/isa/if_ec.c b/sys/dev/isa/if_ec.c
new file mode 100644
index 00000000000..0cf18c389cf
--- /dev/null
+++ b/sys/dev/isa/if_ec.c
@@ -0,0 +1,819 @@
+/*	$OpenBSD: if_ec.c,v 1.1 1998/09/22 06:33:18 fgsch Exp $	*/
+/*	$NetBSD: if_ec.c,v 1.9 1998/07/05 06:49:12 jonathan Exp $	*/
+
+/*-
+ * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
+ * adapters.
+ *
+ * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
+ *
+ * Copyright (C) 1993, David Greenman.  This software may be used, modified,
+ * copied, distributed, and sold, in both source and binary form provided that
+ * the above copyright and these terms are retained.  Under no circumstances is
+ * the author responsible for the proper functioning of this software, nor does
+ * the author assume any responsibility for damages incurred with its use.
+ */
+
+/*
+ * Device driver for the 3Com Etherlink II (3c503).
+ */
+
+#include "bpfilter.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/socket.h>
+#include <sys/mbuf.h>
+#include <sys/syslog.h>
+
+#include <net/if.h>
+#include <net/if_dl.h>
+#include <net/if_types.h>
+#include <net/if_media.h>
+
+#ifdef __NetBSD__
+#include <net/if_ether.h>
+#endif
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h> 
+#include <netinet/ip.h>
+#ifdef __NetBSD__
+#include <netinet/if_inarp.h> 
+#else
+#include <netinet/if_ether.h>
+#endif
+#endif 
+
+#ifdef NS
+#include <netns/ns.h>
+#include <netns/ns_if.h>
+#endif
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#include <net/bpfdesc.h>
+#endif
+
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/isa/isareg.h>
+#include <dev/isa/isavar.h>
+
+#include <dev/ic/dp8390reg.h>
+#include <dev/ic/dp8390var.h>
+
+#include <dev/isa/if_ecreg.h>
+
+struct ec_softc {
+	struct dp8390_softc sc_dp8390;
+
+	bus_space_tag_t sc_asict;	/* space tag for ASIC */
+	bus_space_handle_t sc_asich;	/* space handle for ASIC */
+
+	int sc_16bitp;			/* are we 16 bit? */
+
+	void *sc_ih;			/* interrupt handle */
+};
+
+int	ec_probe __P((struct device *, void *, void *));
+void	ec_attach __P((struct device *, struct device *, void *));
+
+struct cfattach ec_ca = {
+	sizeof(struct ec_softc), ec_probe, ec_attach
+};
+
+int	ec_set_media __P((struct ec_softc *, int));
+
+int	ec_mediachange __P((struct dp8390_softc *));
+void	ec_mediastatus __P((struct dp8390_softc *, struct ifmediareq *));
+
+void	ec_init_card __P((struct dp8390_softc *));
+int	ec_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
+int	ec_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
+void	ec_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
+int	ec_fake_test_mem __P((struct dp8390_softc *));
+int	ec_test_mem __P((struct dp8390_softc *));
+
+__inline void ec_readmem __P((struct ec_softc *, int, u_int8_t *, int));
+
+static const int ec_iobase[] = {
+	0x2e0, 0x2a0, 0x280, 0x250, 0x350, 0x330, 0x310, 0x300,
+};
+#define	NEC_IOBASE	(sizeof(ec_iobase) / sizeof(ec_iobase[0]))
+
+static const int ec_membase[] = {
+	MADDRUNK, MADDRUNK, MADDRUNK, MADDRUNK, 0xc8000, 0xcc000,
+	0xd8000, 0xdc000,
+};
+#define	NEC_MEMBASE	(sizeof(ec_membase) / sizeof(ec_membase[0]))
+
+int ec_media[] = {
+	IFM_ETHER|IFM_10_2,
+	IFM_ETHER|IFM_10_5,
+};
+#define	NEC_MEDIA	(sizeof(ec_media) / sizeof(ec_media[0]))
+#define	EC_DEFMEDIA	(IFM_ETHER|IFM_10_2)
+
+struct cfdriver ec_cd = {
+	NULL, "ec", DV_IFNET
+};
+
+int
+ec_probe(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct isa_attach_args *ia = aux;
+	bus_space_tag_t nict, asict, memt;
+	bus_space_handle_t nich, asich, memh;
+	bus_size_t memsize;
+	int nich_valid, asich_valid, memh_valid;
+	int i, rv = 0;
+	u_int8_t x;
+
+	nict = asict = ia->ia_iot;
+	memt = ia->ia_memt;
+
+	nich_valid = asich_valid = memh_valid = 0;
+
+	/*
+	 * Hmm, a 16-bit card has 16k of memory, but only an 8k window
+	 * to it.
+	 */
+	memsize = 8192;
+
+	/* Disallow wildcarded i/o addresses. */
+	if (ia->ia_iobase == -1 /* ISACF_PORT_DEFAULT */)
+		return (0);
+
+	/* Disallow wildcarded mem address. */
+	if (ia->ia_maddr == -1 /* ISACF_IOMEM_DEFAULT */)
+		return (0);
+
+	/* Validate the i/o base. */
+	for (i = 0; i < NEC_IOBASE; i++)
+		if (ia->ia_iobase == ec_iobase[i])
+			break;
+	if (i == NEC_IOBASE)
+		return (0);
+
+	/* Validate the mem base. */
+	for (i = 0; i < NEC_MEMBASE; i++) {
+		if (ec_membase[i] == MADDRUNK)
+			continue;
+		if (ia->ia_maddr == ec_membase[i])
+			break;
+	}
+	if (i == NEC_MEMBASE)
+		return (0);
+
+	/* Attempt to map the NIC space. */
+	if (bus_space_map(nict, ia->ia_iobase + ELINK2_NIC_OFFSET,
+	    ELINK2_NIC_PORTS, 0, &nich))
+		goto out;
+	nich_valid = 1;
+
+	/* Attempt to map the ASIC space. */
+	if (bus_space_map(asict, ia->ia_iobase + ELINK2_ASIC_OFFSET,
+	    ELINK2_ASIC_PORTS, 0, &asich))
+		goto out;
+	asich_valid = 1;
+
+	/* Attempt to map the memory space. */
+	if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
+		goto out;
+	memh_valid = 1;
+
+	/*
+	 * Verify that the kernel configured I/O address matches the
+	 * board configured I/O address.
+	 *
+	 * This is really only useful to see if something that looks like
+	 * the board is there; after all, we're already talking to it at
+	 * this point.
+	 */
+	x = bus_space_read_1(asict, asich, ELINK2_BCFR);
+	if (x == 0 || (x & (x - 1)) != 0)
+		goto out;
+	i = ffs(x) - 1;
+	if (ia->ia_iobase != ec_iobase[i])
+		goto out;
+
+	/*
+	 * ...and for the memory address.  Note we do not support
+	 * cards configured with shared memory disabled.
+	 */
+	x = bus_space_read_1(asict, asich, ELINK2_PCFR);
+	if (x == 0 || (x & (x - 1)) != 0)
+		goto out;
+	i = ffs(x) - 1;
+	if (ia->ia_maddr != ec_membase[i])
+		goto out;
+
+	/* So, we say we've found it! */
+	ia->ia_iosize = ELINK2_NIC_PORTS;
+	ia->ia_msize = memsize;
+	rv = 1;
+
+ out:
+	if (nich_valid)
+		bus_space_unmap(nict, nich, ELINK2_NIC_PORTS);
+	if (asich_valid)
+		bus_space_unmap(asict, asich, ELINK2_ASIC_PORTS);
+	if (memh_valid)
+		bus_space_unmap(memt, memh, memsize);
+	return (rv);
+}
+
+void
+ec_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct ec_softc *esc = (struct ec_softc *)self;
+	struct dp8390_softc *sc = &esc->sc_dp8390;
+	struct isa_attach_args *ia = aux;
+	bus_space_tag_t nict, asict, memt;
+	bus_space_handle_t nich, asich, memh;
+	bus_size_t memsize;
+	u_int8_t tmp;
+	int i;
+
+	printf("\n");
+
+	nict = asict = ia->ia_iot;
+	memt = ia->ia_memt;
+
+	/*
+	 * Hmm, a 16-bit card has 16k of memory, but only an 8k window
+	 * to it.
+	 */
+	memsize = 8192;
+
+	/* Map the NIC space. */
+	if (bus_space_map(nict, ia->ia_iobase + ELINK2_NIC_OFFSET,
+	    ELINK2_NIC_PORTS, 0, &nich)) {
+		printf("%s: can't map nic i/o space\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/* Map the ASIC space. */
+	if (bus_space_map(asict, ia->ia_iobase + ELINK2_ASIC_OFFSET,
+	    ELINK2_ASIC_PORTS, 0, &asich)) {
+		printf("%s: can't map asic i/o space\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/* Map the memory space. */
+	if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh)) {
+		printf("%s: can't map shared memory\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	esc->sc_asict = asict;
+	esc->sc_asich = asich;
+
+	sc->sc_regt = nict;
+	sc->sc_regh = nich;
+
+	sc->sc_buft = memt;
+	sc->sc_bufh = memh;
+
+	/* Interface is always enabled. */
+	sc->sc_enabled = 1;
+
+	/* Registers are linear. */
+	for (i = 0; i < 16; i++)
+		sc->sc_reg_map[i] = i;
+
+	/* Now we can use the NIC_{GET,PUT}() macros. */
+
+	/*
+	 * Reset NIC and ASIC.  Enable on-board transeiver throughout
+	 * reset sequence since it will lock up if the cable isn't
+	 * connected if we don't.
+	 */
+	bus_space_write_1(asict, asich, ELINK2_CR,
+	    ELINK2_CR_RST | ELINK2_CR_XSEL);
+
+	/* Wait for a while, then un-reset it. */
+	delay(50);
+
+	/*
+	 * The 3Com ASIC defaults to rather strange settings for the CR
+	 * after a reset.  It's important to set it again after the
+	 * following write (this is done when we map the PROM below).
+	 */
+	bus_space_write_1(asict, asich, ELINK2_CR, ELINK2_CR_XSEL);
+
+	/* Wait a bit for the NIC to recover from the reset. */
+	delay(5000);
+
+	/*
+	 * Get the station address from on-board ROM.
+	 *
+	 * First, map Ethernet address PROM over the top of where the NIC
+	 * registers normally appear.
+	 */
+	bus_space_write_1(asict, asich, ELINK2_CR,
+	    ELINK2_CR_XSEL | ELINK2_CR_EALO);
+
+	for (i = 0; i < ETHER_ADDR_LEN; i++)
+#ifdef __NetBSD__
+		sc->sc_enaddr[i] = NIC_GET(nict, nich, i);
+#else
+		sc->sc_arpcom.ac_enaddr[i] = NIC_GET(nict, nich, i);
+#endif
+
+	/*
+	 * Unmap PROM - select NIC registers.  The proper setting of the
+	 * transciever is set in later in ec_init_card() via dp8390_init().
+	 */
+	bus_space_write_1(asict, asich, ELINK2_CR, ELINK2_CR_XSEL);
+
+	/* Determine if this is an 8-bit or 16-bit board. */
+
+	/* Select page 0 registers. */
+	NIC_PUT(nict, nich, ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
+
+	/*
+	 * Attempt to clear WTS.  If it doesn't clear, then this is a
+	 * 16-bit board.
+	 */
+	NIC_PUT(nict, nich, ED_P0_DCR, 0);
+
+	/* Select page 2 registers. */
+	NIC_PUT(nict, nich, ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_2 | ED_CR_STP);
+
+	/* The 3c503 forces the WTS bit to a one if this is a 16-bit board. */
+	if (NIC_GET(nict, nich, ED_P2_DCR) & ED_DCR_WTS)
+		esc->sc_16bitp = 1;
+	else
+		esc->sc_16bitp = 0;
+
+	printf("%s: 3Com 3c503 Ethernet (%s-bit)\n",
+	    sc->sc_dev.dv_xname, esc->sc_16bitp ? "16" : "8");
+
+	/* Select page 0 registers. */
+	NIC_PUT(nict, nich, ED_P2_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
+
+	sc->cr_proto = ED_CR_RD2;
+
+	/*
+	 * DCR gets:
+	 *
+	 *	FIFO threshold to 8, No auto-init Remote DMA,
+	 *	byte order=80x86.
+	 *
+	 * 16-bit cards also get word-wide DMA transfers.
+	 */
+	sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
+	    (esc->sc_16bitp ? ED_DCR_WTS : 0);
+
+	sc->test_mem = ec_fake_test_mem;
+	sc->ring_copy = ec_ring_copy;
+	sc->write_mbuf = ec_write_mbuf;
+	sc->read_hdr = ec_read_hdr;
+
+	sc->sc_mediachange = ec_mediachange;
+	sc->sc_mediastatus = ec_mediastatus;
+
+	sc->mem_start = 0;
+	sc->mem_size = memsize;
+
+	/* Do generic parts of attach. */
+	if (dp8390_config(sc, ec_media, NEC_MEDIA, EC_DEFMEDIA)) {
+		printf("%s: configuration failed\n", sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/*
+	 * We need to override the way dp8390_config() set up our
+	 * shared memory.
+	 *
+	 * We have an entire 8k window to put the transmit buffers on the
+	 * 16-bit boards.  But since the 16bit 3c503's shared memory is only
+	 * fast enough to overlap the loading of one full-size packet, trying
+	 * to load more than 2 buffers can actually leave the transmitter idle
+	 * during the load.  So 2 seems the best value.  (Although a mix of
+	 * variable-sized packets might change this assumption.  Nonetheless,
+	 * we optimize for linear transfers of same-size packets.)
+	 */
+	if (esc->sc_16bitp) {
+		if (sc->sc_dev.dv_cfdata->cf_flags & DP8390_NO_MULTI_BUFFERING)
+			sc->txb_cnt = 1;
+		else
+			sc->txb_cnt = 2;
+
+		sc->tx_page_start = ELINK2_TX_PAGE_OFFSET_16BIT;
+		sc->rec_page_start = ELINK2_RX_PAGE_OFFSET_16BIT;
+		sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) + 
+		    sc->rec_page_start;
+		sc->mem_ring = sc->mem_start;
+	} else {
+		sc->txb_cnt = 1;
+		sc->tx_page_start = ELINK2_TX_PAGE_OFFSET_8BIT;
+		sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE;
+		sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) +
+		    sc->tx_page_start;
+		sc->mem_ring = sc->mem_start +
+		    (ED_TXBUF_SIZE << ED_PAGE_SHIFT);
+	}
+
+	/*
+	 * Initialize CA page start/stop registers.  Probably only needed
+	 * if doing DMA, but what the Hell.
+	 */
+	bus_space_write_1(asict, asich, ELINK2_PSTR, sc->rec_page_start);
+	bus_space_write_1(asict, asich, ELINK2_PSPR, sc->rec_page_stop);
+
+	/*
+	 * Program the IRQ.
+	 */
+	switch (ia->ia_irq) {
+	case 9:	tmp = ELINK2_IDCFR_IRQ2; break;
+	case 3:	tmp = ELINK2_IDCFR_IRQ3; break;
+	case 4:	tmp = ELINK2_IDCFR_IRQ4; break;
+	case 5:	tmp = ELINK2_IDCFR_IRQ5; break;
+		break;
+
+	case IRQUNK:
+		printf("%s: wildcarded IRQ is not allowed\n",
+		    sc->sc_dev.dv_xname);
+		return;
+
+	default:
+		printf("%s: invalid IRQ %d, must be 3, 4, 5, or 9\n",
+		    sc->sc_dev.dv_xname, ia->ia_irq);
+		return;
+	}
+
+	bus_space_write_1(asict, asich, ELINK2_IDCFR, tmp);
+
+	/*
+	 * Initialize the GA configuration register.  Set bank and enable
+	 * shared memory.
+	 */
+	bus_space_write_1(asict, asich, ELINK2_GACFR,
+	    ELINK2_GACFR_RSEL | ELINK2_GACFR_MBS0);
+
+	/*
+	 * Intialize "Vector Pointer" registers.  These gawd-awful things
+	 * are compared to 20 bits of the address on the ISA, and if they
+	 * match, the shared memory is disabled.  We se them to 0xffff0...
+	 * allegedly the reset vector.
+	 */
+	bus_space_write_1(asict, asich, ELINK2_VPTR2, 0xff);
+	bus_space_write_1(asict, asich, ELINK2_VPTR1, 0xff);
+	bus_space_write_1(asict, asich, ELINK2_VPTR0, 0x00);
+
+	/*
+	 * Now run the real memory test.
+	 */
+	if (ec_test_mem(sc)) {
+		printf("%s: memory test failed\n", sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/* Establish interrupt handler. */
+	esc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
+	    IPL_NET, dp8390_intr, sc, sc->sc_dev.dv_xname);
+	if (esc->sc_ih == NULL)
+		printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
+}
+
+int
+ec_fake_test_mem(sc)
+	struct dp8390_softc *sc;
+{
+
+	/*
+	 * We have to do this after we initialize the GA, but we
+	 * have to do that after calling dp8390_config(), which
+	 * wants to test memory.  Put this noop here, and then
+	 * actually test memory later.
+	 */
+	return (0);
+}
+
+int
+ec_test_mem(sc)
+	struct dp8390_softc *sc;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+	bus_space_tag_t memt = sc->sc_buft;
+	bus_space_handle_t memh = sc->sc_bufh;
+	bus_size_t memsize = sc->mem_size;
+	int i;
+
+	if (esc->sc_16bitp)
+		bus_space_set_region_2(memt, memh, 0, 0, memsize >> 1);
+	else
+		bus_space_set_region_1(memt, memh, 0, 0, memsize);
+
+	if (esc->sc_16bitp) {
+		for (i = 0; i < memsize; i += 2) {
+			if (bus_space_read_2(memt, memh, i) != 0)
+				goto fail;
+		}
+	} else {
+		for (i = 0; i < memsize; i++) {
+			if (bus_space_read_1(memt, memh, i) != 0)
+				goto fail;
+		}
+	}
+
+	return (0);
+
+ fail:
+	printf("%s: failed to clear shared memory at offset 0x%x\n",
+	    sc->sc_dev.dv_xname, i);
+	return (1);
+}
+
+/*
+ * Given a NIC memory source address and a host memory destination address,
+ * copy 'len' from NIC to host using shared memory.  The 'len' is rounded
+ * up to a word - ok as long as mbufs are word-sized.
+ */
+__inline void
+ec_readmem(esc, from, to, len)
+	struct ec_softc *esc;
+	int from;
+	u_int8_t *to;
+	int len;
+{
+	bus_space_tag_t memt = esc->sc_dp8390.sc_buft;
+	bus_space_handle_t memh = esc->sc_dp8390.sc_bufh;
+
+	if (len & 1)
+		++len;
+
+	if (esc->sc_16bitp)
+		bus_space_read_region_2(memt, memh, from, (u_int16_t *)to,
+		    len >> 1);
+	else
+		bus_space_read_region_1(memt, memh, from, to, len);
+}
+
+int
+ec_write_mbuf(sc, m, buf)
+	struct dp8390_softc *sc;
+	struct mbuf *m;
+	int buf;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+	bus_space_tag_t asict = esc->sc_asict;
+	bus_space_handle_t asich = esc->sc_asich;
+	bus_space_tag_t memt = esc->sc_dp8390.sc_buft;
+	bus_space_handle_t memh = esc->sc_dp8390.sc_bufh;
+	u_int8_t *data, savebyte[2];
+	int savelen, len, leftover;
+#ifdef DIAGNOSTIC
+	u_int8_t *lim;
+#endif
+
+	savelen = m->m_pkthdr.len;
+
+	/*
+	 * 8-bit boards are simple: we're already in the correct
+	 * page, and no alignment tricks are necessary.
+	 */
+	if (esc->sc_16bitp == 0) {
+		for (; m != NULL; buf += m->m_len, m = m->m_next)
+			bus_space_write_region_1(memt, memh, buf,
+			    mtod(m, u_int8_t *), m->m_len);
+		return (savelen);
+	}
+
+	/*
+	 * If it's a 16-bit board, we have transmit buffers
+	 * in a different page; switch to it.
+	 */
+	if (esc->sc_16bitp)
+		bus_space_write_1(asict, asich, ELINK2_GACFR,
+		    ELINK2_GACFR_RSEL);
+
+	/* Start out with no leftover data. */
+	leftover = 0;
+	savebyte[0] = savebyte[1] = 0;
+
+	for (; m != NULL; m = m->m_next) {
+		len = m->m_len;
+		if (len == 0)
+			continue;
+		data = mtod(m, u_int8_t *);
+#ifdef DIAGNOSTIC
+		lim = data + len;
+#endif
+		while (len > 0) {
+			if (leftover) {
+				/*
+				 * Data left over (from mbuf or realignment).
+				 * Buffer the next byte, and write it and
+				 * the leftover data out.
+				 */
+				savebyte[1] = *data++;
+				len--;
+				bus_space_write_2(memt, memh, buf,
+				    *(u_int16_t *)savebyte);
+				buf += 2;
+				leftover = 0;
+#ifdef i386
+#define ALIGNED_POINTER(p,t)	1
+#endif
+#ifdef alpha
+#define ALIGNED_POINTER(p,t)	((((u_long)(p)) & (sizeof(t)-1)) == 0)
+#endif
+			} else if (ALIGNED_POINTER(data, u_int16_t) == 0) {
+				/*
+				 * Unaligned data; buffer the next byte.
+				 */
+				savebyte[0] = *data++;
+				len--;
+				leftover = 1;
+			} else {
+				/*
+				 * Aligned data; output contiguous words as
+				 * much as we can, then buffer the remaining
+				 * byte, if any.
+				 */
+				leftover = len & 1;
+				len &= ~1;
+				bus_space_write_region_2(memt, memh, buf,
+				    (u_int16_t *)data, len >> 1);
+				data += len;
+				buf += len;
+				if (leftover)
+					savebyte[0] = *data++;
+				len = 0;
+			}
+		}
+		if (len < 0)
+			panic("ec_write_mbuf: negative len");
+#ifdef DIAGNOSTIC
+		if (data != lim)
+			panic("ec_write_mbuf: data != lim");
+#endif
+	}
+	if (leftover) {
+		savebyte[1] = 0;
+		bus_space_write_2(memt, memh, buf, *(u_int16_t *)savebyte);
+	}
+
+	/*
+	 * Switch back to receive page.
+	 */
+	if (esc->sc_16bitp)
+		bus_space_write_1(asict, asich, ELINK2_GACFR,
+		    ELINK2_GACFR_RSEL | ELINK2_GACFR_MBS0);
+	
+	return (savelen);
+}
+
+int
+ec_ring_copy(sc, src, dst, amount)
+	struct dp8390_softc *sc;
+	int src;
+	caddr_t dst;
+	u_short amount;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+	u_short tmp_amount;
+
+	/* Does copy wrap to lower addr in ring buffer? */
+	if (src + amount > sc->mem_end) {
+		tmp_amount = sc->mem_end - src;
+
+		/* Copy amount up to end of NIC memory. */
+		ec_readmem(esc, src, dst, tmp_amount);
+
+		amount -= tmp_amount;
+		src = sc->mem_ring;
+		dst += tmp_amount;
+	}
+
+	ec_readmem(esc, src, dst, amount);
+
+	return (src + amount);
+}
+
+void
+ec_read_hdr(sc, packet_ptr, packet_hdrp)
+	struct dp8390_softc *sc;
+	int packet_ptr;
+	struct dp8390_ring *packet_hdrp;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+
+	ec_readmem(esc, packet_ptr, (u_int8_t *)packet_hdrp,
+	    sizeof(struct dp8390_ring));
+#if BYTE_ORDER == BIG_ENDIAN
+	packet_hdrp->count = bswap16(packet_hdrp->count);
+#endif
+}
+
+int
+ec_mediachange(sc)
+	struct dp8390_softc *sc;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+	struct ifmedia *ifm = &sc->sc_media;
+
+	return (ec_set_media(esc, ifm->ifm_media));
+}
+
+void
+ec_mediastatus(sc, ifmr)
+	struct dp8390_softc *sc;
+	struct ifmediareq *ifmr;
+{
+	struct ifmedia *ifm = &sc->sc_media;
+
+	/*
+	 * The currently selected media is always the active media.
+	 */
+	ifmr->ifm_active = ifm->ifm_cur->ifm_media;
+}
+
+void
+ec_init_card(sc)
+	struct dp8390_softc *sc;
+{
+	struct ec_softc *esc = (struct ec_softc *)sc;
+	struct ifmedia *ifm = &sc->sc_media;
+
+	(void) ec_set_media(esc, ifm->ifm_cur->ifm_media);
+}
+
+int
+ec_set_media(esc, media)
+	struct ec_softc *esc;
+	int media;
+{
+	u_int8_t new;
+
+	if (IFM_TYPE(media) != IFM_ETHER)
+		return (EINVAL);
+
+	switch (IFM_SUBTYPE(media)) {
+	case IFM_10_2:
+		new = ELINK2_CR_XSEL;
+		break;
+
+	case IFM_10_5:
+		new = 0;
+		break;
+
+	default:
+		return (EINVAL);
+	}
+
+	bus_space_write_1(esc->sc_asict, esc->sc_asich, ELINK2_CR, new);
+	return (0);
+}
diff --git a/sys/dev/isa/if_ecreg.h b/sys/dev/isa/if_ecreg.h
new file mode 100644
index 00000000000..767d683ab56
--- /dev/null
+++ b/sys/dev/isa/if_ecreg.h
@@ -0,0 +1,166 @@
+/*	$OpenBSD: if_ecreg.h,v 1.1 1998/09/22 06:33:18 fgsch Exp $	*/
+/*	$NetBSD: if_ecreg.h,v 1.1 1997/11/02 00:44:26 thorpej Exp $	*/
+
+/*
+ * 3Com Etherlink II (3c503) register definitions.
+ *
+ * Copyright (C) 1993, David Greenman.  This software may be used, modified,
+ * copied, distributed, and sold, in both source and binary form provided that
+ * the above copyright and these terms are retained.  Under no circumstances is
+ * the author responsible for the proper functioning of this software, nor does
+ * the author assume any responsibility for damages incurred with its use.
+ */
+
+#ifndef _DEV_ISA_IF_ECREG_H_
+#define	_DEV_ISA_IF_ECREG_H_
+
+#define ELINK2_NIC_OFFSET	0
+#define ELINK2_ASIC_OFFSET	0x400	/* offset to nic i/o regs */
+
+/*
+ * XXX - The I/O address range is fragmented in the 3c503; this is the
+ *	number of regs at iobase.
+ */
+#define ELINK2_NIC_PORTS	16
+#define	ELINK2_ASIC_PORTS	16
+
+/* tx memory starts in second bank on 8bit cards */
+#define ELINK2_TX_PAGE_OFFSET_8BIT	0x20
+
+/* tx memory starts in first bank on 16bit cards */
+#define ELINK2_TX_PAGE_OFFSET_16BIT	0x0
+
+/* ...and rx memory starts in second bank */
+#define ELINK2_RX_PAGE_OFFSET_16BIT	0x20
+
+
+/*
+ * Page Start Register.  Must match PSTART in NIC.
+ */
+#define ELINK2_PSTR		0
+
+/*
+ * Page Stop Register.  Must match PSTOP in NIC.
+ */
+#define ELINK2_PSPR		1
+
+/*
+ * DrQ Timer Register.  Determines number of bytes to be transfered during a
+ * DMA burst.
+ */
+#define ELINK2_DQTR		2
+
+/*
+ * Base Configuration Register.  Read-only register which contains the
+ * board-configured I/O base address of the adapter.  Bit encoded.
+ */
+#define ELINK2_BCFR		3
+
+/*
+ * EPROM Configuration Register.  Read-only register which contains the
+ * board-configured memory base address.  Bit encoded.
+ */
+#define ELINK2_PCFR		4
+
+/*
+ * GA Configuration Register.  Gate-Array Configuration Register.
+ *
+ * mbs2  mbs1  mbs0	start address
+ *  0     0     0	0x0000
+ *  0     0     1	0x2000
+ *  0     1     0	0x4000
+ *  0     1     1	0x6000
+ *
+ * Note that with adapters with only 8K, the setting for 0x2000 must always be
+ * used.
+ */
+#define ELINK2_GACFR		5
+
+#define ELINK2_GACFR_MBS0	0x01
+#define ELINK2_GACFR_MBS1	0x02
+#define ELINK2_GACFR_MBS2	0x04
+
+#define ELINK2_GACFR_RSEL	0x08	/* enable shared memory */
+#define ELINK2_GACFR_TEST	0x10	/* for GA testing */
+#define ELINK2_GACFR_OWS	0x20	/* select 0WS access to GA */
+#define ELINK2_GACFR_TCM	0x40	/* Mask DMA interrupts */
+#define ELINK2_GACFR_NIM	0x80	/* Mask NIC interrupts */
+
+/*
+ * Control Register.  Miscellaneous control functions.
+ */
+#define ELINK2_CR		6
+
+#define ELINK2_CR_RST		0x01	/* Reset GA and NIC */
+#define ELINK2_CR_XSEL		0x02	/* Transceiver select.  BNC=1(def) AUI=0 */
+#define ELINK2_CR_EALO		0x04	/* window EA PROM 0-15 to I/O base */
+#define ELINK2_CR_EAHI		0x08	/* window EA PROM 16-31 to I/O base */
+#define ELINK2_CR_SHARE		0x10	/* select interrupt sharing option */
+#define ELINK2_CR_DBSEL		0x20	/* Double buffer select */
+#define ELINK2_CR_DDIR		0x40	/* DMA direction select */
+#define ELINK2_CR_START		0x80	/* Start DMA controller */
+
+/*
+ * Status Register.  Miscellaneous status information.
+ */
+#define ELINK2_STREG		7
+
+#define ELINK2_STREG_REV	0x07	/* GA revision */
+#define ELINK2_STREG_DIP	0x08	/* DMA in progress */
+#define ELINK2_STREG_DTC	0x10	/* DMA terminal count */
+#define ELINK2_STREG_OFLW	0x20	/* Overflow */
+#define ELINK2_STREG_UFLW	0x40	/* Underflow */
+#define ELINK2_STREG_DPRDY	0x80	/* Data port ready */
+
+/*
+ * Interrupt/DMA Configuration Register
+ */
+#define ELINK2_IDCFR		8
+
+#define ELINK2_IDCFR_DRQ	0x07	/* DMA request */
+#define ELINK2_IDCFR_UNUSED	0x08	/* not used */
+#if 0
+#define ELINK2_IDCFR_IRQ	0xF0	/* Interrupt request */
+#else
+#define ELINK2_IDCFR_IRQ2	0x10	/* Interrupt request 2 select */
+#define ELINK2_IDCFR_IRQ3	0x20	/* Interrupt request 3 select */
+#define ELINK2_IDCFR_IRQ4	0x40	/* Interrupt request 4 select */
+#define ELINK2_IDCFR_IRQ5	0x80	/* Interrupt request 5 select */
+#endif
+
+/*
+ * DMA Address Register MSB
+ */
+#define ELINK2_DAMSB		9
+
+/*
+ * DMA Address Register LSB
+ */
+#define ELINK2_DALSB		0x0a
+
+/*
+ * Vector Pointer Register 2
+ */
+#define ELINK2_VPTR2		0x0b
+
+/*
+ * Vector Pointer Register 1
+ */
+#define ELINK2_VPTR1		0x0c
+
+/*
+ * Vector Pointer Register 0
+ */
+#define ELINK2_VPTR0		0x0d
+
+/*
+ * Register File Access MSB
+ */
+#define ELINK2_RFMSB		0x0e
+
+/*
+ * Register File Access LSB
+ */
+#define ELINK2_RFLSB		0x0f
+
+#endif /* _DEV_ISA_IF_ECREG_H_ */
diff --git a/sys/dev/isa/if_ne_isa.c b/sys/dev/isa/if_ne_isa.c
new file mode 100644
index 00000000000..94e6144d5ae
--- /dev/null
+++ b/sys/dev/isa/if_ne_isa.c
@@ -0,0 +1,219 @@
+/*	$OpenBSD: if_ne_isa.c,v 1.1 1998/09/22 06:33:19 fgsch Exp $	*/
+/*	$NetBSD: if_ne_isa.c,v 1.6 1998/07/05 06:49:13 jonathan Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bpfilter.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+#include <sys/ioctl.h>
+#include <sys/errno.h>
+#include <sys/syslog.h>
+#include <sys/select.h>
+#include <sys/device.h>
+
+#include <net/if.h>
+#include <net/if_dl.h>
+#ifdef __NetBSD__
+#include <net/if_ether.h>
+#endif
+#include <net/if_media.h>
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h>
+#include <netinet/ip.h>
+#ifdef __NetBSD__
+#include <netinet/if_inarp.h>
+#else
+#include <netinet/if_ether.h>
+#endif
+#endif
+
+#ifdef NS
+#include <netns/ns.h>
+#include <netns/ns_if.h>
+#endif
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#include <net/bpfdesc.h>
+#endif
+
+#include <machine/intr.h>
+#include <machine/bus.h>
+
+#include <dev/ic/dp8390reg.h>
+#include <dev/ic/dp8390var.h>
+
+#include <dev/ic/ne2000reg.h>
+#include <dev/ic/ne2000var.h>
+
+#include <dev/isa/isavar.h>
+
+int	ne_isa_match __P((struct device *, void *, void *));
+void	ne_isa_attach __P((struct device *, struct device *, void *));
+
+struct ne_isa_softc {
+	struct	ne2000_softc sc_ne2000;		/* real "ne2000" softc */
+
+	/* ISA-specific goo. */
+	void	*sc_ih;				/* interrupt cookie */
+};
+
+struct cfattach ne_isa_ca = {
+	sizeof(struct ne_isa_softc), ne_isa_match, ne_isa_attach
+};
+
+int
+ne_isa_match(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct isa_attach_args *ia = aux;
+	bus_space_tag_t nict = ia->ia_iot;
+	bus_space_handle_t nich;
+	bus_space_tag_t asict;
+	bus_space_handle_t asich;
+	int rv = 0;
+
+	/* Disallow wildcarded values. */
+	if (ia->ia_irq ==  -1 /* ISACF_IRQ_DEFAULT */)
+		return (0);
+	if (ia->ia_iobase == -1 /* ISACF_PORT_DEFAULT */)
+		return (0);
+
+	/* Make sure this is a valid NE[12]000 i/o address. */
+	if ((ia->ia_iobase & 0x1f) != 0)
+		return (0);
+
+	/* Map i/o space. */
+	if (bus_space_map(nict, ia->ia_iobase, NE2000_NPORTS, 0, &nich))
+		return (0);
+
+	asict = nict;
+	if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
+	    NE2000_ASIC_NPORTS, &asich))
+		goto out;
+
+	/* Look for an NE2000-compatible card. */
+	rv = ne2000_detect(nict, nich, asict, asich);
+
+	if (rv)
+		ia->ia_iosize = NE2000_NPORTS;
+
+ out:
+	bus_space_unmap(nict, nich, NE2000_NPORTS);
+	return (rv);
+}
+
+void
+ne_isa_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct ne_isa_softc *isc = (struct ne_isa_softc *)self;
+	struct ne2000_softc *nsc = &isc->sc_ne2000;
+	struct dp8390_softc *dsc = &nsc->sc_dp8390;
+	struct isa_attach_args *ia = aux;
+	bus_space_tag_t nict = ia->ia_iot;
+	bus_space_handle_t nich;
+	bus_space_tag_t asict = nict;
+	bus_space_handle_t asich;
+	const char *typestr;
+
+	printf("\n");
+
+	/* Map i/o space. */
+	if (bus_space_map(nict, ia->ia_iobase, NE2000_NPORTS, 0, &nich)) {
+		printf("%s: can't map i/o space\n", dsc->sc_dev.dv_xname);
+		return;
+	}
+
+	if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
+	    NE2000_ASIC_NPORTS, &asich)) {
+		printf("%s: can't subregion i/o space\n", dsc->sc_dev.dv_xname);
+		return;
+	}
+
+	dsc->sc_regt = nict;
+	dsc->sc_regh = nich;
+
+	nsc->sc_asict = asict;
+	nsc->sc_asich = asich;
+
+	/*
+	 * Detect it again, so we can print some information about the
+	 * interface.
+	 */
+	switch (ne2000_detect(nict, nich, asict, asich)) {
+	case NE2000_TYPE_NE1000:
+		typestr = "NE1000";
+		break;
+
+	case NE2000_TYPE_NE2000:
+		typestr = "NE2000";
+		break;
+
+	default:
+		printf("%s: where did the card go?!\n", dsc->sc_dev.dv_xname);
+		return;
+	}
+
+	printf("%s: %s Ethernet\n", dsc->sc_dev.dv_xname, typestr);
+
+	/* This interface is always enabled. */
+	dsc->sc_enabled = 1;
+
+	/*
+	 * Do generic NE2000 attach.  This will read the station address
+	 * from the EEPROM.
+	 */
+	ne2000_attach(nsc, NULL);
+
+	/* Establish the interrupt handler. */
+	isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
+	    IPL_NET, dp8390_intr, dsc, dsc->sc_dev.dv_xname);
+	if (isc->sc_ih == NULL)
+		printf("%s: couldn't establish interrupt handler\n",
+		    dsc->sc_dev.dv_xname);
+}
diff --git a/sys/dev/isa/if_ne_isapnp.c b/sys/dev/isa/if_ne_isapnp.c
new file mode 100644
index 00000000000..b851ad5d084
--- /dev/null
+++ b/sys/dev/isa/if_ne_isapnp.c
@@ -0,0 +1,192 @@
+/*	$OpenBSD: if_ne_isapnp.c,v 1.1 1998/09/22 06:33:19 fgsch Exp $	*/
+/*	$NetBSD: if_ne_isapnp.c,v 1.7 1998/07/23 19:30:45 christos Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center and Matt Thomas of the 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bpfilter.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+#include <sys/ioctl.h>
+#include <sys/errno.h>
+#include <sys/syslog.h>
+#include <sys/select.h>
+#include <sys/device.h>
+
+#include <net/if.h>
+#include <net/if_dl.h>
+#ifdef __NetBSD__
+#include <net/if_ether.h>
+#endif
+#include <net/if_media.h>
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h>
+#include <netinet/ip.h>
+#ifdef __NetBSD__
+#include <netinet/if_inarp.h>
+#else
+#include <netinet/if_ether.h>
+#endif
+#endif
+
+#ifdef NS
+#include <netns/ns.h>
+#include <netns/ns_if.h>
+#endif
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#include <net/bpfdesc.h>
+#endif
+
+#include <machine/intr.h>
+#include <machine/bus.h>
+
+#include <dev/ic/dp8390reg.h>
+#include <dev/ic/dp8390var.h>
+
+#include <dev/ic/ne2000reg.h>
+#include <dev/ic/ne2000var.h>
+
+#include <dev/isa/isavar.h>
+
+#include <dev/isa/isapnpreg.h>
+#ifdef __NetBSD__
+#include <dev/isa/isapnpvar.h>
+#include <dev/isa/isapnpdevs.h>
+#endif
+
+static int ne_isapnp_match __P((struct device *, void *, void *));
+static void ne_isapnp_attach __P((struct device *, struct device *, void *));
+
+struct ne_isapnp_softc {
+	struct	ne2000_softc sc_ne2000;		/* real "ne2000" softc */
+
+	/* ISA-specific goo. */
+	void	*sc_ih;				/* interrupt cookie */
+};
+
+struct cfattach ne_isapnp_ca = {
+	sizeof(struct ne_isapnp_softc), ne_isapnp_match, ne_isapnp_attach
+};
+
+static int
+ne_isapnp_match(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	return 1;
+}
+
+static void
+ne_isapnp_attach(
+	struct device *parent,
+	struct device *self,
+	void *aux)
+{
+	struct ne_isapnp_softc * const isc = (struct ne_isapnp_softc *)self;
+	struct ne2000_softc * const nsc = &isc->sc_ne2000;
+	struct dp8390_softc * const dsc = &nsc->sc_dp8390;
+	struct isa_attach_args * const ipa = aux;
+	bus_space_tag_t nict;
+	bus_space_handle_t nich;
+	bus_space_tag_t asict;
+	bus_space_handle_t asich;
+	const char *typestr;
+
+	printf("\n");
+
+	nict = ipa->ia_iot;
+	nich = ipa->ipa_io[0].h;
+
+	asict = nict;
+
+	if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
+	    NE2000_ASIC_NPORTS, &asich)) {
+		printf("%s: can't subregion i/o space\n", dsc->sc_dev.dv_xname);
+		return;
+	}
+
+	dsc->sc_regt = nict;
+	dsc->sc_regh = nich;
+
+	nsc->sc_asict = asict;
+	nsc->sc_asich = asich;
+
+	/*
+	 * Detect it again, so we can print some information about the
+	 * interface.
+	 */
+	switch (ne2000_detect(nict, nich, asict, asich)) {
+	case NE2000_TYPE_NE1000:
+		typestr = "NE1000";
+		break;
+
+	case NE2000_TYPE_NE2000:
+		typestr = "NE2000";
+		break;
+
+	default:
+		printf("%s: where did the card go?!\n", dsc->sc_dev.dv_xname);
+		return;
+	}
+
+	printf("%s: %s Ethernet\n", dsc->sc_dev.dv_xname, typestr);
+
+	/* This interface is always enabled. */
+	dsc->sc_enabled = 1;
+
+	/*
+	 * Do generic NE2000 attach.  This will read the station address
+	 * from the EEPROM.
+	 */
+	ne2000_attach(nsc, NULL);
+
+	/* Establish the interrupt handler. */
+	isc->sc_ih = isa_intr_establish(ipa->ia_ic, ipa->ipa_irq[0].num,
+	    IST_EDGE, IPL_NET, dp8390_intr, dsc,
+	    dsc->sc_dev.dv_xname);
+	if (isc->sc_ih == NULL)
+		printf("%s: couldn't establish interrupt handler\n",
+		    dsc->sc_dev.dv_xname);
+}
diff --git a/sys/dev/isa/if_we.c b/sys/dev/isa/if_we.c
new file mode 100644
index 00000000000..266e4f39a3b
--- /dev/null
+++ b/sys/dev/isa/if_we.c
@@ -0,0 +1,1022 @@
+/*	$OpenBSD: if_we.c,v 1.1 1998/09/22 06:33:19 fgsch Exp $	*/
+/*	$NetBSD: if_we.c,v 1.11 1998/07/05 06:49:14 jonathan Exp $	*/
+
+/*-
+ * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
+ * adapters.
+ *
+ * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
+ *
+ * Copyright (C) 1993, David Greenman.  This software may be used, modified,
+ * copied, distributed, and sold, in both source and binary form provided that
+ * the above copyright and these terms are retained.  Under no circumstances is
+ * the author responsible for the proper functioning of this software, nor does
+ * the author assume any responsibility for damages incurred with its use.
+ */
+
+/*
+ * Device driver for the Western Digital/SMC 8003 and 8013 series,
+ * and the SMC Elite Ultra (8216).
+ */
+
+#include "bpfilter.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/socket.h>
+#include <sys/mbuf.h>
+#include <sys/syslog.h>
+
+#include <net/if.h>
+#include <net/if_dl.h>
+#include <net/if_types.h>
+#include <net/if_media.h>
+
+#ifdef __NetBSD__
+#include <net/if_ether.h>
+#endif
+
+#ifdef INET
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h> 
+#include <netinet/ip.h>
+#ifdef __NetBSD__
+#include <netinet/if_inarp.h> 
+#else
+#include <netinet/if_ether.h>
+#endif
+#endif 
+
+#ifdef NS
+#include <netns/ns.h>
+#include <netns/ns_if.h>
+#endif
+
+#if NBPFILTER > 0
+#include <net/bpf.h>
+#include <net/bpfdesc.h>
+#endif
+
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/isa/isareg.h>
+#include <dev/isa/isavar.h>
+
+#include <dev/ic/dp8390reg.h>
+#include <dev/ic/dp8390var.h>
+
+#include <dev/isa/if_wereg.h>
+
+#ifndef __BUS_SPACE_HAS_STREAM_METHODS
+#define	bus_space_read_region_stream_2	bus_space_read_region_2
+#define	bus_space_write_stream_2	bus_space_write_2
+#define	bus_space_write_region_stream_2	bus_space_write_region_2
+#endif
+
+struct we_softc {
+	struct dp8390_softc sc_dp8390;
+
+	bus_space_tag_t sc_asict;	/* space tag for ASIC */
+	bus_space_handle_t sc_asich;	/* space handle for ASIC */
+
+	u_int8_t sc_laar_proto;
+	u_int8_t sc_msr_proto;
+
+	u_int8_t sc_type;		/* our type */
+
+	int sc_16bitp;			/* are we 16 bit? */
+
+	void *sc_ih;			/* interrupt handle */
+};
+
+int	we_probe __P((struct device *, void *, void *));
+void	we_attach __P((struct device *, struct device *, void *));
+
+struct cfattach we_ca = {
+	sizeof(struct we_softc), we_probe, we_attach
+};
+
+#ifdef __NetBSD__
+extern struct cfdriver we_cd;
+#else
+struct cfdriver we_cd = {
+	NULL, "we", DV_IFNET
+};
+#endif
+
+const char *we_params __P((bus_space_tag_t, bus_space_handle_t, u_int8_t *,
+	    bus_size_t *, int *, int *));
+void	we_set_media __P((struct we_softc *, int));
+
+int	we_mediachange __P((struct dp8390_softc *));
+void	we_mediastatus __P((struct dp8390_softc *, struct ifmediareq *));
+
+void	we_recv_int __P((struct dp8390_softc *));
+void	we_init_card __P((struct dp8390_softc *));
+int	we_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
+int	we_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
+void	we_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
+int	we_test_mem __P((struct dp8390_softc *));
+
+__inline void we_readmem __P((struct we_softc *, int, u_int8_t *, int));
+
+static const int we_584_irq[] = {
+	9, 3, 5, 7, 10, 11, 15, 4,
+};
+#define	NWE_584_IRQ	(sizeof(we_584_irq) / sizeof(we_584_irq[0]))
+
+static const int we_790_irq[] = {
+	IRQUNK, 9, 3, 5, 7, 10, 11, 15,
+};
+#define	NWE_790_IRQ	(sizeof(we_790_irq) / sizeof(we_790_irq[0]))
+
+int we_media[] = {
+	IFM_ETHER|IFM_10_2,
+	IFM_ETHER|IFM_10_5,
+};
+#define	NWE_MEDIA	(sizeof(we_media) / sizeof(we_media[0]))
+
+/*
+ * Delay needed when switching 16-bit access to shared memory.
+ */
+#define	WE_DELAY(wsc) delay(3)
+
+/*
+ * Enable card RAM, and 16-bit access.
+ */
+#define	WE_MEM_ENABLE(wsc) \
+do { \
+	if ((wsc)->sc_16bitp) \
+		bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
+		    WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
+	bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
+	    WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
+	WE_DELAY((wsc)); \
+} while (0)
+
+/*
+ * Disable card RAM, and 16-bit access.
+ */
+#define	WE_MEM_DISABLE(wsc) \
+do { \
+	bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
+	    WE_MSR, (wsc)->sc_msr_proto); \
+	if ((wsc)->sc_16bitp) \
+		bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
+		    WE_LAAR, (wsc)->sc_laar_proto); \
+	WE_DELAY((wsc)); \
+} while (0)
+
+int
+we_probe(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct isa_attach_args *ia = aux;
+	struct cfdata *cf = match;
+	bus_space_tag_t asict, memt;
+	bus_space_handle_t asich, memh;
+	bus_size_t memsize;
+	int asich_valid, memh_valid;
+	int i, is790, rv = 0;
+	u_int8_t x, type;
+
+	asict = ia->ia_iot;
+	memt = ia->ia_memt;
+
+	asich_valid = memh_valid = 0;
+
+	/* Disallow wildcarded i/o addresses. */
+	if (ia->ia_iobase == -1 /* ISACF_PORT_DEFAULT */)
+		return (0);
+
+	/* Disallow wildcarded mem address. */
+	if (ia->ia_maddr == -1 /* ISACF_IOMEM_DEFAULT */)
+		return (0);
+
+	/* Attempt to map the device. */
+	if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich))
+		goto out;
+	asich_valid = 1;
+
+#ifdef TOSH_ETHER
+	bus_space_write_1(asict, asich, WE_MSR, WE_MSR_POW);
+#endif
+
+	/*
+	 * Attempt to do a checksum over the station address PROM.
+	 * If it fails, it's probably not a WD/SMC board.  There is
+	 * a problem with this, though.  Some clone WD8003E boards
+	 * (e.g. Danpex) won't pass the checksum.  In this case,
+	 * the checksum byte always seems to be 0.
+	 */
+	for (x = 0, i = 0; i < 8; i++)
+		x += bus_space_read_1(asict, asich, WE_PROM + i);
+
+	if (x != WE_ROM_CHECKSUM_TOTAL) {
+		/* Make sure it's an 8003E clone... */
+		if (bus_space_read_1(asict, asich, WE_CARD_ID) !=
+		    WE_TYPE_WD8003E)
+			goto out;
+
+		/* Check the checksum byte. */
+		if (bus_space_read_1(asict, asich, WE_PROM + 7) != 0)
+			goto out;
+	}
+
+	/*
+	 * Reset the card to force it into a known state.
+	 */
+#ifdef TOSH_ETHER
+	bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST | WE_MSR_POW);
+#else
+	bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST);
+#endif
+	delay(100);
+
+	bus_space_write_1(asict, asich, WE_MSR,
+	    bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST);
+
+	/* Wait in case the card is reading it's EEPROM. */
+	delay(5000);
+
+	/*
+	 * Get parameters.
+	 */
+	if (we_params(asict, asich, &type, &memsize, NULL, &is790) == NULL)
+		goto out;
+
+	/* Allow user to override probed value. */
+	if (ia->ia_msize)
+		memsize = ia->ia_msize;
+
+	/* Attempt to map the memory space. */
+	if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
+		goto out;
+	memh_valid = 1;
+
+	/*
+	 * If possible, get the assigned interrupt number from the card
+	 * and use it.
+	 */
+	if (is790) {
+		u_int8_t hwr;
+
+		/* Assemble together the encoded interrupt number. */
+		hwr = bus_space_read_1(asict, asich, WE790_HWR);
+		bus_space_write_1(asict, asich, WE790_HWR,
+		    hwr | WE790_HWR_SWH);
+
+		x = bus_space_read_1(asict, asich, WE790_GCR);
+		i = ((x & WE790_GCR_IR2) >> 4) |
+		    ((x & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2);
+		bus_space_write_1(asict, asich, WE790_HWR,
+		    hwr & ~WE790_HWR_SWH);
+
+		if (ia->ia_irq != IRQUNK && ia->ia_irq != we_790_irq[i])
+			printf("%s%d: overriding IRQ %d to %d\n",
+			    we_cd.cd_name, cf->cf_unit, ia->ia_irq,
+			    we_790_irq[i]);
+		ia->ia_irq = we_790_irq[i];
+	} else if (type & WE_SOFTCONFIG) {
+		/* Assemble together the encoded interrupt number. */
+		i = (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_IR2) |
+		    ((bus_space_read_1(asict, asich, WE_IRR) &
+		      (WE_IRR_IR0 | WE_IRR_IR1)) >> 5);
+
+		if (ia->ia_irq != IRQUNK && ia->ia_irq != we_584_irq[i])
+			printf("%s%d: overriding IRQ %d to %d\n",
+			    we_cd.cd_name, cf->cf_unit, ia->ia_irq,
+			    we_584_irq[i]);
+		ia->ia_irq = we_584_irq[i];
+	}
+
+	/* So, we say we've found it! */
+	ia->ia_iosize = WE_NPORTS;
+	ia->ia_msize = memsize;
+	rv = 1;
+
+ out:
+	if (asich_valid)
+		bus_space_unmap(asict, asich, WE_NPORTS);
+	if (memh_valid)
+		bus_space_unmap(memt, memh, memsize);
+	return (rv);
+}
+
+void
+we_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct we_softc *wsc = (struct we_softc *)self;
+	struct dp8390_softc *sc = &wsc->sc_dp8390;
+	struct isa_attach_args *ia = aux;
+	bus_space_tag_t nict, asict, memt;
+	bus_space_handle_t nich, asich, memh;
+	const char *typestr;
+	u_int8_t x;
+	int i;
+
+	printf("\n");
+
+	nict = asict = ia->ia_iot;
+	memt = ia->ia_memt;
+
+	/* Map the device. */
+	if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich)) {
+		printf("%s: can't map nic i/o space\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
+	    &nich)) {
+		printf("%s: can't subregion i/o space\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	typestr = we_params(asict, asich, &wsc->sc_type, NULL,
+	    &wsc->sc_16bitp, &sc->is790);
+	if (typestr == NULL) {
+		printf("%s: where did the card go?\n", sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/*
+	 * Map memory space.  Note we use the size that might have
+	 * been overridden by the user.
+	 */
+	if (bus_space_map(memt, ia->ia_maddr, ia->ia_msize, 0, &memh)) {
+		printf("%s: can't map shared memory\n",
+		    sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/*
+	 * Allow user to override 16-bit mode.  8-bit takes precedence.
+	 */
+	if (self->dv_cfdata->cf_flags & WE_FLAGS_FORCE_16BIT_MODE)
+		wsc->sc_16bitp = 1;
+	if (self->dv_cfdata->cf_flags & WE_FLAGS_FORCE_8BIT_MODE)
+		wsc->sc_16bitp = 0;
+
+	wsc->sc_asict = asict;
+	wsc->sc_asich = asich;
+
+	sc->sc_regt = nict;
+	sc->sc_regh = nich;
+
+	sc->sc_buft = memt;
+	sc->sc_bufh = memh;
+
+	/* Interface is always enabled. */
+	sc->sc_enabled = 1;
+
+	/* Registers are linear. */
+	for (i = 0; i < 16; i++)
+		sc->sc_reg_map[i] = i;
+
+	/* Now we can use the NIC_{GET,PUT}() macros. */
+
+	printf("%s: %s Ethernet (%s-bit)\n", sc->sc_dev.dv_xname,
+	    typestr, wsc->sc_16bitp ? "16" : "8");
+
+	/* Get station address from EEPROM. */
+	for (i = 0; i < ETHER_ADDR_LEN; i++)
+#ifdef __NetBSD__
+		sc->sc_enaddr[i] = bus_space_read_1(asict, asich, WE_PROM + i);
+#else
+		sc->sc_arpcom.ac_enaddr[i] =
+				bus_space_read_1(asict, asich, WE_PROM + i);
+#endif
+
+	/*
+	 * Set upper address bits and 8/16 bit access to shared memory.
+	 */
+	if (sc->is790) {
+		wsc->sc_laar_proto =
+		    bus_space_read_1(asict, asich, WE_LAAR) &
+		    ~WE_LAAR_M16EN;
+		bus_space_write_1(asict, asich, WE_LAAR,
+		    wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
+	} else if ((wsc->sc_type & WE_SOFTCONFIG) ||
+#ifdef TOSH_ETHER
+	    (wsc->sc_type == WE_TYPE_TOSHIBA1) ||
+	    (wsc->sc_type == WE_TYPE_TOSHIBA4) ||
+#endif
+	    (wsc->sc_type == WE_TYPE_WD8013EBT)) {
+		wsc->sc_laar_proto = (ia->ia_maddr >> 19) & WE_LAAR_ADDRHI;
+		if (wsc->sc_16bitp)
+			wsc->sc_laar_proto |= WE_LAAR_L16EN;
+		bus_space_write_1(asict, asich, WE_LAAR,
+		    wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
+	}
+
+	/*
+	 * Set address and enable interface shared memory.
+	 */
+	if (sc->is790) {
+		/* XXX MAGIC CONSTANTS XXX */
+		x = bus_space_read_1(asict, asich, 0x04);
+		bus_space_write_1(asict, asich, 0x04, x | 0x80);
+		bus_space_write_1(asict, asich, 0x0b,
+		    ((ia->ia_maddr >> 13) & 0x0f) |
+		    ((ia->ia_maddr >> 11) & 0x40) |
+		    (bus_space_read_1(asict, asich, 0x0b) & 0xb0));
+		bus_space_write_1(asict, asich, 0x04, x);
+		wsc->sc_msr_proto = 0x00;
+		sc->cr_proto = 0x00;
+	} else {
+#ifdef TOSH_ETHER
+		if (wsc->sc_type == WE_TYPE_TOSHIBA1 ||
+		    wsc->sc_type == WE_TYPE_TOSHIBA4) {
+			bus_space_write_1(asict, asich, WE_MSR + 1,
+			    ((ia->ia_maddr >> 8) & 0xe0) | 0x04);
+			bus_space_write_1(asict, asich, WE_MSR + 2,
+			    ((ia->ia_maddr >> 16) & 0x0f));
+			wsc->sc_msr_proto = WE_MSR_POW;
+		} else
+#endif
+			wsc->sc_msr_proto = (ia->ia_maddr >> 13) &
+			    WE_MSR_ADDR;
+
+		sc->cr_proto = ED_CR_RD2;
+	}
+
+	bus_space_write_1(asict, asich, WE_MSR,
+	    wsc->sc_msr_proto | WE_MSR_MENB);
+	WE_DELAY(wsc);
+
+	/*
+	 * DCR gets:
+	 *
+	 *	FIFO threshold to 8, No auto-init Remote DMA,
+	 *	byte order=80x86.
+	 *
+	 * 16-bit cards also get word-wide DMA transfers.
+	 */
+	sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
+	    (wsc->sc_16bitp ? ED_DCR_WTS : 0);
+
+	sc->test_mem = we_test_mem;
+	sc->ring_copy = we_ring_copy;
+	sc->write_mbuf = we_write_mbuf;
+	sc->read_hdr = we_read_hdr;
+	sc->recv_int = we_recv_int;
+
+	sc->sc_mediachange = we_mediachange;
+	sc->sc_mediastatus = we_mediastatus;
+
+	sc->mem_start = 0;
+	sc->mem_size = ia->ia_msize;
+
+	sc->sc_flags = self->dv_cfdata->cf_flags;
+
+	/* Do generic parts of attach. */
+	if (wsc->sc_type & WE_SOFTCONFIG) {
+		int defmedia = IFM_ETHER;
+
+		if (sc->is790) {
+			x = bus_space_read_1(asict, asich, WE790_HWR);
+			bus_space_write_1(asict, asich, WE790_HWR,
+			    x | WE790_HWR_SWH);
+			if (bus_space_read_1(asict, asich, WE790_GCR) &
+			    WE790_GCR_GPOUT)
+				defmedia |= IFM_10_2;
+			else
+				defmedia |= IFM_10_5;
+			bus_space_write_1(asict, asich, WE790_HWR,
+			    x & ~WE790_HWR_SWH);
+		} else {
+			x = bus_space_read_1(asict, asich, WE_IRR);
+			if (x & WE_IRR_OUT2)
+				defmedia |= IFM_10_2;
+			else
+				defmedia |= IFM_10_5;
+		}
+		i = dp8390_config(sc, we_media, NWE_MEDIA, defmedia);
+	} else
+		i = dp8390_config(sc, NULL, 0, 0);
+	if (i) {
+		printf("%s: configuration failed\n", sc->sc_dev.dv_xname);
+		return;
+	}
+
+	/*
+	 * Disable 16-bit access to shared memory - we leave it disabled
+	 * so that:
+	 *
+	 *	(1) machines reboot properly when the board is set to
+	 *	    16-bit mode and there are conflicting 8-bit devices
+	 *	    within the same 128k address space as this board's
+	 *	    shared memory, and
+	 *
+	 *	(2) so that other 8-bit devices with shared memory
+	 *	    in this same 128k address space will work.
+	 */
+	WE_MEM_DISABLE(wsc);
+
+	/*
+	 * Enable the configured interrupt.
+	 */
+	if (sc->is790)
+		bus_space_write_1(asict, asich, WE790_ICR,
+		    bus_space_read_1(asict, asich, WE790_ICR) |
+		    WE790_ICR_EIL);
+	else if (wsc->sc_type & WE_SOFTCONFIG)
+		bus_space_write_1(asict, asich, WE_IRR,
+		    bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
+	else if (ia->ia_irq == IRQUNK) {
+		printf("%s: can't wildcard IRQ on a %s\n",
+		    sc->sc_dev.dv_xname, typestr);
+		return;
+	}
+
+	/* Establish interrupt handler. */
+	wsc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
+	    IPL_NET, dp8390_intr, sc, sc->sc_dev.dv_xname);
+	if (wsc->sc_ih == NULL)
+		printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
+}
+
+int
+we_test_mem(sc)
+	struct dp8390_softc *sc;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+	bus_space_tag_t memt = sc->sc_buft;
+	bus_space_handle_t memh = sc->sc_bufh;
+	bus_size_t memsize = sc->mem_size;
+	int i;
+
+	if (wsc->sc_16bitp)
+		bus_space_set_region_2(memt, memh, 0, 0, memsize >> 1);
+	else
+		bus_space_set_region_1(memt, memh, 0, 0, memsize);
+
+	if (wsc->sc_16bitp) {
+		for (i = 0; i < memsize; i += 2) {
+			if (bus_space_read_2(memt, memh, i) != 0)
+				goto fail;
+		}
+	} else {
+		for (i = 0; i < memsize; i++) {
+			if (bus_space_read_1(memt, memh, i) != 0)
+				goto fail;
+		}
+	}
+
+	return (0);
+
+ fail:
+	printf("%s: failed to clear shared memory at offset 0x%x\n",
+	    sc->sc_dev.dv_xname, i);
+	WE_MEM_DISABLE(wsc);
+	return (1);
+}
+
+/*
+ * Given a NIC memory source address and a host memory destination address,
+ * copy 'len' from NIC to host using shared memory.  The 'len' is rounded
+ * up to a word - ok as long as mbufs are word-sized.
+ */
+__inline void
+we_readmem(wsc, from, to, len)
+	struct we_softc *wsc;
+	int from;
+	u_int8_t *to;
+	int len;
+{
+	bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
+	bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
+
+	if (len & 1)
+		++len;
+
+	if (wsc->sc_16bitp)
+		bus_space_read_region_stream_2(memt, memh, from,
+		    (u_int16_t *)to, len >> 1);
+	else
+		bus_space_read_region_1(memt, memh, from,
+		    to, len);
+}
+
+int
+we_write_mbuf(sc, m, buf)
+	struct dp8390_softc *sc;
+	struct mbuf *m;
+	int buf;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+	bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
+	bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
+	u_int8_t *data, savebyte[2];
+	int savelen, len, leftover;
+#ifdef DIAGNOSTIC
+	u_int8_t *lim;
+#endif
+
+	savelen = m->m_pkthdr.len;
+
+	WE_MEM_ENABLE(wsc);
+
+	/*
+	 * 8-bit boards are simple; no alignment tricks are necessary.
+	 */
+	if (wsc->sc_16bitp == 0) {
+		for (; m != NULL; buf += m->m_len, m = m->m_next)
+			bus_space_write_region_1(memt, memh,
+			    buf, mtod(m, u_int8_t *), m->m_len);
+		goto out;
+	}
+
+	/* Start out with no leftover data. */
+	leftover = 0;
+	savebyte[0] = savebyte[1] = 0;
+
+	for (; m != NULL; m = m->m_next) {
+		len = m->m_len;
+		if (len == 0)
+			continue;
+		data = mtod(m, u_int8_t *);
+#ifdef DIAGNOSTIC
+		lim = data + len;
+#endif
+		while (len > 0) {
+			if (leftover) {
+				/*
+				 * Data left over (from mbuf or realignment).
+				 * Buffer the next byte, and write it and
+				 * the leftover data out.
+				 */
+				savebyte[1] = *data++;
+				len--;
+				bus_space_write_stream_2(memt, memh, buf,
+				    *(u_int16_t *)savebyte);
+				buf += 2;
+				leftover = 0;
+#ifdef i386
+#define ALIGNED_POINTER(p,t)	1
+#endif
+#ifdef alpha
+#define ALIGNED_POINTER(p,t)	((((u_long)(p)) & (sizeof(t)-1)) == 0)
+#endif
+			} else if (ALIGNED_POINTER(data, u_int16_t) == 0) {
+				/*
+				 * Unaligned dta; buffer the next byte.
+				 */
+				savebyte[0] = *data++;
+				len--;
+				leftover = 1;
+			} else {
+				/*
+				 * Aligned data; output contiguous words as
+				 * much as we can, then buffer the remaining
+				 * byte, if any.
+				 */
+				leftover = len & 1;
+				len &= ~1;
+				bus_space_write_region_stream_2(memt, memh,
+				    buf, (u_int16_t *)data, len >> 1);
+				data += len;
+				buf += len;
+				if (leftover)
+					savebyte[0] = *data++;
+				len = 0;
+			}
+		}
+		if (len < 0)
+			panic("we_write_mbuf: negative len");
+#ifdef DIAGNOSTIC
+		if (data != lim)
+			panic("we_write_mbuf: data != lim");
+#endif
+	}
+	if (leftover) {
+		savebyte[1] = 0;
+		bus_space_write_stream_2(memt, memh, buf,
+		    *(u_int16_t *)savebyte);
+	}
+
+ out:
+	WE_MEM_DISABLE(wsc);
+
+	return (savelen);
+}
+
+int
+we_ring_copy(sc, src, dst, amount)
+	struct dp8390_softc *sc;
+	int src;
+	caddr_t dst;
+	u_short amount;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+	u_short tmp_amount;
+
+	/* Does copy wrap to lower addr in ring buffer? */
+	if (src + amount > sc->mem_end) {
+		tmp_amount = sc->mem_end - src;
+
+		/* Copy amount up to end of NIC memory. */
+		we_readmem(wsc, src, dst, tmp_amount);
+
+		amount -= tmp_amount;
+		src = sc->mem_ring;
+		dst += tmp_amount;
+	}
+
+	we_readmem(wsc, src, dst, amount);
+
+	return (src + amount);
+}
+
+void
+we_read_hdr(sc, packet_ptr, packet_hdrp)
+	struct dp8390_softc *sc;
+	int packet_ptr;
+	struct dp8390_ring *packet_hdrp;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+
+	we_readmem(wsc, packet_ptr, (u_int8_t *)packet_hdrp,
+	    sizeof(struct dp8390_ring));
+#if BYTE_ORDER == BIG_ENDIAN
+	packet_hdrp->count = bswap16(packet_hdrp->count);
+#endif
+}
+
+void
+we_recv_int(sc)
+	struct dp8390_softc *sc;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+
+	WE_MEM_ENABLE(wsc);
+	dp8390_rint(sc);
+	WE_MEM_DISABLE(wsc);
+}
+
+int
+we_mediachange(sc)
+	struct dp8390_softc *sc;
+{
+
+	/*
+	 * Current media is already set up.  Just reset the interface
+	 * to let the new value take hold.  The new media will be
+	 * set up in we_init_card() called via dp8390_init().
+	 */
+	dp8390_reset(sc);
+	return (0);
+}
+
+void
+we_mediastatus(sc, ifmr)
+	struct dp8390_softc *sc;
+	struct ifmediareq *ifmr;
+{
+	struct ifmedia *ifm = &sc->sc_media;
+
+	/*
+	 * The currently selected media is always the active media.
+	 */
+	ifmr->ifm_active = ifm->ifm_cur->ifm_media;
+}
+
+void
+we_init_card(sc)
+	struct dp8390_softc *sc;
+{
+	struct we_softc *wsc = (struct we_softc *)sc;
+	struct ifmedia *ifm = &sc->sc_media;
+
+	we_set_media(wsc, ifm->ifm_cur->ifm_media);
+}
+
+void
+we_set_media(wsc, media)
+	struct we_softc *wsc;
+	int media;
+{
+	struct dp8390_softc *sc = &wsc->sc_dp8390;
+	bus_space_tag_t asict = wsc->sc_asict;
+	bus_space_handle_t asich = wsc->sc_asich;
+	u_int8_t hwr, gcr, irr;
+
+	if (sc->is790) {
+		hwr = bus_space_read_1(asict, asich, WE790_HWR);
+		bus_space_write_1(asict, asich, WE790_HWR,
+		    hwr | WE790_HWR_SWH);
+		gcr = bus_space_read_1(asict, asich, WE790_GCR);
+		if (IFM_SUBTYPE(media) == IFM_10_2)
+			gcr |= WE790_GCR_GPOUT;
+		else
+			gcr &= ~WE790_GCR_GPOUT;
+		bus_space_write_1(asict, asich, WE790_GCR,
+		    gcr | WE790_GCR_LIT);
+		bus_space_write_1(asict, asich, WE790_HWR,
+		    hwr & ~WE790_HWR_SWH);
+		return;
+	}
+
+	irr = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_IRR);
+	if (IFM_SUBTYPE(media) == IFM_10_2)
+		irr |= WE_IRR_OUT2;
+	else
+		irr &= ~WE_IRR_OUT2;
+	bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_IRR, irr);
+}
+
+const char *
+we_params(asict, asich, typep, memsizep, is16bitp, is790p)
+	bus_space_tag_t asict;
+	bus_space_handle_t asich;
+	u_int8_t *typep;
+	bus_size_t *memsizep;
+	int *is16bitp, *is790p;
+{
+	const char *typestr;
+	bus_size_t memsize;
+	int is16bit, is790;
+	u_int8_t type;
+
+	memsize = 8192;
+	is16bit = is790 = 0;
+
+	type = bus_space_read_1(asict, asich, WE_CARD_ID);
+	switch (type) {
+	case WE_TYPE_WD8003S: 
+		typestr = "WD8003S"; 
+		break;
+	case WE_TYPE_WD8003E:
+		typestr = "WD8003E";
+		break;
+	case WE_TYPE_WD8003EB: 
+		typestr = "WD8003EB";
+		break;
+	case WE_TYPE_WD8003W:
+		typestr = "WD8003W";
+		break;
+	case WE_TYPE_WD8013EBT: 
+		typestr = "WD8013EBT";
+		memsize = 16384;
+		is16bit = 1;
+		break;
+	case WE_TYPE_WD8013W:
+		typestr = "WD8013W";
+		memsize = 16384;
+		is16bit = 1;
+		break;
+	case WE_TYPE_WD8013EP:		/* also WD8003EP */
+		if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) {
+			is16bit = 1;
+			memsize = 16384;
+			typestr = "WD8013EP";
+		} else
+			typestr = "WD8003EP";
+		break;
+	case WE_TYPE_WD8013WC:
+		typestr = "WD8013WC";
+		memsize = 16384;
+		is16bit = 1;
+		break;
+	case WE_TYPE_WD8013EBP:
+		typestr = "WD8013EBP";
+		memsize = 16384;
+		is16bit = 1;
+		break;
+	case WE_TYPE_WD8013EPC:
+		typestr = "WD8013EPC";
+		memsize = 16384;
+		is16bit = 1;
+		break;
+	case WE_TYPE_SMC8216C:
+	case WE_TYPE_SMC8216T:
+	    {
+		u_int8_t hwr;
+
+		typestr = (type == WE_TYPE_SMC8216C) ?
+		    "SMC8216/SMC8216C" : "SMC8216T";
+
+		hwr = bus_space_read_1(asict, asich, WE790_HWR);
+		bus_space_write_1(asict, asich, WE790_HWR,
+		    hwr | WE790_HWR_SWH);
+		switch (bus_space_read_1(asict, asich, WE790_RAR) &
+		    WE790_RAR_SZ64) {
+		case WE790_RAR_SZ64:
+			memsize = 65536;
+			break;
+		case WE790_RAR_SZ32:
+			memsize = 32768;
+			break;
+		case WE790_RAR_SZ16:
+			memsize = 16384;
+			break;
+		case WE790_RAR_SZ8:
+			/* 8216 has 16K shared mem -- 8416 has 8K */
+			typestr = (type == WE_TYPE_SMC8216C) ?
+			    "SMC8416C/SMC8416BT" : "SMC8416T";
+			memsize = 8192;
+			break;
+		}
+		bus_space_write_1(asict, asich, WE790_HWR, hwr);
+
+		is16bit = 1;
+		is790 = 1;
+		break;
+	    }
+#ifdef TOSH_ETHER
+	case WE_TYPE_TOSHIBA1:
+		typestr = "Toshiba1";
+		memsize = 32768;
+		is16bit = 1;
+		break;
+	case WE_TYPE_TOSHIBA4:
+		typestr = "Toshiba4";
+		memsize = 32768;
+		is16bit = 1;
+		break;
+#endif
+	default:
+		/* Not one we recognize. */
+		return (NULL);
+	}
+
+	/*
+	 * Make some adjustments to initial values depending on what is
+	 * found in the ICR.
+	 */
+	if (is16bit && (type != WE_TYPE_WD8013EBT) &&
+#ifdef TOSH_ETHER
+	    (type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) &&
+#endif
+	    (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) {
+		is16bit = 0;
+		memsize = 8192;
+	}
+
+#ifdef WE_DEBUG
+	{
+		int i;
+
+		printf("we_params: type = 0x%x, typestr = %s, is16bit = %d, "
+		    "memsize = %d\n", type, typestr, is16bit, memsize);
+		for (i = 0; i < 8; i++)
+			printf("     %d -> 0x%x\n", i,
+			    bus_space_read_1(asict, asich, i));
+	}
+#endif
+
+	if (typep != NULL)
+		*typep = type;
+	if (memsizep != NULL)
+		*memsizep = memsize;
+	if (is16bitp != NULL)
+		*is16bitp = is16bit;
+	if (is790p != NULL)
+		*is790p = is790;
+	return (typestr);
+}
diff --git a/sys/dev/isa/if_wereg.h b/sys/dev/isa/if_wereg.h
new file mode 100644
index 00000000000..4b5fbe99f99
--- /dev/null
+++ b/sys/dev/isa/if_wereg.h
@@ -0,0 +1,232 @@
+/*	$OpenBSD: if_wereg.h,v 1.1 1998/09/22 06:33:19 fgsch Exp $	*/
+/*	$NetBSD: if_wereg.h,v 1.1 1997/11/03 21:22:50 thorpej Exp $	*/
+
+/*
+ * National Semiconductor DS8390 NIC register definitions.
+ *
+ * Copyright (C) 1993, David Greenman.  This software may be used, modified,
+ * copied, distributed, and sold, in both source and binary form provided that
+ * the above copyright and these terms are retained.  Under no circumstances is
+ * the author responsible for the proper functioning of this software, nor does
+ * the author assume any responsibility for damages incurred with its use.
+ */
+
+/*
+ * Compile-time config flags
+ */
+/*
+ * This sets the default for enabling/disablng the tranceiver.
+ */
+#define WE_FLAGS_DISABLE_TRANCEIVER	0x0001
+
+/*
+ * This forces the board to be used in 8/16-bit mode even if it autoconfigs
+ * differently.
+ */
+#define WE_FLAGS_FORCE_8BIT_MODE	0x0002
+#define WE_FLAGS_FORCE_16BIT_MODE	0x0004
+
+/*
+ * This disables the use of double transmit buffers.
+ */
+#define WE_FLAGS_NO_MULTI_BUFFERING	0x0008
+
+/*
+ *		Definitions for Western digital/SMC WD80x3 series ASIC
+ */
+
+/*
+ * Memory Select Register (MSR)
+ */
+#define WE_MSR	0
+
+/* next three definitions for Toshiba */
+#define	WE_MSR_POW	0x02	/* 0 = power save, 1 = normal (R/W) */
+#define	WE_MSR_BSY	0x04	/* gate array busy (R) */
+#define	WE_MSR_LEN	0x20	/* 0 = 16-bit, 1 = 8-bit (R/W) */
+
+#define WE_MSR_ADDR	0x3f	/* Memory decode bits 18-13 */
+#define WE_MSR_MENB	0x40	/* Memory enable */
+#define WE_MSR_RST	0x80	/* Reset board */
+
+/*
+ * Interface Configuration Register (ICR)
+ */
+#define WE_ICR	1
+
+#define WE_ICR_16BIT	0x01	/* 16-bit interface */
+#define WE_ICR_OAR	0x02	/* select register (0=BIO 1=EAR) */
+#define WE_ICR_IR2	0x04	/* high order bit of encoded IRQ */
+#define WE_ICR_MSZ	0x08	/* memory size (0=8k 1=32k) */
+#define WE_ICR_RLA	0x10	/* recall LAN address */
+#define WE_ICR_RX7	0x20	/* recall all but i/o and LAN address */
+#define	WE_ICR_RIO	0x40	/* recall i/o address */
+#define WE_ICR_STO	0x80	/* store to non-volatile memory */
+#ifdef TOSH_ETHER
+#define	WE_ICR_MEM	0xe0	/* shared mem address A15-A13 (R/W) */
+#define	WE_ICR_MSZ1	0x0f	/* memory size, 0x08 = 64K, 0x04 = 32K,
+				   0x02 = 16K, 0x01 = 8K */
+				/* 64K can only be used if mem address
+				   above 1MB */
+				/* IAR holds address A23-A16 (R/W) */
+#endif
+
+/*
+ * IO Address Register (IAR)
+ */
+#define WE_IAR	2
+
+/*
+ * EEROM Address Register
+ */
+#define WE_EAR	3
+
+/*
+ * Interrupt Request Register (IRR)
+ */
+#define WE_IRR	4
+
+#define	WE_IRR_0WS	0x01	/* use 0 wait-states on 8 bit bus */
+#define WE_IRR_OUT1	0x02	/* WD83C584 pin 1 output */
+#define WE_IRR_OUT2	0x04	/* WD83C584 pin 2 output */
+#define WE_IRR_OUT3	0x08	/* WD83C584 pin 3 output */
+#define WE_IRR_FLASH	0x10	/* Flash RAM is in the ROM socket */
+
+/*
+ * The three bits of the encoded IRQ are decoded as follows:
+ *
+ * IR2 IR1 IR0  IRQ
+ *  0   0   0   2/9
+ *  0   0   1   3
+ *  0   1   0   5
+ *  0   1   1   7
+ *  1   0   0   10
+ *  1   0   1   11
+ *  1   1   0   15
+ *  1   1   1   4
+ */
+#define WE_IRR_IR0	0x20	/* bit 0 of encoded IRQ */
+#define WE_IRR_IR1	0x40	/* bit 1 of encoded IRQ */
+#define WE_IRR_IEN	0x80	/* Interrupt enable */
+
+/*
+ * LA Address Register (LAAR)
+ */
+#define WE_LAAR	5
+
+#define WE_LAAR_ADDRHI	0x1f	/* bits 23-19 of RAM address */
+#define WE_LAAR_0WS16	0x20	/* enable 0 wait-states on 16 bit bus */
+#define WE_LAAR_L16EN	0x40	/* enable 16-bit operation */
+#define WE_LAAR_M16EN	0x80	/* enable 16-bit memory access */
+
+/* i/o base offset to station address/card-ID PROM */
+#define WE_PROM	8
+
+/*
+ *	83C790 specific registers
+ */
+/*
+ * Hardware Support Register (HWR) ('790)
+ */
+#define	WE790_HWR	4
+
+#define	WE790_HWR_RST	0x10	/* hardware reset */
+#define	WE790_HWR_LPRM	0x40	/* LAN PROM select */
+#define	WE790_HWR_SWH	0x80	/* switch register set */
+
+/*
+ * ICR790 Interrupt Control Register for the 83C790
+ */
+#define	WE790_ICR	6
+
+#define	WE790_ICR_EIL	0x01	/* enable interrupts */
+
+/*
+ * REV/IOPA Revision / I/O Pipe register for the 83C79X
+ */
+#define WE790_REV	7
+
+#define WE790_REV_790	0x20
+#define WE790_REV_795	0x40
+
+/*
+ * 79X RAM Address Register (RAR)
+ *      Enabled with SWH bit=1 in HWR register
+ */
+
+#define WE790_RAR	0x0b
+
+#define WE790_RAR_SZ8	0x00	/* 8k memory buffer */
+#define WE790_RAR_SZ16	0x10	/* 16k memory buffer */
+#define WE790_RAR_SZ32	0x20	/* 32k memory buffer */
+#define WE790_RAR_SZ64	0x30	/* 64k memory buffer */
+
+/*
+ * General Control Register (GCR)
+ * Eanbled with SWH bit == 1 in HWR register
+ */
+#define	WE790_GCR	0x0d
+
+#define	WE790_GCR_LIT	0x01	/* on for UTP */
+#define	WE790_GCR_GPOUT	0x02	/* if BNC is enabled */
+#define	WE790_GCR_IR0	0x04	/* bit 0 of encoded IRQ */
+#define	WE790_GCR_IR1	0x08	/* bit 1 of encoded IRQ */
+#define	WE790_GCR_ZWSEN	0x20	/* zero wait state enable */
+#define	WE790_GCR_IR2	0x40	/* bit 2 of encoded IRQ */
+/*
+ * The three bits of the encoded IRQ are decoded as follows:
+ *
+ * IR2 IR1 IR0  IRQ
+ *  0   0   0   none
+ *  0   0   1   9
+ *  0   1   0   3
+ *  0   1   1   5
+ *  1   0   0   7
+ *  1   0   1   10
+ *  1   1   0   11
+ *  1   1   1   15
+ */
+
+/* i/o base offset to CARD ID */
+#define WE_CARD_ID	WE_PROM+6
+
+/* Board type codes in card ID */
+#define WE_TYPE_WD8003S		0x02
+#define WE_TYPE_WD8003E		0x03
+#define WE_TYPE_WD8013EBT	0x05
+#define	WE_TYPE_TOSHIBA1	0x11	/* named PCETA1 */
+#define	WE_TYPE_TOSHIBA2	0x12	/* named PCETA2 */
+#define	WE_TYPE_TOSHIBA3	0x13	/* named PCETB */
+#define	WE_TYPE_TOSHIBA4	0x14	/* named PCETC */
+#define	WE_TYPE_WD8003W		0x24
+#define	WE_TYPE_WD8003EB	0x25
+#define	WE_TYPE_WD8013W		0x26
+#define WE_TYPE_WD8013EP	0x27
+#define WE_TYPE_WD8013WC	0x28
+#define WE_TYPE_WD8013EPC	0x29
+#define	WE_TYPE_SMC8216T	0x2a
+#define	WE_TYPE_SMC8216C	0x2b
+#define WE_TYPE_WD8013EBP	0x2c
+
+/* Bit definitions in card ID */
+#define	WE_REV_MASK		0x1f	/* Revision mask */
+#define	WE_SOFTCONFIG		0x20	/* Soft config */
+#define	WE_LARGERAM		0x40	/* Large RAM */
+#define	WE_MICROCHANEL		0x80	/* Microchannel bus (vs. isa) */
+
+/*
+ * Checksum total.  All 8 bytes in station address PROM will add up to this.
+ */
+#ifdef TOSH_ETHER
+#define WE_ROM_CHECKSUM_TOTAL	0xA5
+#else
+#define WE_ROM_CHECKSUM_TOTAL	0xFF
+#endif
+
+#define WE_NIC_OFFSET		0x10	/* I/O base offset to NIC */
+#define WE_ASIC_OFFSET		0	/* I/O base offset to ASIC */
+#define	WE_NIC_NPORTS		16
+#define	WE_ASIC_NPORTS		16
+#define WE_NPORTS		(WE_NIC_NPORTS + WE_ASIC_NPORTS)
+
+#define WE_PAGE_OFFSET	0	/* page offset for NIC access to mem */
diff --git a/sys/dev/isa/pnpdevs b/sys/dev/isa/pnpdevs
index 7c14e6363eb..66aa52b842c 100644
--- a/sys/dev/isa/pnpdevs
+++ b/sys/dev/isa/pnpdevs
@@ -1,4 +1,4 @@
-#	$OpenBSD: pnpdevs,v 1.15 1998/07/05 07:15:32 downsj Exp $
+#	$OpenBSD: pnpdevs,v 1.16 1998/09/22 06:33:20 fgsch Exp $
 
 #
 # NOTE: All `com' devices also need pccom identifiers.
@@ -187,10 +187,10 @@ wdc	PNP0600	#Generic ESDI/IDE/ATA compatible hard disk controller
 #	PNP80CA	#IBM Token Ring II
 #	PNP80CB	#IBM Token Ring II/Short
 #	PNP80CC	#IBM Token Ring 4/16Mbs
-ed	PNP80D3		#Novell/Anthem NE1000
-ed	PNP80D4		#Novell/Anthem NE2000
-ed	PNP80D5		#NE1000 Compatible
-ed	PNP80D6		#NE2000 Compatible
+ne	PNP80D3		#Novell/Anthem NE1000
+ne	PNP80D4		#Novell/Anthem NE2000
+ne	PNP80D5		#NE1000 Compatible
+ne	PNP80D6		#NE2000 Compatible
 #	PNP80D7	#Novell/Anthem NE1500T
 le	PNP80D8		#Novell/Anthem NE2100
 #	PNP80DD	#SMC ARCNETPC
diff --git a/sys/dev/isa/pnpdevs.h b/sys/dev/isa/pnpdevs.h
index 03904d890a9..283123d94de 100644
--- a/sys/dev/isa/pnpdevs.h
+++ b/sys/dev/isa/pnpdevs.h
@@ -11,10 +11,10 @@ struct isapnp_knowndev isapnp_knowndevs[] = {
 	{ "PNP0501", "com" },
 	{ "PNP0501", "pccom" },
 	{ "PNP0600", "wdc" },
-	{ "PNP80D3", "ed" },
-	{ "PNP80D4", "ed" },
-	{ "PNP80D5", "ed" },
-	{ "PNP80D6", "ed" },
+	{ "PNP80D3", "ne" },
+	{ "PNP80D4", "ne" },
+	{ "PNP80D5", "ne" },
+	{ "PNP80D6", "ne" },
 	{ "PNP80D8", "le" },
 	{ "PNP80F1", "ep" },
 	{ "PNP80F3", "ep" },