diff options
| author | Alexander Yurchenko <grange@cvs.openbsd.org> | 2004-02-19 21:35:57 +0000 |
|---|---|---|
| committer | Alexander Yurchenko <grange@cvs.openbsd.org> | 2004-02-19 21:35:57 +0000 |
| commit | f85d92bb0ed3beb219c0adc523c25c97b12a4da8 (patch) | |
| tree | c1d91ea4d44f73c6340d34b3ce5ceb43ba7968b4 /sys/dev | |
| parent | b35e42339a6675e65c7e31d8bcd86d5acd7fb33b (diff) | |
SpeedStep support for those Pentium processors which have
SpeedStep only as a chipset feature. This diff is for ICHx-M chipsets,
with 2 perfomance states available.
Tested by provos@, sturm@, millert@
Ok tedu@
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/pci/ichreg.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/sys/dev/pci/ichreg.h b/sys/dev/pci/ichreg.h new file mode 100644 index 00000000000..7a17f5cb87d --- /dev/null +++ b/sys/dev/pci/ichreg.h @@ -0,0 +1,48 @@ +/* $OpenBSD: ichreg.h,v 1.1 2004/02/19 21:35:56 grange Exp $ */ +/* + * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _DEV_PCI_ICHREG_H_ +#define _DEV_PCI_ICHREG_H_ + +/* + * Intel ICH registers definitions + */ + +/* + * LPC interface bridge registers + */ + +/* + * PCI configuration registers + */ +#define ICH_PMBASE 0x40 /* ACPI base address */ +#define ICH_GEN_PMCON1 0xa0 /* general PM configuration */ +/* ICHx-M only */ +#define ICH_GEN_PMCON1_SS_EN 0x08 /* enable SpeedStep */ + +#define ICH_PMSIZE 128 /* ACPI space size */ + +/* + * Power management I/O registers + */ +/* ICHx-M only */ +#define ICH_PM_CNTL 0x20 /* power management control */ +#define ICH_PM_ARB_DIS 0x01 /* disable arbiter */ +#define ICH_PM_SS_CNTL 0x50 /* SpeedStep control */ +#define ICH_PM_SS_STATE_LOW 0x01 /* low power state */ + +#endif /* !_DEV_PCI_ICHREG_H_ */ |