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authorJason Wright <jason@cvs.openbsd.org>2002-07-25 15:27:21 +0000
committerJason Wright <jason@cvs.openbsd.org>2002-07-25 15:27:21 +0000
commit69771d99ce9845d09ad7898fc200dd2e3553501a (patch)
tree9a61314c9869705d4a41a6ff0fcb3f9107bb5740 /sys/dev
parent5f5c20c2c7198968c396f064f8391e68b8955f24 (diff)
house cleaning, also fix a couple of incorrect bit definitions in the
(currently unused) pk engine
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/hifn7751.c8
-rw-r--r--sys/dev/pci/hifn7751reg.h44
2 files changed, 27 insertions, 25 deletions
diff --git a/sys/dev/pci/hifn7751.c b/sys/dev/pci/hifn7751.c
index 120342ca325..5dd48c27b1b 100644
--- a/sys/dev/pci/hifn7751.c
+++ b/sys/dev/pci/hifn7751.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: hifn7751.c,v 1.129 2002/07/23 19:25:09 jason Exp $ */
+/* $OpenBSD: hifn7751.c,v 1.130 2002/07/25 15:27:20 jason Exp $ */
/*
* Invertex AEON / Hifn 7751 driver
@@ -673,14 +673,14 @@ hifn_enable_crypto(sc, pciid)
WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_UNLOCK |
HIFN_DMACNFG_MSTRESET | HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
DELAY(1000);
- addr = READ_REG_1(sc, HIFN_UNLOCK_SECRET1);
+ addr = READ_REG_1(sc, HIFN_1_UNLOCK_SECRET1);
DELAY(1000);
- WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, 0);
+ WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, 0);
DELAY(1000);
for (i = 0; i <= 12; i++) {
addr = hifn_next_signature(addr, offtbl[i] + 0x101);
- WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, addr);
+ WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, addr);
DELAY(1000);
}
diff --git a/sys/dev/pci/hifn7751reg.h b/sys/dev/pci/hifn7751reg.h
index 55146b6bf25..eac93be720d 100644
--- a/sys/dev/pci/hifn7751reg.h
+++ b/sys/dev/pci/hifn7751reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: hifn7751reg.h,v 1.38 2002/07/23 19:25:09 jason Exp $ */
+/* $OpenBSD: hifn7751reg.h,v 1.39 2002/07/25 15:27:20 jason Exp $ */
/*
* Invertex AEON / Hifn 7751 driver
@@ -87,7 +87,6 @@ typedef struct hifn_desc {
#define HIFN_D_JUMP 0x40000000 /* jump descriptor */
#define HIFN_D_VALID 0x80000000 /* valid bit */
-
/*
* Processing Unit Registers (offset from BASEREG0)
*/
@@ -199,13 +198,14 @@ typedef struct hifn_desc {
#define HIFN_1_7811_RNGSTS 0x6c /* 7811: rng status */
#define HIFN_1_7811_MIPSRST 0x94 /* 7811: MIPS reset */
#define HIFN_1_REVID 0x98 /* Revision ID */
-
+#define HIFN_1_UNLOCK_SECRET1 0xf4
+#define HIFN_1_UNLOCK_SECRET2 0xfc
#define HIFN_1_PUB_RESET 0x204 /* Public/RNG Reset */
#define HIFN_1_PUB_BASE 0x300 /* Public Base Address */
#define HIFN_1_PUB_OPLEN 0x304 /* Public Operand Length */
#define HIFN_1_PUB_OP 0x308 /* Public Operand */
#define HIFN_1_PUB_STATUS 0x30c /* Public Status */
-#define HIFN_1_PUB_IEN 0x310 /* Public Interrupt nable */
+#define HIFN_1_PUB_IEN 0x310 /* Public Interrupt enable */
#define HIFN_1_RNG_CONFIG 0x314 /* RNG config */
#define HIFN_1_RNG_DATA 0x318 /* RNG data */
#define HIFN_1_PUB_MEM 0x400 /* start of Public key memory */
@@ -314,10 +314,24 @@ typedef struct hifn_desc {
/* Public key reset register (HIFN_1_PUB_RESET) */
#define HIFN_PUBRST_RESET 0x00000001 /* reset public/rng unit */
+/* Public base address register (HIFN_1_PUB_BASE) */
+#define HIFN_PUBBASE_ADDR 0x00003fff /* base address */
+
+/* Public operand length register (HIFN_1_PUB_OPLEN) */
+#define HIFN_PUBOPLEN_MOD_M 0x0000007f /* modulus length mask */
+#define HIFN_PUBOPLEN_MOD_S 0 /* modulus length shift */
+#define HIFN_PUBOPLEN_EXP_M 0x0003ff80 /* exponent length mask */
+#define HIFN_PUBOPLEN_EXP_S 7 /* exponent lenght shift */
+#define HIFN_PUBOPLEN_RED_M 0x003c0000 /* reducend length mask */
+#define HIFN_PUBOPLEN_RED_S 18 /* reducend length shift */
+
/* Public operation register (HIFN_1_PUB_OP) */
-#define HIFN_PUBOP_AOFFSET 0x0000003e /* A offset */
-#define HIFN_PUBOP_BOFFSET 0x00000fc0 /* B offset */
-#define HIFN_PUBOP_MOFFSET 0x0003f000 /* M offset */
+#define HIFN_PUBOP_AOFFSET_M 0x0000007f /* A offset mask */
+#define HIFN_PUBOP_AOFFSET_S 0 /* A offset shift */
+#define HIFN_PUBOP_BOFFSET_M 0x00000f80 /* B offset mask */
+#define HIFN_PUBOP_BOFFSET_S 7 /* B offset shift */
+#define HIFN_PUBOP_MOFFSET_M 0x0003f000 /* M offset mask */
+#define HIFN_PUBOP_MOFFSET_S 12 /* M offset shift */
#define HIFN_PUBOP_OP_MASK 0x003c0000 /* Opcode: */
#define HIFN_PUBOP_OP_NOP 0x00000000 /* NOP */
#define HIFN_PUBOP_OP_ADD 0x00040000 /* ADD */
@@ -330,13 +344,8 @@ typedef struct hifn_desc {
#define HIFN_PUBOP_OP_DECA 0x00200000 /* DEC A */
#define HIFN_PUBOP_OP_MULT 0x00240000 /* MULT */
#define HIFN_PUBOP_OP_MODMULT 0x00280000 /* Modular MULT */
-#define HIFN_PUBOP_OP_MODRED 0x002c0000 /* Modular Red */
-#define HIFN_PUBOP_OP_MODEXP 0x00300000 /* Modular Exp */
-
-/* Public operand length register (HIFN_1_PUB_OPLEN) */
-#define HIFN_PUBOPLEN_MODLEN 0x0000007f
-#define HIFN_PUBOPLEN_EXPLEN 0x0003ff80
-#define HIFN_PUBOPLEN_REDLEN 0x003c0000
+#define HIFN_PUBOP_OP_MODRED 0x002c0000 /* Modular RED */
+#define HIFN_PUBOP_OP_MODEXP 0x00300000 /* Modular EXP */
/* Public status register (HIFN_1_PUB_STATUS) */
#define HIFN_PUBSTS_DONE 0x00000001 /* operation done */
@@ -348,13 +357,6 @@ typedef struct hifn_desc {
/* Random number generator config register (HIFN_1_RNG_CONFIG) */
#define HIFN_RNGCFG_ENA 0x00000001 /* enable rng */
-/*
- * Register offsets in register set 1
- */
-
-#define HIFN_UNLOCK_SECRET1 0xf4
-#define HIFN_UNLOCK_SECRET2 0xfc
-
/*********************************************************************
* Structs for board commands
*