diff options
author | Jacob Meuser <jakemsr@cvs.openbsd.org> | 2009-05-06 22:25:58 +0000 |
---|---|---|
committer | Jacob Meuser <jakemsr@cvs.openbsd.org> | 2009-05-06 22:25:58 +0000 |
commit | 1a6113767d6fbce031775c3aef2d62177bab4ce4 (patch) | |
tree | fc73e52ca653a417a7e82da2f958f49ae14d89ed /sys/dev | |
parent | 6c9977ae80907d1946810daa8f90168d4b58eaa9 (diff) |
- explicitely disable some s/pdif features (ac3 passthrough, 24 and 32-bit
modes, "double speed")
- connect s/pdif output to the correct controller channels
fixes s/pdif output, which I partly broke when adding multichannel
support. problem reported and patches tested by Antti Harri, thanks.
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/pci/cmpci.c | 30 | ||||
-rw-r--r-- | sys/dev/pci/cmpcireg.h | 8 |
2 files changed, 30 insertions, 8 deletions
diff --git a/sys/dev/pci/cmpci.c b/sys/dev/pci/cmpci.c index f54321cc8f2..e698fac419f 100644 --- a/sys/dev/pci/cmpci.c +++ b/sys/dev/pci/cmpci.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cmpci.c,v 1.22 2009/03/29 21:53:52 sthen Exp $ */ +/* $OpenBSD: cmpci.c,v 1.23 2009/05/06 22:25:57 jakemsr Exp $ */ /* $NetBSD: cmpci.c,v 1.25 2004/10/26 06:32:20 xtraeme Exp $ */ /* @@ -1567,26 +1567,44 @@ cmpci_set_out_ports(struct cmpci_softc *sc) else chan = &sc->sc_ch0; + /* disable ac3 and 24 and 32 bit s/pdif modes */ + cmpci_reg_clear_4(sc, CMPCI_REG_CHANNEL_FORMAT, CMPCI_REG_AC3EN1); + cmpci_reg_clear_reg_misc(sc, CMPCI_REG_AC3EN2); + cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPD32SEL); + cmpci_reg_clear_4(sc, CMPCI_REG_CHANNEL_FORMAT, CMPCI_REG_SPDIF_24); + /* playback to ... */ if (CMPCI_ISCAP(sc, SPDOUT) && sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR] == CMPCI_PLAYBACK_MODE_SPDIF && (chan->md_divide == CMPCI_REG_RATE_44100 || (CMPCI_ISCAP(sc, SPDOUT_48K) && - chan->md_divide==CMPCI_REG_RATE_48000))) { + chan->md_divide == CMPCI_REG_RATE_48000))) { /* playback to SPDIF */ - cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE); + if (sc->sc_play_channel == 0) + cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, + CMPCI_REG_SPDIF0_ENABLE); + else + cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, + CMPCI_REG_SPDIF1_ENABLE); enspdout = 1; - if (chan->md_divide==CMPCI_REG_RATE_48000) + if (chan->md_divide == CMPCI_REG_RATE_48000) cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); else cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); + /* XXX assume sample rate <= 48kHz */ + cmpci_reg_clear_4(sc, CMPCI_REG_CHANNEL_FORMAT, + CMPCI_REG_DBL_SPD_RATE); } else { /* playback to DAC */ - cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, - CMPCI_REG_SPDIF0_ENABLE); + if (sc->sc_play_channel == 0) + cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, + CMPCI_REG_SPDIF0_ENABLE); + else + cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, + CMPCI_REG_SPDIF1_ENABLE); if (CMPCI_ISCAP(sc, SPDOUT_48K)) cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K); diff --git a/sys/dev/pci/cmpcireg.h b/sys/dev/pci/cmpcireg.h index 341107127af..c5c847c7f5e 100644 --- a/sys/dev/pci/cmpcireg.h +++ b/sys/dev/pci/cmpcireg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cmpcireg.h,v 1.3 2008/01/09 02:17:52 jakemsr Exp $ */ +/* $OpenBSD: cmpcireg.h,v 1.4 2009/05/06 22:25:57 jakemsr Exp $ */ /* $NetBSD: cmpcireg.h,v 1.7 2005/12/11 12:22:48 christos Exp $ */ /* @@ -85,8 +85,11 @@ # define CMPCI_REG_FORMAT_STEREO 0x00000001 # define CMPCI_REG_FORMAT_8BIT 0x00000000 # define CMPCI_REG_FORMAT_16BIT 0x00000002 -# define CMPCI_REG_CHIP_MASK1 0x1f000000 +# define CMPCI_REG_DBL_SPD_RATE 0x00000040 +# define CMPCI_REG_SPDIF_24 0x00020000 /* 24-bit spdif, model 37 */ +# define CMPCI_REG_AC3EN1 0x00100000 /* enable AC3, model 37 */ # define CMCPI_REG_CHIP_037 0x01000000 +# define CMPCI_REG_CHIP_MASK1 0x1f000000 # define CMPCI_REG_CHB3D 0x20000000 # define CMPCI_REG_CHB3D5C 0x80000000 @@ -133,6 +136,7 @@ # define CMPCI_REG_ENCENTER 0x00000080 # define CMPCI_REG_2ND_SPDIFIN 0x00000100 # define CMPCI_REG_SPDIFOUT_48K 0x00008000 +# define CMPCI_REG_AC3EN2 0x00040000 /* enable AC3, model 39 */ # define CMPCI_REG_FM_ENABLE 0x00080000 # define CMPCI_REG_SPDFLOOPI 0x00100000 # define CMPCI_REG_SPD32SEL 0x00200000 |