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authorMike Larkin <mlarkin@cvs.openbsd.org>2010-09-25 19:23:40 +0000
committerMike Larkin <mlarkin@cvs.openbsd.org>2010-09-25 19:23:40 +0000
commit48a5f50731c1f8a283a14fce884fa2a402825463 (patch)
treef9c2386859312994945d931db614d3d32aff0c1b /sys/dev
parent1c3ac96c372c99771365283b397316b1da957db3 (diff)
ppb(4) should respect pci_dopm, like pci(4) does, and not try to poweroff
the bridge if pci_dopm=0. Fixes Gateway LT3103u and Lenovo Thinkpad 100e netbooks, allowing them to suspend again (if pci_dopm is set to 0 in acpi.c). Tested by myself and deraadt on a variety of hardware. ok deraadt@
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/ppb.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/sys/dev/pci/ppb.c b/sys/dev/pci/ppb.c
index 39c2d634b26..e07e5f9f50a 100644
--- a/sys/dev/pci/ppb.c
+++ b/sys/dev/pci/ppb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ppb.c,v 1.45 2010/08/31 17:13:44 deraadt Exp $ */
+/* $OpenBSD: ppb.c,v 1.46 2010/09/25 19:23:39 mlarkin Exp $ */
/* $NetBSD: ppb.c,v 1.16 1997/06/06 23:48:05 thorpej Exp $ */
/*
@@ -366,22 +366,27 @@ ppbactivate(struct device *self, int act)
sc->sc_slcsr = pci_conf_read(pc, tag,
sc->sc_cap_off + PCI_PCIE_SLCSR);
- /*
- * Place the bridge into D3. The PCI Power Management
- * spec says we should disable I/O and memory space as
- * well as bus mastering before we do so.
- */
- csr = sc->sc_csr;
- csr &= ~PCI_COMMAND_IO_ENABLE;
- csr &= ~PCI_COMMAND_MEM_ENABLE;
- csr &= ~PCI_COMMAND_MASTER_ENABLE;
- pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
- sc->sc_pmcsr_state = pci_get_powerstate(pc, tag);
- pci_set_powerstate(pc, tag, PCI_PMCSR_STATE_D3);
+ if (pci_dopm) {
+ /*
+ * Place the bridge into D3. The PCI Power
+ * Management spec says we should disable I/O
+ * and memory space as well as bus mastering
+ * before we do so.
+ */
+ csr = sc->sc_csr;
+ csr &= ~PCI_COMMAND_IO_ENABLE;
+ csr &= ~PCI_COMMAND_MEM_ENABLE;
+ csr &= ~PCI_COMMAND_MASTER_ENABLE;
+ pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
+ sc->sc_pmcsr_state = pci_get_powerstate(pc, tag);
+ pci_set_powerstate(pc, tag, PCI_PMCSR_STATE_D3);
+ }
break;
case DVACT_RESUME:
- /* Restore power. */
- pci_set_powerstate(pc, tag, sc->sc_pmcsr_state);
+ if (pci_dopm) {
+ /* Restore power. */
+ pci_set_powerstate(pc, tag, sc->sc_pmcsr_state);
+ }
/* Restore the registers saved above. */
pci_conf_write(pc, tag, PCI_BHLC_REG, sc->sc_bhlcr);