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authorMark Kettenis <kettenis@cvs.openbsd.org>2008-02-03 15:04:38 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2008-02-03 15:04:38 +0000
commit60aa1b1e41d7ddb471c5292340aac207958956ea (patch)
tree4c2a58ed288aede7321ac98e70da5eff1818f21e /sys/dev
parente49b0eb8493c3cd1be8e15b5736169109186251a (diff)
Remove sparc64-specific hack to byteswap pcmcia bus_space access. This is no
longer necessary now that stp(4) maps the pcmcia windows little-endian. Makes wi(4) behind cbb(4) work on sparc64. tested by miod@
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/ic/if_wireg.h24
1 files changed, 5 insertions, 19 deletions
diff --git a/sys/dev/ic/if_wireg.h b/sys/dev/ic/if_wireg.h
index cfefb91e205..728153d4d89 100644
--- a/sys/dev/ic/if_wireg.h
+++ b/sys/dev/ic/if_wireg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_wireg.h,v 1.38 2005/10/18 13:37:48 fgsch Exp $ */
+/* $OpenBSD: if_wireg.h,v 1.39 2008/02/03 15:04:37 kettenis Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
@@ -81,36 +81,22 @@
* register space access macros
*/
-#if defined(__sparc64__)
-#define WI_BIG_ENDIAN_POSSIBLE (sc->wi_flags & WI_FLAGS_BUS_PCMCIA)
-#else
-#define WI_BIG_ENDIAN_POSSIBLE 0
-#endif
-
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_4(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg), \
- WI_BIG_ENDIAN_POSSIBLE ? htole32(val) : (val))
+ (sc->sc_pci ? reg * 2: reg), (val))
#define CSR_WRITE_2(sc, reg, val) \
bus_space_write_2(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg), \
- WI_BIG_ENDIAN_POSSIBLE ? htole16(val) : (val))
+ (sc->sc_pci ? reg * 2: reg), (val))
#define CSR_WRITE_1(sc, reg, val) \
bus_space_write_1(sc->wi_btag, sc->wi_bhandle, \
(sc->sc_pci ? reg * 2: reg), val)
#define CSR_READ_4(sc, reg) \
- (WI_BIG_ENDIAN_POSSIBLE ? \
- letoh32(bus_space_read_4(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg))) : \
bus_space_read_4(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg)))
+ (sc->sc_pci ? reg * 2: reg))
#define CSR_READ_2(sc, reg) \
- (WI_BIG_ENDIAN_POSSIBLE ? \
- letoh16(bus_space_read_2(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg))) : \
bus_space_read_2(sc->wi_btag, sc->wi_bhandle, \
- (sc->sc_pci ? reg * 2: reg)))
+ (sc->sc_pci ? reg * 2: reg))
#define CSR_READ_1(sc, reg) \
bus_space_read_1(sc->wi_btag, sc->wi_bhandle, \
(sc->sc_pci ? reg * 2: reg))