- On reset, disable hardware normalization for 582x and make sure the chip is in little endian mode.

- since sw normalization is now the only option, simplify normalization handling
- remove some leftover #if 0 code

2 files changed, 12 insertions, 21 deletions

diff --git a/sys/dev/pci/ubsec.c b/sys/dev/pci/ubsec.c
index 8711a385294..1aab82dada5 100644
--- a/sys/dev/pci/ubsec.c
+++ b/sys/dev/pci/ubsec.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ubsec.c,v 1.111 2002/09/04 15:37:29 jason Exp $	*/
+/*	$OpenBSD: ubsec.c,v 1.112 2002/09/11 22:40:31 jason Exp $	*/
 
 /*
  * Copyright (c) 2000 Jason L. Wright (jason@thought.net)
@@ -1603,9 +1603,11 @@ void
 ubsec_init_board(sc)
 	struct ubsec_softc *sc;
 {
-	WRITE_REG(sc, BS_CTRL,
-	    READ_REG(sc, BS_CTRL) | BS_CTRL_MCR1INT | BS_CTRL_DMAERR |
-	    ((sc->sc_flags & UBS_FLAGS_KEY) ? BS_CTRL_MCR2INT : 0));
+	/* Turn on appropriate interrupts and disable hardware normalization */
+	WRITE_REG(sc, BS_CTRL, READ_REG(sc, BS_CTRL) |
+	    BS_CTRL_MCR1INT | BS_CTRL_DMAERR | BS_CTRL_LITTLE_ENDIAN |
+	    ((sc->sc_flags & UBS_FLAGS_KEY) ? BS_CTRL_MCR2INT : 0) |
+	    ((sc->sc_flags & UBS_FLAGS_HWNORM) ? BS_CTRL_SWNORM : 0));
 }
 
 /*
@@ -1618,15 +1620,6 @@ ubsec_init_pciregs(pa)
 	pci_chipset_tag_t pc = pa->pa_pc;
 	u_int32_t misc;
 
-#if 0
-	misc = pci_conf_read(pc, pa->pa_tag, BS_RTY_TOUT);
-	misc = (misc & ~(UBS_PCI_RTY_MASK << UBS_PCI_RTY_SHIFT))
-	    | ((UBS_DEF_RTY & 0xff) << UBS_PCI_RTY_SHIFT);
-	misc = (misc & ~(UBS_PCI_TOUT_MASK << UBS_PCI_TOUT_SHIFT))
-	    | ((UBS_DEF_TOUT & 0xff) << UBS_PCI_TOUT_SHIFT);
-	pci_conf_write(pc, pa->pa_tag, BS_RTY_TOUT, misc);
-#endif
-
 	/*
 	 * This will set the cache line size to 1, this will
 	 * force the BCM58xx chip just to do burst read/writes.
@@ -1856,10 +1849,7 @@ ubsec_kprocess_modexp(sc, krp)
 		goto errout;
 	}
 
-	if (sc->sc_flags & UBS_FLAGS_HWNORM)
-		shiftbits = 0;
-	else
-		shiftbits = normbits - nbits;
+	shiftbits = normbits - nbits;
 
 	me->me_modbits = nbits;
 	me->me_shiftbits = shiftbits;
@@ -1962,8 +1952,8 @@ ubsec_kprocess_modexp(sc, krp)
 	    ctx->me_N, normbits);
 	ctx->me_len = htole16((normbits / 8) + (4 * sizeof(u_int16_t)));
 	ctx->me_op = htole16(UBS_CTXOP_MODEXP);
-	ctx->me_E_len = htole16(normbits - shiftbits);
-	ctx->me_N_len = htole16(normbits - shiftbits);
+	ctx->me_E_len = htole16(nbits);
+	ctx->me_N_len = htole16(nbits);
 
 #ifdef UBSEC_DEBUG
 	ubsec_dump_mcr(mcr);
diff --git a/sys/dev/pci/ubsecreg.h b/sys/dev/pci/ubsecreg.h
index 86248613d44..3a3118f81dc 100644
--- a/sys/dev/pci/ubsecreg.h
+++ b/sys/dev/pci/ubsecreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ubsecreg.h,v 1.26 2002/09/03 18:56:50 jason Exp $	*/
+/*	$OpenBSD: ubsecreg.h,v 1.27 2002/09/11 22:40:31 jason Exp $	*/
 
 /*
  * Copyright (c) 2000 Theo de Raadt
@@ -77,6 +77,7 @@
 #define	BS_CTRL_RNG_16		0x01800000	/* 1bit rn/16 slow clocks */
 #define	BS_CTRL_SWNORM		0x00400000	/* 582[01], sw normalization */
 #define	BS_CTRL_FRAG_M		0x0000ffff	/* output fragment size mask */
+#define	BS_CTRL_LITTLE_ENDIAN	(BS_CTRL_BE32 | BS_CTRL_BE64)
 
 /* BS_STAT - DMA Status */
 #define	BS_STAT_MCR1_BUSY	0x80000000	/* MCR1 is busy */
@@ -181,7 +182,7 @@ struct ubsec_ctx_modexp {
 	volatile u_int16_t	me_op;		/* modexp, 0x47 */
 	volatile u_int16_t	me_E_len;	/* E (bits) */
 	volatile u_int16_t	me_N_len;	/* N (bits) */
-	u_int8_t		me_N[1024/8];	/* N */
+	u_int8_t		me_N[2048/8];	/* N */
 };
 
 struct ubsec_ctx_rsapriv {