diff options
author | Jason Wright <jason@cvs.openbsd.org> | 2002-01-11 17:11:33 +0000 |
---|---|---|
committer | Jason Wright <jason@cvs.openbsd.org> | 2002-01-11 17:11:33 +0000 |
commit | b99849d036aab42f3016ee384b14908c2da05eaa (patch) | |
tree | accf7651ec3a74515ab30dff0a4aab496f9d1f25 /sys/dev | |
parent | 42eee3069a81d875bd10a4188226f11013dcbc17 (diff) |
Roughly same diff as sparc, better interrupt handling:
* check use IE bits to qualify I bits
* move cs4231 chip interrupts to APC GI handling
* enable/disable cs4231 IEN in pin control register
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/sbus/cs4231.c | 43 |
1 files changed, 33 insertions, 10 deletions
diff --git a/sys/dev/sbus/cs4231.c b/sys/dev/sbus/cs4231.c index 0ed771946a8..95d56cd6a7e 100644 --- a/sys/dev/sbus/cs4231.c +++ b/sys/dev/sbus/cs4231.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cs4231.c,v 1.7 2001/10/01 04:10:49 jason Exp $ */ +/* $OpenBSD: cs4231.c,v 1.8 2002/01/11 17:11:32 jason Exp $ */ /* * Copyright (c) 1999 Jason L. Wright (jason@thought.net) @@ -407,6 +407,10 @@ cs4231_open(addr, flags) cs4231_read(sc, SP_MISC_INFO) | MODE2); cs4231_setup_output(sc); + + cs4231_write(sc, SP_PIN_CONTROL, + cs4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE); + return (0); } @@ -464,6 +468,8 @@ cs4231_close(addr) cs4231_halt_input(sc); cs4231_halt_output(sc); + cs4231_write(sc, SP_PIN_CONTROL, + cs4231_read(sc, SP_PIN_CONTROL) & (~INTERRUPT_ENABLE)); sc->sc_open = 0; } @@ -1277,22 +1283,37 @@ cs4231_intr(v) int r = 0; csr = APC_READ(sc, APC_CSR); - status = CS_READ(sc, AD1848_STATUS); - if (status & (INTERRUPT_STATUS | SAMPLE_ERROR)) { - reg = cs4231_read(sc, CS_IRQ_STATUS); - if (reg & CS_AFS_PI) { - cs4231_write(sc, SP_LOWER_BASE_COUNT, 0xff); - cs4231_write(sc, SP_UPPER_BASE_COUNT, 0xff); + APC_WRITE(sc, APC_CSR, csr); + + if ((csr & APC_CSR_EIE) && (csr & APC_CSR_EI)) { + printf("%s: error interrupt\n", sc->sc_dev.dv_xname); + r = 1; + } + + if ((csr & APC_CSR_PIE) && (csr & APC_CSR_PI)) { + /* playback interrupt */ + r = 1; + } + + if ((csr & APC_CSR_GIE) && (csr & APC_CSR_GI)) { + /* general interrupt */ + status = CS_READ(sc, AD1848_STATUS); + if (status & (INTERRUPT_STATUS | SAMPLE_ERROR)) { + reg = cs4231_read(sc, CS_IRQ_STATUS); + if (reg & CS_AFS_PI) { + cs4231_write(sc, SP_LOWER_BASE_COUNT, 0xff); + cs4231_write(sc, SP_UPPER_BASE_COUNT, 0xff); + } + CS_WRITE(sc, AD1848_STATUS, 0); } - CS_WRITE(sc, AD1848_STATUS, 0); + r = 1; } - APC_WRITE(sc, APC_CSR, csr); if (csr & (APC_CSR_PI|APC_CSR_PMI|APC_CSR_PIE|APC_CSR_PD)) r = 1; - if (csr & APC_CSR_PM) { + if ((csr & APC_CSR_PMIE) && (csr & APC_CSR_PMI)) { u_long nextaddr, togo; p = sc->sc_nowplaying; @@ -1315,12 +1336,14 @@ cs4231_intr(v) r = 1; } +#if 0 if (csr & APC_CSR_CI) { if (sc->sc_rintr != NULL) { r = 1; (*sc->sc_rintr)(sc->sc_rarg); } } +#endif return (r); } |