refactor the code a bit, use the bge(4) PHY flags and add another

PHY workaround from the Linux tg3 driver.

1 files changed, 75 insertions, 65 deletions

diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c
index 6058e8b68b3..aecfad8b18d 100644
--- a/sys/dev/mii/brgphy.c
+++ b/sys/dev/mii/brgphy.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: brgphy.c,v 1.54 2006/10/08 00:06:20 brad Exp $	*/
+/*	$OpenBSD: brgphy.c,v 1.55 2006/10/08 00:28:35 brad Exp $	*/
 
 /*
  * Copyright (c) 2000
@@ -85,14 +85,14 @@ void	brgphy_status(struct mii_softc *);
 int	brgphy_mii_phy_auto(struct mii_softc *);
 void	brgphy_loop(struct mii_softc *);
 void	brgphy_reset(struct mii_softc *);
-void	brgphy_load_dspcode(struct mii_softc *);
 void	brgphy_bcm5401_dspcode(struct mii_softc *);
 void	brgphy_bcm5411_dspcode(struct mii_softc *);
 void	brgphy_bcm5421_dspcode(struct mii_softc *);
 void	brgphy_bcm54k2_dspcode(struct mii_softc *);
-void	brgphy_bcm5703_dspcode(struct mii_softc *);
-void	brgphy_bcm5704_dspcode(struct mii_softc *);
-void	brgphy_bcm5750_dspcode(struct mii_softc *);
+void	brgphy_adc_bug(struct mii_softc *);
+void	brgphy_5704_a0_bug(struct mii_softc *);
+void	brgphy_ber_bug(struct mii_softc *);
+void	brgphy_jitter_bug(struct mii_softc *);
 
 const struct mii_phy_funcs brgphy_funcs = {            
 	brgphy_service, brgphy_status, brgphy_reset,          
@@ -153,8 +153,16 @@ brgphy_attach(struct device *parent, struct device *self, void *aux)
 	struct mii_softc *sc = (struct mii_softc *)self;
 	struct mii_attach_args *ma = aux;
 	struct mii_data *mii = ma->mii_data;
+	struct bge_softc *bge_sc = NULL;
+	struct ifnet *ifp;
 	const struct mii_phydesc *mpd;
 
+	ifp = sc->mii_pdata->mii_ifp;
+
+	/* Find the driver associated with this PHY. */
+	if (strcmp(ifp->if_xname, "bge") == 0)
+		bge_sc = ifp->if_softc;
+
 	mpd = mii_phy_match(ma, brgphys);
 	printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
 
@@ -326,9 +334,14 @@ setit:
 	    cmd == MII_MEDIACHG) {
 		switch (sc->mii_model) {
 		case MII_MODEL_BROADCOM_BCM5400:
+			brgphy_bcm5401_dspcode(sc);
+			break;
 		case MII_MODEL_xxBROADCOM_BCM5401:
+			if (sc->mii_rev == 1 || sc->mii_rev == 3)
+				brgphy_bcm5401_dspcode(sc);
+			break;
 		case MII_MODEL_xxBROADCOM_BCM5411:
-			brgphy_load_dspcode(sc);
+			brgphy_bcm5411_dspcode(sc);
 			break;
 		}
 	}
@@ -455,25 +468,44 @@ brgphy_reset(struct mii_softc *sc)
 	else if (strcmp(ifp->if_xname, "bnx") == 0)
 		bnx_sc = ifp->if_softc;
 
-	brgphy_load_dspcode(sc);
+	switch (sc->mii_model) {
+	case MII_MODEL_BROADCOM_BCM5400:
+		brgphy_bcm5401_dspcode(sc);
+		break;
+	case MII_MODEL_BROADCOM_BCM5401:   
+		if (sc->mii_rev == 1 || sc->mii_rev == 3)
+			brgphy_bcm5401_dspcode(sc);
+		break;
+	case MII_MODEL_BROADCOM_BCM5411:   
+		brgphy_bcm5411_dspcode(sc);
+		break;
+	case MII_MODEL_xxBROADCOM_BCM5421:
+		brgphy_bcm5421_dspcode(sc);
+		break;
+	case MII_MODEL_xxBROADCOM_BCM54K2:
+		brgphy_bcm54k2_dspcode(sc);
+		break;
+	}
 
 	if (bge_sc) {
+		if (bge_sc->bge_flags & BGE_PHY_ADC_BUG)
+			brgphy_adc_bug(sc);
+		if (bge_sc->bge_flags & BGE_PHY_5704_A0_BUG)
+			brgphy_5704_a0_bug(sc);
+		if (bge_sc->bge_flags & BGE_PHY_BER_BUG)
+			brgphy_ber_bug(sc);
+		if (bge_sc->bge_flags & BGE_PHY_JITTER_BUG)
+			brgphy_jitter_bug(sc);
+
 		/*
-		 * Don't enable Ethernet@WireSpeed for the 5700 or 5705
-		 * other than A0 and A1 chips. Make sure we only do this
-		 * test on "bge" NICs, since other drivers may use this
-		 * same PHY subdriver.
+		 * Enable Ethernet@WireSpeed.
 		 */
-		if (BGE_ASICREV(bge_sc->bge_chipid) == BGE_ASICREV_BCM5700 ||
-		   (BGE_ASICREV(bge_sc->bge_chipid) == BGE_ASICREV_BCM5705 &&
-		    (bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
-		     bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A1)))
-			return;
- 
-		/* Enable Ethernet@WireSpeed. */
-		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
-		val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
-		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
+		if (!(bge_sc->bge_flags & BGE_NO_ETH_WIRE_SPEED)) {
+			PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
+			val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+			PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+			    (val | (1 << 15) | (1 << 4)));
+		}
 
 		/* Enable Link LED on Dell boxes */
 		if (bge_sc->bge_flags & BGE_NO_3LED) {
@@ -482,6 +514,8 @@ brgphy_reset(struct mii_softc *sc)
 			    & ~BRGPHY_PHY_EXTCTL_3_LED);
 		}
 	} else if (bnx_sc) {
+		brgphy_ber_bug(sc);
+
 		/* Set Jumbo frame settings in the PHY. */
 		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
 		val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
@@ -495,7 +529,8 @@ brgphy_reset(struct mii_softc *sc)
 		/* Enable Ethernet@Wirespeed */
 		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
 		val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
-		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, (val | (1 << 15) | (1 << 4)));
+		PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+		    (val | (1 << 15) | (1 << 4)));
 	}
 }
 
@@ -583,7 +618,7 @@ brgphy_bcm54k2_dspcode(struct mii_softc *sc)
 }
 
 void
-brgphy_bcm5703_dspcode(struct mii_softc *sc)
+brgphy_adc_bug(struct mii_softc *sc)
 {
 	static const struct {
 		int		reg;
@@ -604,18 +639,12 @@ brgphy_bcm5703_dspcode(struct mii_softc *sc)
 }
 
 void
-brgphy_bcm5704_dspcode(struct mii_softc *sc)
+brgphy_5704_a0_bug(struct mii_softc *sc)
 {
 	static const struct {
 		int		reg;
 		uint16_t	val;
 	} dspcode[] = {
-		{ BRGPHY_MII_AUXCTL,		0x0c00 },
-		{ BRGPHY_MII_DSP_ADDR_REG, 	0x201f },
-		{ BRGPHY_MII_DSP_RW_PORT,	0x2aaa },
-		{ BRGPHY_MII_DSP_ADDR_REG,	0x000a },
-		{ BRGPHY_MII_DSP_RW_PORT,	0x0323 },
-		{ BRGPHY_MII_AUXCTL,		0x0400 },
 		{ 0x1c,				0x8d68 },
 		{ 0x1c,				0x8d68 },
 		{ 0,				0 },
@@ -627,7 +656,7 @@ brgphy_bcm5704_dspcode(struct mii_softc *sc)
 }
 
 void
-brgphy_bcm5750_dspcode(struct mii_softc *sc)
+brgphy_ber_bug(struct mii_softc *sc)
 {
 	static const struct {
 		int		reg;
@@ -650,39 +679,20 @@ brgphy_bcm5750_dspcode(struct mii_softc *sc)
 }
 
 void
-brgphy_load_dspcode(struct mii_softc *sc)
+brgphy_jitter_bug(struct mii_softc *sc)
 {
-	switch (sc->mii_model) {
-	case MII_MODEL_BROADCOM_BCM5400:
-		brgphy_bcm5401_dspcode(sc);
-		break;
-	case MII_MODEL_BROADCOM_BCM5401:
-		if (sc->mii_rev == 1 || sc->mii_rev == 3)
-			brgphy_bcm5401_dspcode(sc);
-		break;
-	case MII_MODEL_BROADCOM_BCM5411:
-		brgphy_bcm5411_dspcode(sc);
-		break;
-	case MII_MODEL_xxBROADCOM_BCM5421:
-		brgphy_bcm5421_dspcode(sc);
-		break;
-	case MII_MODEL_xxBROADCOM_BCM54K2:
-		brgphy_bcm54k2_dspcode(sc);
-		break;
-	case MII_MODEL_xxBROADCOM_BCM5703:
-		brgphy_bcm5703_dspcode(sc);
-		break;
-	case MII_MODEL_xxBROADCOM_BCM5704:
-		brgphy_bcm5704_dspcode(sc);
-		break;
-	case MII_MODEL_xxBROADCOM_BCM5705:
-	case MII_MODEL_xxBROADCOM_BCM5750:
-	case MII_MODEL_xxBROADCOM_BCM5714:
-	case MII_MODEL_xxBROADCOM_BCM5780:
-	case MII_MODEL_xxBROADCOM_BCM5752:
-	case MII_MODEL_xxBROADCOM_BCM5706C:
-	case MII_MODEL_xxBROADCOM_BCM5708C:
-		brgphy_bcm5750_dspcode(sc);
-		break;
-	}
+	static const struct {
+		int		reg;
+		uint16_t	val;
+	} dspcode[] = {
+		{ BRGPHY_MII_AUXCTL,            0x0c00 },
+		{ BRGPHY_MII_DSP_ADDR_REG,      0x000a },
+		{ BRGPHY_MII_DSP_RW_PORT,       0x010b },
+		{ BRGPHY_MII_AUXCTL,            0x0400 },
+		{ 0,                            0 },
+	};
+	int i;
+
+	for (i = 0; dspcode[i].reg != 0; i++)
+		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
 }